METHOD FOR APPLICATION OF AN OVERGROWTH LAYER ON A GERM LAYER

Abstract

A method for applying a masked overgrowth layer onto a seed layer for producing semiconductor components, characterized in that a mask for masking the overgrowth layer is imprinted onto the seed layer.

Claims

1-10. (canceled)

11. A method for applying a masked overgrowth layer onto a seed layer for producing semiconductor components, wherein a mask for masking the overgrowth layer is imprinted onto the seed layer, the method comprising: providing a substrate with a seed layer having a seed layer surface; applying a mask material onto the seed layer surface; positioning an imprint stamp above the deposited mask material; structuring the mask material by contacting the imprint stamp with the mask material; curing the mask material; demoulding of the imprint stamp to form a mask having mask passages, said demoulding including removing the imprint stamp from contact with the mask material, wherein if a residual layer of masking material is presept in the mask passages after the demoulding of the imprint stamp, thereby concealing the seed layer surface in the mask passages, then etching the residual layer to expose the seed layer surface in the mask passages; coating the seed layer surface exposed in the mask passages with a coating material; growing the coating material to form an overgrowth layer that encloses the mask, the overcoat layer having a desired height to obtain a desired end product with a defined thickness or a defined layer.

12. The method according to claim 11, wherein the method includes forming the seed layer and/or the overgrowth layer epitaxially and/or in a monocrystalline manner from one or more of the following materials as a seed layer material and/or the coating material for the overgrowth layer: metals; semiconductors; and compound semiconductors.

13. The method according to claim 12, wherein: the metals are selected from Cu, Ag, Au, Al, Fe, Ni, Co, Pt, W, Cr, Pb, Ti, Sn and/or Zn; the semiconductors are selected from Ge, Si, alpha-Sn, fullerenes, B, Se, and Te; and the compound semiconductors are selected from GaAs, GaN, InP, InxGaN, InSb, InAs, GaSb, AlN, InN, GaP, BeTe, ZnO, CuInGaSe.sub.2, ZnS, ZnSe, ZnTe, CdS, CdSe, CdTe, HgCd(x)Te, BeSe, HgS, AlxGaAs, GaS, GaSe, GaTe, InS, InSe, InTe, CuInSe.sub.2, CuInS.sub.2, CuInGaS.sub.2, SiC, and SiGe.

14. The method according to claim 12, wherein identical materials are used as the seed layer material and the coating material for the overgrowth layer.

15. The method according to claim 11, wherein the mask material has a main component and a secondary component with one or more of the following main components: silesquioxane, particularly polyhedral oligomeric silesquioxane (POSS), and/or polydimethylsiloxane (PDMS), and/or tetraethyl orthosilicate (TEOS), and/or poly(organo)siloxanes (silicone), and/or perfluoropolyether (PFPE).

16. The method according to claim 15, wherein the mask material is applied onto the seed layer surface by means of one of the following methods: a physical deposition method, and/or a chemical deposition method, and/or a wet-chemical deposition method, and/or a coating method.

17. The method according to claim 16, wherein the physical deposition method is PVD.

18. The method according to claim 16, wherein the chemical deposition method is CVD.

19. The method according to claim 16, wherein the chemical deposition method is PE-CVD.

20. The method according to claim 16, wherein the coating method is spin coating or spray coating.

21. The method according to claim 11, wherein the mask material is structured to form the mask by means of imprint lithography.

22. The method according to claim 21, wherein the imprint lithography is nano imprint lithography.

23. The method according to claim 11, wherein the seed layer is coated with the overgrowth layer in a coating region of the seed layer surface not covered by the mask after application of the mask.

24. The method according to claim 11, wherein the overgrowth layer is formed beyond the mask.

25. The method according to claim 11, wherein the method further comprises at least partially removing the seed layer after formation of the overgrowth layer.

26. The method according to claim 25, wherein the seed layer is at least partially removed by abrading.

27. An end product, comprising: a seed layer for producing semiconductor components; and a masked overgrowth layer on the seed layer with a lower dislocation density than the seed layer.

Description

[0198] Further features and embodiments of the invention result from the claims and the following description of the figures for the drawing. In the drawing:

[0199] FIG. 1a shows a schematic cross-sectional illustration, which is not true to scale, of a first process step of an embodiment of a method according to the invention,

[0200] FIG. 1b shows a schematic cross-sectional illustration, which is not true to scale, of a second process step of the embodiment according to FIG. 1a,

[0201] FIG. 1c shows a schematic cross-sectional illustration, which is not true to scale, of a third process step of the embodiment according to FIG. 1a.

[0202] FIG. 1d shows a schematic cross-sectional illustration, which is not true to scale, of a fourth process step of the embodiment according to FIG. 1a,

[0203] FIG. 1e shows a schematic cross-sectional illustration, which is not true to scale, of a fifth process step of the embodiment according to FIG. 1a,

[0204] FIG. 1f shows a schematic cross-sectional illustration, which is not true to scale, of a sixth process step of the embodiment according to FIG. 1a,

[0205] FIG. 1g shows a schematic cross-sectional illustration, which is not true to scale, of a seventh process step of the embodiment according to FIG. 1a,

[0206] FIG. 1h shows a schematic cross-sectional illustration, which is not true to scale, of an eighth process step of the embodiment according to FIG. 1a,

[0207] FIG. 1i shows a schematic, enlarged cross-sectional illustration, which is not true to scale, of FIG. 1h,

[0208] FIG. 1j shows a schematic, enlarged cross-sectional illustration, which is not true to scale, of FIG. 1h,

[0209] FIG. 1k shows a schematic, enlarged cross-sectional illustration, which is not true to scale, of FIG. 1h,

[0210] FIG. 1l shows a schematic cross-sectional illustration, which is not true to scale, of a ninth process step of the embodiment according to FIG. 1a,

[0211] FIG. 1m shows a schematic cross-sectional illustration, which is not true to scale, of an optional tenth process step of the embodiment according to FIG. 1a,

[0212] FIG. 1n shows a schematic cross-sectional illustration, which is not true to scale, of an optional eleventh process step of the embodiment according to FIG. 1a, and

[0213] FIG. 2 shows a schematic cross-sectional illustration, which is not true to scale, of a specific embodiment according to the invention.

[0214] In the figures, the same components or components with the same function are labelled with the same reference numbers.

[0215] All of the figures shown exclusively constitute schematic illustrations, which are not true to scale, of conceivable process steps according to the invention. In particular, the order of magnitude of the structures of a mask 6 for masking a seed layer 2 lie in the micro- and/or nanometre range. An overgrowth layer 14 is applied onto the mask 6 and the seed layer 2.

[0216] FIG. 1a shows a cross-sectional illustration of a substrate 1 with a substrate surface 1o, on which the seed layer 2 is or has been deposited in a first process step with a seed layer surface 2o. According to an alternative embodiment, the substrate 1 itself can be the seed layer 2. The seed layer 2 is preferably monocrystalline, more preferably monocrystalline and epitaxial. It is possible in particular to influence the crystal orientation of the seed layer 2 by means of the deposition method. A (100) and/or a (111) crystal orientation are preferred. In this case, a (hk1) orientation is understood to mean a crystal orientation in which the hk1 planes lie parallel to the surface to of the substrate 1. The hk1 indices are the Miller indices.

[0217] FIG. 1b shows a second process step, in which a mask material 3 is deposited on the surface of the seed layer 2. The deposition can take place by means of all known deposition methods.

[0218] As the mask material 3 is preferably deposited in a liquid manner, particularly as a sol gel, the mask material 3 is illustrated with a convexly curved surface curvature (illustrated in an exaggerated manner).

[0219] In a further process step according to FIG. 1c, a positioning of an imprint stamp 4 above the mask material 3 takes place. The imprint stamp 4 can in particular be orientated and aligned relatively to the substrate 1 and/or relatively to the seed layer 2. An alignment preferably takes place on the basis of alignment marks (not drawn in), if these are present. In the case of unstructured substrates, however, a purely mechanical alignment is preferably carried out.

[0220] In a further process step according to FIG. 1d, the mask material 3 is structured in such a manner by the imprint stamp 4 that mask passages 11, preferably mask openings reaching as far as the see layer 2, are formed. The diameter d of the mask passages 11 is in particular smaller than 10 mm, preferably smaller than 1 mm, more preferably smaller than 100 m, most preferably smaller than 10 m, most preferably of all smaller than 1 m. The depth t of the mask passages 11 is in particular smaller than 100 m, preferably smaller than 10 m, more preferably smaller than 1 m, most preferably smaller than 100 nm, most preferably of all smaller than 10 nm. In particular, the depth t of the mask passages 11 therefore corresponds to the layer thickness of the mask 6. In particular, the ratio between the diameter d and the depth t is greater than 1, preferably greater than 10, more preferably greater than 100, most preferably greater than 200, most preferably of all greater than 300.

[0221] The mask opening therefore preferably has a diameter d which is larger than or the same size as the depth t.

[0222] A curing of the mask material 3 is illustrated in FIG. 1e. The curing can take place thermally and/or chemically and/or electromagnetically. Preferably, the curing takes place electromagnetically, more preferably by means of UV light. The advantage of a curing by means of electromagnetic radiation consists in the vanishingly small or practically negligible extent of the mask material 3, whilst a thermal curing can cause a thermal expansion, which is not insignificant and could damage and/or displace the structures.

[0223] FIG. 1f illustrates a demoulding step. After demoulding, the mask 6 remains on the seed layer 2. If the mask passages 11 of the mask 6 do not reach as far as the seed layer 2 after the demoulding of the imprint stamp 4, that is to say a residual layer 12 is present, an additional etching step (cf. FIG. 1g) is carried out. The residual layer 12 is removed by means of this etching step, particularly in the region of the mask passages 11, in order to expose the seed layer 2 in the region of the mask passages 11. Preferably, the creation of the residual layer 12 is avoided during the imprint step, in that the imprint stamp 4 proceeds as far as the seed layer 4 and displaces the mask material 3 in the region of the mask passages 11.

[0224] In a further process step according to FIG. 1h, the coating takes place by means of a coating system 7, particularly at a high temperature. A process chamber (not illustrated), in which the coating takes place, is therefore heated before the coating. During the coating, a coating material 8m, which is preferably identical to the seed layer material of the seed layer 2, makes it via a material flow 8 through the mask passages 11 to the seed layer surface 2o of the seed layer 2. The coating material 8m crystallizes at the seed layer surface 2o.

[0225] Gases 13, brought about by the high temperature during coating, escape from the mask material 3, which gases lead to a curing of the mask material 3, it is conceivable that the coating temperatures are not sufficient to drive the gases 13 out of the mask material 3. In such a case, the mask material 3 is thermally treated before the overgrowth according to the invention until all gases 13 have been driven out of the mask material 3.

[0226] FIG. 1i shows an enlargement, which is not true to scale, of a region A (FIG. 1h) of one of the mask passages 11 at a first time t1. The mask passage 11 has the structure size d. In the case of a radially symmetrical mask passage 11, d would be the diameter of the mask passage 11 parallel to the substrate surface 1o. The coating material 8m is limited, by means of the structure size d, in terms of the seed formation thereof to a part of the seed layer surface 2o. The material deposition of the coating material 8m preferably takes place epitaxially. This means that the coating material 8m retains the crystallographic orientation (hk1) of the seed material surface 2o during the growth thereof. At this time, the growth of the coating material 8m begins in a seed plane K1, which coincides with the seed surface 2o of the seed layer 2.

[0227] FIG. 1j shows an enlargement, which is not true to scale, of the region A of a mask passage 11 at a second time t2. At this time, the coating material 8m has already grown to a height h1. A new (higher) seed plane K2 has been created at a distance form the original seed surface 2o. A characteristic feature exists in that the fault density, particularly the dislocation density of the dislocations 10, decreases with increasing distance from the original seed surface 2o. The upwardly growing, particularly monocrystalline and/or epitaxial layer therefore becomes ever more perfect with increasing distance from the original seed surface 2o.

[0228] FIG. 1k shows the state of an overgrowth of the overgrowth layer 14 over the mask 6 up to a third time t3, at which a seed layer K3 lies over the mask surface 6o. The coating material 8m has been distributed over all mask openings 11, particularly uniformly. The void density, particularly the dislocation density of the dislocations 10, reaches a minimum and is preferably negligibly small. Therefore, by means of the process according to the invention, a whole area, monocrystalline, particularly epitaxial and fault-free, layer 14 is created.

[0229] FIG. 1l shows an end product 15 according to the invention, consisting of a substrate 1 and a new, particularly monocrystalline and/or epitaxial overgrowth layer 14, which is preferably fault-free on an upper side 14o. The end product 15 can be used as a starting point for further processing. Seed layer 2 and overgrowth layer 14 can in particular be differentiated from one another by means of the void density or dislocation density.

[0230] The overgrowth layer 14 has completely enclosed the mask 6 preferably over the entire area, preferably completely. Using the process according to the invention, it is not only possible for one to create a substantially fault-free, monocrystalline and/or epitaxial layer, which grows beyond the mask 6, but rather also a layer with enclosed structures, particularly dots. If the order of magnitude of these structures lies in the nanometre range, then one speaks of nanodots. Nanostructures of this type are required, in order to create semiconductor components with very specific properties, particularly properties based on quantum-mechanical effects. The nanodots are therefore the dots of the monocrystalline and/or epitaxial layer, which are surrounded by the mask imprinted according to the invention. Nanowires constitute a special case. These nanowires can be formed under certain conditions by means of a continued upward growth of the monocrystalline and/or epitaxial layer out of the aperture. The monocrystalline and/or epitaxial layer therefore does not recombine laterally to form a layer when the mask surface is reached, rather the growth thereof continues unhindered normally to the mask surface.

[0231] Also conceivable is the exclusive use of the seeded, monocrystalline and/or epitaxial, particularly defect-free overgrowth layer 14 without the included mask 6. In order to remove the mask 6 from the overgrowth layer 14, the side with the less perfect seed layer 2 is preferably removed.

[0232] A processing of the overgrowth layer 14 can be imagined, followed by a subsequent bonding step of a second substrate 1 on the overgrowth layer surface 14o according to FIG. 1m.

[0233] After the bonding step has taken place, a removal of the first substrate 1, followed by an etching and/or polishing and/or back grinding process by means of a grinding device 16 at least of parts of the seed layer 2 and/or parts of the overgrowth layer 14, is conceivable. In this case, the complete mask 6 can be removed in particular. The removal of the substrate 1 is predominantly facilitated in that the seed layer 2 has a low adhesion to the substrate 1. A process flow, in which first a back grinding and/or polishing of the overgrowth layer 14 created according to the invention takes place, followed by an etching process. The final etching process is used on the one hand to relieve tension and on the other hand to remove a defective layer created by means of the grinding process.

[0234] FIG. 2 shows a further side view according to the invention, which is not true to scale, of an embodiment of an end product, consisting of a plurality of nanowires 17, which grow out of the mask passages 11. In contrast with other embodiments according to the invention, the nanowires 17 do not recombine laterally to form an overgrowth layer, but rather grow, particularly exclusively, upwards.

REFERENCE LIST

[0235] 1, 1 Substrate [0236] 1o Substrate surface [0237] 2 Seed layer [0238] 2o Seed layer surface [0239] 3 Mask material [0240] 4 (Imprint) stamp [0241] 5 Stamp structure [0242] 5o Stamp structure surface [0243] 6 Mask [0244] 7 Coating system [0245] 8 Material flow [0246] 8m Coating material [0247] 9 Crystallographic plane (hk1) [0248] 10 Lattice structure faults, particularly dislocation [0249] 11 Mask passages [0250] 12 Residual layer [0251] 13, 13 Gases [0252] 14 Overgrowth layer [0253] 14o Overgrowth layer surface [0254] 15 End product [0255] 16 Grinding device [0256] 17 Nanowire [0257] K1, K2, K3 Seed plane [0258] h1, h2 Height [0259] t Depth [0260] d Diameter