Schottky barrier structure for silicon carbide (SiC) power devices

Abstract

A method for fabricating a silicon carbide power device may include steps of: forming a first n-type silicon carbide layer on top of a second n-type silicon carbide layer; depositing a first metal layer on the first silicon carbide layer; patterning the first metal layer; depositing and patterning a dielectric layer onto at least a portion of the pattered first metal layer; and depositing and patterning a second metal layer to form a Schottky barrier. In one embodiment, the first metal layer is a high work function metal layer, which may include Silver, Aluminum, Chromium, Nickel and Gold. In another embodiment, the second metal layer is called a Schottky metal layer, which may include Platinum, Titanium and Nickel Silicide.

Claims

1. A method for fabricating a silicon carbide power device comprising steps of: forming a first n-type silicon carbide layer on top of a second n-type silicon carbide layer; depositing a first metal layer on the first silicon carbide layer; patterning the first metal layer; depositing and patterning a dielectric layer onto at least a portion of the pattered first metal layer; and depositing and patterning a second metal layer to form a Schottky barrier without forming any p-type region on said power device.

2. The method for fabricating a silicon carbide power device of claim 1, wherein the first n-type silicon carbide layer is a lightly-doped N.sup. silicon carbide epitaxial layer, and the second n-type silicon carbide layer is a heavily-doped N.sup.+ silicon carbide substrate.

3. The method for fabricating a silicon carbide power device of claim 1, wherein the first metal layer is deposited on the first silicon carbide layer by sputtering, e-beam evaporation, electroplating or the like.

4. The method for fabricating a silicon carbide power device of claim 1, wherein the first metal layer is a high work function metal layer, including Silver, Aluminum, Chromium, Nickel and Gold.

5. The method for fabricating a silicon carbide power device of claim 1, wherein the step of depositing and patterning a second metal layer to form a Schottky barrier includes a step of depositing and pattering the second metal layer onto at least a portion of the dielectric layer on the first metal layer, and onto the patterned first metal layer that is not covered by the dielectric layer.

6. The method for fabricating a silicon carbide power device of claim 1, wherein the second metal layer includes Platinum, Titanium and Nickel Silicide.

7. The method for fabricating a silicon carbide power device of claim 1, wherein a junction biased Schottky (JBS) bar is formed when the second metal layer is in direct contact with the first metal layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 illustrates a prior art to form a Schottky diode on a silicon carbide (SiC) substrate.

(2) FIG. 2 illustrates another prior art to form a Schottky diode on a silicon carbide (SiC) substrate.

(3) FIG. 3a is a schematic view of the JBS structure without the FGR structures.

(4) FIG. 3b is a schematic view, in which only edge termination structure is formed without JBS structures.

(5) FIG. 3c is a schematic view, in which both FGR and JBS structures are formed together

(6) FIG. 3d is a schematic view, in which only FGR is formed.

(7) FIG. 4 illustrates a method of manufacturing a Schottky diode on a silicon carbide (SiC) substrate in the present invention.

DETAILED DESCRIPTION OF THE INVENTION

(8) The detailed description set forth below is intended as a description of the presently exemplary device provided in accordance with aspects of the present invention and is not intended to represent the only forms in which the present invention may be prepared or utilized. It is to be understood, rather, that the same or equivalent functions and components may be accomplished by different embodiments that are also intended to be encompassed within the spirit and scope of the invention.

(9) Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood to one of ordinary skill in the art to which this invention belongs. Although any methods, devices and materials similar or equivalent to those described can be used in the practice or testing of the invention, the exemplary methods, devices and materials are now described.

(10) All publications mentioned are incorporated by reference for the purpose of describing and disclosing, for example, the designs and methodologies that are described in the publications that might be used in connection with the presently described invention. The publications listed or discussed above, below and throughout the text are provided solely for their disclosure prior to the filing date of the present application. Nothing herein is to be construed as an admission that the inventors are not entitled to antedate such disclosure by virtue of prior invention.

(11) As used in the description herein and throughout the claims that follow, the meaning of a, an, and the includes reference to the plural unless the context clearly dictates otherwise. Also, as used in the description herein and throughout the claims that follow, the terms comprise or comprising, include or including, have or having, contain or containing and the like are to be understood to be open-ended, i.e., to mean including but not limited to. As used in the description herein and throughout the claims that follow, the meaning of in includes in and on unless the context clearly dictates otherwise.

(12) It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the embodiments. As used herein, the term and/or includes any and all combinations of one or more of the associated listed items.

(13) It will be understood that when an element is referred to as being connected or coupled to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being directly connected or directly coupled to another element, there are no intervening elements present.

(14) In order to further understand the goal, characteristics and effect of the present invention, a number of embodiments along with the drawings are illustrated as following:

(15) In one aspect, as shown in FIGS. 3a to 3d, a semiconductor device may include a first n-type silicon carbide layer 320, such as an N.sup. SiC epitaxial layer, is provided on a second N-type silicon carbide layer 310, for example, an N.sup.+ SiC substrate. In an alternative embodiment, the first N-type silicon carbide layer 320 may be an N.sup. type SiC substrate and the second n-type silicon carbide layer 310 may be an implanted or epitaxial layer. Methods of forming SiC substrates and epitaxial layers are known to those of skill in the art and, therefore, will not be described further herein. It is noted that the heavily-doped N-type SiC substrate 310 and the lightly doped N-type epitaxial layer 320 can be integrated to form a desired Schottky threshold.

(16) The semiconductor device may include a first metal layer 330 that is deposited and patterned on the first n-type silicon carbide layer 320, i.e. the N.sup. SiC epitaxial layer. In one embodiment, the deposition of the first metal layer 330 can be done by, but not limited to, sputtering, e-beam evaporation, electroplating, etc. In an exemplary embodiment, the first metal layer 330 is a high work function metal layer, which may include, but not limited to, Silver, Aluminum, Chromium, Nickel, Gold, etc.

(17) The semiconductor device may also include a dielectric layer 340 formed on at least a portion of the patterned first metal layer 330, and a second metal layer 350 deposited and patterned onto at least a portion of the dielectric layer 340 on the first metal layer 330, and onto the patterned first metal layer 330 that is not covered by the dielectric layer 340, to form a Schottky diode. The dielectric layer 340 can be used as a passivation layer. In one embodiment, the second metal layer 350 is called a Schottky metal layer, which may include, but not limited to, Platinum, Titanium, Nickel Silicide, etc. A junction biased Schottky (JBS) bar can be formed on the right side of the structure as shown in FIGS. 3a and 3c when the Schottky metal layer 350 is in direct contact with the high work function metal 330, while FIG. 3b shows an edge termination structure.

(18) The term floating guard ring (FGR) usually refers to a doped region which has no physical contact or connection with an external current or voltage biased source, and the ring region has no direct contact to a source of electrical potential. In this manner, the FGR can be used to prevent breakdown at the junction edge of the device, thereby enhancing the gain and efficiency of the device. In a further embodiment, the FGR can be formed on the left side of the structure in the present invention as shown in FIGS. 3c and 3d. It is noted that these structures can be used separately or together, depending on the design of the semiconductor device.

(19) In another aspect, a method for fabricating a silicon carbide power device may include steps of: forming a first n-type silicon carbide layer on top of a second n-type silicon carbide layer 410; depositing a first metal layer on the first silicon carbide layer 420; patterning the first metal layer 430; depositing and patterning a dielectric layer onto at least a portion of the pattered first metal layer 440; and depositing and patterning a second metal layer to form a Schottky barrier 450.

(20) In one embodiment, the first metal layer is a high work function metal layer, which may include, but not limited to, Silver, Aluminum, Chromium, Nickel, Gold, etc. In another embodiment, the second metal layer is called a Schottky metal layer, which may include, but not limited to, Platinum, Titanium, Nickel Silicide, etc. In a further embodiment, the second metal layer can be deposited onto at least a portion of the dielectric layer on the first metal layer and onto the patterned first metal layer that is not covered by the dielectric layer to form a structure as shown in FIGS. 3a and 3c.

(21) Comparing with conventional techniques, the present invention is advantageous because the manufacturing process of the Schottky diode in the present invention does not need either high voltage or high temperature annealing. Also, the step of implantation/diffusion of the P-type dopant is completely eliminated, so the performance of the Schottky diode can be significantly enhanced while the manufacturing cost can be significantly reduced.

(22) Having described the invention by the description and illustrations above, it should be understood that these are exemplary of the invention and are not to be considered as limiting. Accordingly, the invention is not to be considered as limited by the foregoing description, but includes any equivalent.