Smart energy storage cells, control method and system

Abstract

A smart cell, comprising: a positive terminal; a negative terminal; a switching circuit which is arranged to select between a first switching state in which an energy storage device is connected between the positive terminal and the negative terminal and a second switching state which bypasses said energy storage device; an inductor provided between the positive terminal and the output of the switching network; and a controller arranged to monitor the voltage across the inductor and arranged to control a duty cycle of the switching circuit based on the magnitudes of voltage changes detected across the inductor. By monitoring and analysing the magnitude of voltage changes across the inductor, the controller determines the states of charge of other series connected smart cells without any communication between cells. None of the smart cells need to transmit information on their states of charge to other smart cells in the string as each cell can sense information about the other cells from the voltage changes on the inductor. By analysing the voltage across the local sense inductor, the average state of charge of a series string of smart cells can be obtained and compared to the state of charge of the local smart cell to determine how the duty cycle of the local smart cell should be modified to synchronize its state of charge with the series string. The magnitude of the voltage change across the inductor is related to the state of charge of the cell that just switched in or out of the string.

Claims

1. A smart cell, comprising: a positive terminal; a negative terminal; a switching circuit which is arranged to select between a first switching state in which an energy storage device is connected between the positive terminal and the negative terminal and a second switching state which bypasses said energy storage device; an inductor provided between the positive terminal and the negative terminal; and a controller arranged to monitor the voltage across the inductor and arranged to control a duty cycle of the switching circuit based on the magnitudes of voltage changes detected across the inductor.

2. The smart cell as claimed in claim 1, wherein the controller is arranged to control the duty cycle of the switching circuit based on the magnitudes of voltage changes detected across the inductor and a value representative of a current state of charge of the energy storage device.

3. The smart cell as claimed in claim 1, wherein the controller is arranged to calculate a value representative of the average state of charge of all other energy storage devices connected in series or parallel with the smart cell, or a value representative of the average state of charge of the energy storage device of the smart cell in addition to the other energy storage devices connected in series or parallel with the smart cell.

4. The smart cell as claimed in claim 3, wherein said value representative of the average state of charge is the average of the magnitudes of voltage changes detected across the inductor.

5. The smart cell as claimed in claim 3, wherein the controller is arranged to control the duty cycle of the switching circuit so as to synchronise the state of charge of the energy storage device with the calculated average state of charge.

6. The smart cell as claimed in claim 5, wherein the controller controls the duty cycle of the switching circuit with a proportional-integral controller.

7. The smart cell as claimed in claim 1, wherein said inductor is in series with said switching circuit.

8. The smart cell as claimed in claim 1, wherein the controller is arranged to adjust the switching timing of the switching circuit based on said inductor voltage.

9. The smart cell as claimed in claim 8, wherein the controller is arranged to determine, based on said inductor voltage, a desired switching timing for the switching circuit that minimises the impact on voltage ripple and is arranged to adjust the switching timing for the switching circuit towards the desired switching timing.

10. The smart cell as claimed in claim 9, wherein the controller is arranged to adjust the switching timing at a rate proportional to the duty cycle of the switching circuit.

11. The smart cell as claimed in claim 8, wherein the controller is arranged to adjust the switching timing by adjusting the switching period of the smart cell.

12. The smart cell as claimed in claim 8, wherein the controller is arranged to adjust the switching timings by adjusting the switching timing at a rate proportional to the duty cycle of the smart cell.

13. The smart cell as claimed in claim 8, wherein the controller comprises a switching phase controller arranged to adjust the switching timing of the switching circuit in a first control loop and a state of charge controller arranged to adjust the duty cycle of the switching circuit in a second control loop.

14. The smart cell as claimed in claim 13, wherein the first control loop is operated at a higher rate than the second control loop.

15. The smart cell as claimed in claim 13, wherein the state of charge controller will not modify the duty cycle until the phase controller has reached a steady state condition.

16. A smart cell system comprising a plurality of smart cells according to claim 1, said plurality of smart cells being connected in series.

Description

(1) Preferred embodiments of the invention will now be described, by way of example only and with reference to the accompanying drawings in which:

(2) FIGS. 1a and 1b show a standard MMC architecture;

(3) FIG. 2 shows an example system architecture according to the invention;

(4) FIG. 3 shows the voltages on the sensing inductor during switching of a two smart cell system;

(5) FIG. 4 illustrates the timings of a smart cell as phases and vectors representing the smart cell timings and voltage;

(6) FIG. 5 illustrates using oppositely directed vectors to minimise ripple current;

(7) FIG. 6 illustrates how synchronising terminal voltage is equivalent to parallel operation;

(8) FIG. 7 illustrates the processing steps of a controller;

(9) FIG. 8 shows the results of a simulation;

(10) FIG. 9 shows an oscilloscope screenshot of an experiment; FIG. 10 shows how cell voltages and duty cycles evolved during the experiment;

(11) FIG. 11 shows the evolution of cell voltages with the SOC controller disabled; and

(12) FIG. 12 shows an oscilloscope screenshot of another experiment with smart cells operating with synchronised switching.

(13) FIG. 1a shows a schematic of a standard modular multilevel converter (MMC) converter 10 made up of a string 11 of sub-modules 12 connected between a positive rail P and a negative rail N. A sub-module 12 is shown in more detail in FIG. 1b. Each sub-module 12 comprises an energy storage device 14 such as a battery or capacitor (although any energy storage device may be used). Sub-module 12 has two switches S.sub.R and S.sub.F which are always in opposite states. When S.sub.R is on (and S.sub.F is off), the energy storage device 14 is connected in series with any other energy storage devices in the string 11. When S.sub.F is on (and S.sub.R is off), the energy storage device 14 is bypassed, i.e. it is not connected into the series string 11.

(14) The output of the converter 10 is taken from central node 13. The voltage at node 13 can be varied by controlling how many of the sub-modules 12 on the positive side and how many modules 12 on the negative side of node 13 connected their respective energy sources 14 in the series string 11 and how many bypass their energy sources 14.

(15) Each sub-module is able to connect the local energy storage source 14 into the series string 11, or bypass it, by sending the appropriate gating commands to the power semiconductor switches S.sub.R, S.sub.F.

(16) The embodiments of the invention described and shown in the rest of the figures provide a cell level battery management system (BMS) and power converter which uses a decentralized control strategy to regulate the state of charge of serially connected cells, which may be of varying capacities. As mentioned above, previous work in this field includes battery management systems with global information and control, and systems with low bandwidth communication, or a sparse communication network. Conversely, the embodiments presented here introduce a completely decentralized controller that does not rely on any communication. The distributed battery management system can be used to discharge and charge each cell in a series string of cells proportional to its capacity. The converters are also controlled in such a way as to minimize the size of the filtering components in the series string. This is because the phase controller is designed in such a way as to minimize the output voltage ripple, and therefore smaller filtering components can be used.

(17) System Architecture

(18) An example of the proposed system architecture is shown in FIG. 2. FIG. 2 shows a Modular Multi-level Controller (MMC) 20. An MMC topology has already been used to integrate large battery packs for high power applications. However in some preferred examples, what is proposed here is to use the MMC in low power applications. In this example, the system is constructed out of three smart cells 21 each containing a half bridge switching network 22 similar to the switching networks found in the sub-modules of other known MMC converters. Depending on the state of the switches, the switching network 22 either connects the energy storage device (battery cell 20 between the negative terminal 27 and positive terminal 28 of the smart cell 21 or it bypasses the battery cell 26. However each smart cell 21, has two distinct features that make it different from a standard MMC submodule (such as sub-module 12 shown in FIG. 1b): 1. There exists an independent, autonomous controller 23 in each smart cell 21. 2. Each smart cell 21 includes a small filter inductor 24, L.sub.sc.

(19) The decentralized controller 23 manages the state of charge (SOC), and monitors the state of health (SOH) of its locally connected battery cell. This information is used to apply a duty cycle to the switches Q.sub.L and Q.sub.H, such that the connected battery cell 26 discharges in proportion to its capacity. Discharging all battery cells 26 in proportion to their respective capacities yields two large benefits for the string of smart cells 25: 1. The SOC of all of the battery cells 26 in the string of smart cells 25 will be synchronized. 2. Larger, healthier battery cells 26 will be loaded more than the smaller, more degraded battery cells 26, thus the string of smart cells 25 will degrade at a more uniform rate.

(20) The voltage, v.sub.l, across the small filter inductor, L.sub.sc, contains all of the information required for each smart cell to determine its optimal switching pattern, and to adjust its duty cycle to synchronize its SOC with the other smart cells in the string. FIG. 3 is a simulation of a two smart cell system switching in its optimal switching pattern, with the voltage across one of the sense inductors shown. As shown in FIG. 3, all of the switching transitions are captured by the sense inductor, L.sub.sc. The further sections below describe how the optimal switching pattern is obtained using the transitions of v.sub.l, how the Phase Controller of FIG. 2 is designed, how the SOC of the string is synchronized using the voltage across v.sub.l, and the design of the SOC Controller of FIG. 2.

(21) In addition to sensing, L.sub.sc is used as a distributed inductor to provide output filtering. By splitting the output filter inductor amongst every smart cell 21, the inductance is reduced. In some implementations L.sub.sc could be small enough to be implemented on the trace of a PCB, thus greatly reducing the cost and size of this component. The dc output to the load simply requires a small filter capacitor, C.sub.out, whose capacitance depends on the application requirements, i.e. with no additional inductor external to the smart cells 21.

(22) Optimal Switching Pattern

(23) In order to minimize the output voltage ripple measured at v.sub.out an optimal switching pattern of all of the switches Q.sub.H and Q.sub.L is determined. This is done by all smart cells 21 collectively minimizing the ac rms inductor current. A full derivation of the results provided here can be found in the inventors' earlier patent application, PCT/GB2016/052507 which is incorporated herein by reference in its entirety.

(24) Given a set of M battery cells with capacities C={C.sub.1, C.sub.2, . . . , C.sub.M}, our objective is to find a set of phases, θ={θ.sub.1, θ.sub.2, . . . , θ.sub.M} for the turn-on of each smart cell which will minimize the ripple current in the local inductor L.sub.sc, and thus minimize the output ripple voltage. It is reasonable to assume that the nominal voltage of all of the battery cells is V.sub.nom=V.sub.1=V.sub.2= ⋅ ⋅ ⋅ =V.sub.M, since the SOC of all of the battery cells 26 will be synchronized. The duty cycle of the i.sup.th smart cell 21 can be calculated using the following equation:

(25) $\begin{array}{cc}{D}_i=\frac{C_i}{C_{MAX}}& \left(1\right)\end{array}$
where C.sub.MAX is the maximum capacity expected within set C amongst all of the battery cells 26, such that 0<D.sub.i≤1 for all i.

(26) It has been shown by the inventors that an analytical expression for the ac rms inductor current as a function of the smart cells' duty cycles and phase angles is:

(27) $\begin{array}{cc}{I}_{\mathrm{Lac}-\mathrm{rms}}^2=\frac{1}{2}{\left(\frac{V_{nom}{T}_s}{2\pi L}\right)}^2\underset{n=1}{\overset{\infty }{.Math.}}\underset{i=1}{\overset{M}{.Math.}}\underset{j=1}{\overset{M}{.Math.}}\frac{4}{{\pi }^2{n}^4}\left[\sin \left(\pi n{D}_i\right)\sin \left(\pi {\mathrm{nD}}_j\right)\cos \left(\pi n\left(D_i-D_j\right)+n\left({\theta }_i-{\theta }_j\right)\right)\right]& \left(2\right)\end{array}$
where T.sub.s is the switching period.

(28) Equation (2) can be minimized to determine an optimal set θ={θ.sub.1, θ.sub.2, . . . , θ.sub.M} that will minimize the ac rms current in the inductor L.sub.sc, and therefore, the output voltage ripple in v.sub.out.

(29) Simplifying the Problem

(30) Examining (2), we see that solving for an optimal set θ to minimize I.sub.Lac-rms non trivial, and difficult to achieve without significant computational power and global information about the system. Therefore in this section we present a way to identify a set θ which will yield a satisfactory solution, with significantly less computational requirements, and in a decentralized fashion.

(31) First, let us represent the switching action of the k.sup.th smart cell as a vector, v.sub.k, in the unit circle as depicted in FIG. 4. The k.sup.th smart cell will turn on at θ.sub.k, and turn off at θ.sub.k+2πD.sub.k. Now define a new vector, v.sub.k′ which will be known as the weighted vector, whose phase places the vector half way between the turn on and turn off times and whose length is sin(πD.sub.k). Therefore the phase and length of the weighted vector, v.sub.k′, are given by:
∠v.sub.k′=θ.sub.k′=θ.sub.k+πD.sub.k  (3)
|v.sub.k′|=sin(πD.sub.k)  (4)

(32) Applying the transformation described in (3) and (4) to all of the smart cells, and summing all v.sub.k′, we can find the square of the magnitude of the total sum vector, |v.sub.Σ′|.sup.2:

(33) $\begin{array}{cc}{.Math.v_{\Sigma }^{\prime }.Math.}^2=\underset{i=1}{\overset{M}{.Math.}}\underset{j=1}{\overset{M}{.Math.}}\sin \left({\mathrm{\pi D}}_i\right)\sin \left(\pi D_j\right)\cos \left(\pi \left(D_i-D_j\right)+{\theta }_i-{\theta }_j\right)& \left(5\right)\end{array}$

(34) Equation (5) has the exact same form as (2) when n=1 (i.e. only the fundamental is considered). Therefore, one control algorithm that will yield a sub-optimal but acceptable minimum of (2) is to minimize the magnitude of the total sum vector, |v.sub.Σ′|.sup.2:

(35) Extracting Information from v.sub.l

(36) In order to minimize the magnitude of the total sum vector, |v.sub.Σ′|.sup.2, found in (5), the duty cycle and phase shift of every smart cell in the string is still required. As shown in FIG. 3, every time a smart cell switches in and out of the string, this transition is captured by every sense inductor, L.sub.sc, in the string of smart cells. Therefore, by observing when all of the positive and negative transitions occur in v.sub.1, the “on” and “off” times of all of the smart cells in the string can be determined. From this information, the phase shift and “on” times of each cell in the string can be determined. The corresponding “off” time, and therefore duty cycle of each cell, cannot be uniquely determined.

(37) However, as the inventors have shown in PCT/GB2016/052507, there is no need to pair the correct “off” transition to its “on” transition in order to minimize (5). Even if “on” and “off” transitions are incorrectly paired together, the same minimum of (5) will be found.

(38) Phase Controller Design

(39) The smart cell controller needs to be designed such that a group of cells working together will minimize (5). By taking the derivative of (5) and setting it to zero, the local minima can be found. The partial derivative of (5) with respect to θ.sub.k is shown below:

(40) $\begin{array}{cc}\frac{\partial {.Math.v_{\Sigma }^{\prime }.Math.}^2}{\partial {\theta }_k}=2\sin \left(\pi D_k\right)\underset{i=1;i\ne k}{\overset{M}{.Math.}}\sin \left(\pi D_i\right)\sin \left(\pi \left(D_i-D_k\right)+{\theta }_i-{\theta }_k\right)& \left(6\right)\end{array}$

(41) Graphically, setting (6) to zero is equivalent to “pointing” the weighted vector v.sub.k′ in either 1) an opposite direction, or 2) the same direction, to all of the other weighted vectors v.sub.i,i≠k′ summed together. Clearly, by “pointing” v.sub.k′ in the same direction as Σ.sub.iv.sub.i,i≠k′ would result in large currents in the inductor since all of the cells would eventually be in phase, maximizing the ripple current. However, if we chose to direct v.sub.k′ in the opposite direction to Σ.sub.iv.sub.i,i≠k′, the current through the inductors will be reduced and (5) will be minimized. This can be accomplished with the controller described in equation (7) below. FIG. 5 summarizes this observation.

(42) Therefore, during each iteration of the smart cell controller, every smart cell will sum up the weighted vectors of all of the other smart cells it senses, and set its local reference to be 180 degrees away from that sum. By doing this, each smart cell will be driving (6) to zero, thus finding a local minimum to (5). Using this controller design, (7) defines the reference angle, θ.sub.k,ref′, for the kth smart cell's weighted sum vector, v.sub.k′.

(43) $\begin{array}{cc}{\theta }_{k,\mathrm{ref}}^{\prime }=-2\sin \left(\pi D_k\right)\underset{i=1;i\ne k}{\overset{M}{.Math.}}\sin \left(\pi D_i\right)\sin \left(\pi \left(D_i-D_k\right)+{\theta }_i-{\theta }_k\right)& \left(7\right)\end{array}$

(44) Note the negative sign in (7), this ensures that that the angle between θ.sub.k,ref′ and Σ.sub.iv.sub.i,i≠k′ is driven to π. Using (7) and the angle transformation of (3), a non-linear model for the k.sup.th smart cell controller can be constructed, and is shown below:

(45) $\begin{array}{cc}{\stackrel{.}{\theta }}_k^{\prime }={\omega }_k-2\frac{K}{M}\sin \left(\pi D_k\right)\underset{i=1;i\ne k}{\overset{M}{.Math.}}\sin \left(\pi D_i\right)\sin \left({\theta }_i^{\prime }-{\theta }_k^{\prime }\right)& \left(8\right)\end{array}$

(46) where ω.sub.k is the switching frequency, and K is a controller constant.

(47) SOC Controller Design

(48) The SOC of each smart cell is regulated by synchronizing its SOC with the average SOC of a series string of smart cells, which is determined by analysing v.sub.l, the voltage across the sense inductor, L.sub.SC. The SOC controller assumes that the string of smart cells is composed of cells of the same chemistry, so that there is a consistent relationship between the SOC and cell terminal voltage throughout the string.

(49) As shown in FIG. 3 every time a smart cell switches in and out of the string, the voltage that it switches will be sensed by all of the sense inductors in the string of smart cells. Therefore, by calculating the differences in the levels of the v.sub.l waveform, the terminal voltage of the cell that switched in or out can be extracted by each smart cell. Averaging all of these differences yields an average terminal voltage for the series string of smart cells. In order to account for variations in the inductance of L.sub.SC and the sensing hardware, the gain of the v.sub.l sensor may be measured and adjusted every time the SOC controller is executed. Since the local cell knows its duty cycle and phase, it can determine which transitions in the v.sub.l waveform are caused by its cell switching in and out of the circuit. Using these transitions, along with the local cell voltage measurement, the local cell can calculate the gain of its v.sub.l sensor to correctly determine the voltages of the other cells switching in and out of the circuit.

(50) The SOC controller adjusts the duty cycle of the local cell using a simple proportional-integral (PI) controller to synchronize its terminal voltage with the string's average terminal voltage. Operation in this manner is equivalent to operating the cells in parallel, as shown in the two cell example of FIG. 6. When two cells form a parallel pack of parallel cells, their terminal voltages are equal, and their output currents are i.sub.1 and i.sub.2, where i.sub.1 is not necessarily the same as i.sub.2, as shown in FIG. 6 (a). One can split up this parallel connection, and load each cell individually with i.sub.1 and i.sub.2 such that their terminal voltages are still equal, as shown in FIG. 6 (b). Thus, the two cells are operating as if they were connected in parallel. Finally, one can place the two cells in series as shown in FIG. 6 (c), operating them with currents i.sub.1 and i.sub.2, such that their terminal voltages are equal, and using a power converter to enable the series connection. The SOCs of parallel connected cells are considered to be nearly identical, and require no further management. Thus, the SOC of series connected smart cells will also be well synchronized, without having to directly compute their SOC.

(51) Implementation of the Control Algorithm

(52) A MATLAB-Simulink model of a smart cell using the theory outlined in this document was built using the SimPowerSystems toolbox. The model used the Simscape battery model and MOSFETs to simulate the power circuit. The controller was implemented as an embedded MATLAB function, and was executed once per switching cycle when the upper MOSFET, Q.sub.H, is switched on.

(53) FIG. 7 illustrates the algorithm the controller implements as a block diagram. Steps 1 through 5 below were implemented by the embedded MATLAB function. 1. Signal Processor: Detects all of the positive and negative transitions that occur during every switching cycle, T.sub.s. The local cell voltage, V.sub.local, and the average cell voltage, V.sub.avg, are measured using the levels of the v.sub.l waveform. The edge detector also keeps track of the number of smart cells sensed in the string with a simple low pass filter to average the number of smart cells. 2. Calculate θ.sub.k,ref′: A new reference phase shift is calculated using (7). 3. Calculate θ.sub.k,new′: The new phase that will be sent to the PWM generator is calculated by the phase controller. 4. Apply limits: ±2π is added to θ.sub.k,ref′ until it lies between −π and π. 5. SOC Controller: A new duty cycle is computed using V.sub.local and V.sub.avg. The updated duty cycle, D.sub.k, is sent to the PWM module. 6. PWM Generator: θ.sub.k,new′ is used by the PWM generator to produce gating signals for the MOSFETs.

(54) The phase control loop, defined by steps 1 to 4 in FIG. 7, runs a hundred times faster than the SOC control loop. The SOC control loop is defined by steps 1 and 5, and will not modify the duty cycle unless the phase controller has reached a steady state value.

(55) The embedded MATLAB function that implements the controllers, was converted into C++ code by MATLAB's coder toolbox, for easy integration into the hardware.

(56) Simulation Study of the Phase Controller

(57) A simulation study of a series string of three smart cells was undertaken to investigate the stability of the phase controller. Table I lists the simulation parameters used. The controller gain, K, was chosen through experimentation.

(58) TABLE-US-00001 TABLE I Parameters of the three smart cell simulation study Description Parameter Value Battery Cell Capacities C.sub.1 0.75 Ah C.sub.2 1.20 Ah C.sub.3 3.00 Ah Smart Cell Parameters L.sub.sc 100 μH f.sub.s 20 kHz V.sub.nom 4.19 V Output C.sub.out 54.7 μF R 4.8 Ω Control Parameters K 10

(59) The simulation consisted of the three smart cells operating completely independently of each other. The optimal switching controller was turned on 1.0 ms into the simulation. A value of C.sub.MAX=4.00 Ah was pre-programmed into each smart cell, in order for each smart cell to calculate its local duty cycle according to (1). This pre-programming was in order to provide an initial condition for this simulation as the SOC controller was not running for this simulation.

(60) FIG. 8 shows how different characteristics of the system evolve over the length of the simulation. The smart cells initially all turn on at the same time, which produces a very high ac rms ripple current in the inductor, as shown in the inset graphs. At the beginning of the simulation, I.sub.Lac-rms is 103 mA rms, and the peak-to-peak output voltage, v.sub.out-pp, is 43 mV. After the optimal switching controller is engaged, the phase shift of each smart cell gradually evolves smoothly into its steady state value. At the end of the simulation, I.sub.Lac-rms and v.sub.out-pp have improved considerably to 26 mA and 6 mV, respectively. The amount of ripple current and ripple voltage reduction will depend heavily on duty cycles of the smart cells, thus a different group of smart cells may have less or more ripple reduction than shown here.

Experimental Results

(61) Hardware Setup

(62) The theory described in this document was tested in the laboratory with an experimental setup consisting of three smart cells in series, as shown in FIG. 2 using the parameters listed in Table I. The hardware was built around ARM's mbed platform, where each smart cell is implemented with the NUCLEO-F401RE board and a custom printed circuit board (PCB) containing the power stage. The inputs of each smart cell PCB was connected to a small pack of parallel connected 18650 lithium-ion cells, in order to simulate battery cells of varying capacities. Table II lists the capacities of the equivalent cell connected to each smart cell, as measured by a Neware Battery Tester, 8 Channel 5V20A-NTFA. The cells used were manufactured by Samsung, model number INR18650-29E. The outputs of the smart cells were connected in series, and attached to a 4.8Ω resistive load.

(63) TABLE-US-00002 TABLE II Cell capacities used to test three smart cell PCBs in the laboratory Cell Number of 18650 Cells Measured Capacity 1 3 7.97 Ah 2 3 8.10 Ah 3 2 5.31 Ah

(64) The NUCLEO-F401RE board was chosen for its relatively powerful micro-controller, the STM32F401RET6, in order to focus attention on how the smart cell controller can be implemented in hardware. The STM32F401RET6 is based on the ARM 32-bit Cortex-M4 CPU and has a floating point unit. The analog to digital converter of the STM32F401RET6 was configured to its highest sample rate of 2.8 MHz while maintaining 12 bit sampling resolution, to capture the details of the v.sub.l waveform.

(65) Phase Controller Performance

(66) A first experiment using the pre-programmed capacities of Table I was carried out to verify the performance of the phase controller, whose role is to reduce the ac-rms current through the series string of smart cells.

(67) FIG. 9 shows an oscilloscope screen shot of the four smart cells operating and finding their optimal switching pattern. The peak-to-peak voltage ripple from the experiments was reduced to 23 mV from 145 mV and the ac-rms L.sub.sc ripple current was reduced to 25 mA from 95 mA. Note that the peak to peak value calculated by the oscilloscope, and shown in FIG. 9, includes some switching noise, which was ignored for the peak to peak output voltage measurements.

(68) FIG. 9 shows an oscilloscope screen shot of the three smart cells operating at their optimal switching pattern, averaging applied with 8 samples. Channel 2 (top trace) is the voltage across L.sub.sc of the first smart cell with a capacity of C.sub.1. Channel 2 (middle trace) is the output voltage ripple. Channel 3 (bottom trace) is the current in the smart cell inductors.

(69) The smart cells operating in FIG. 9 settled to the same switching pattern as the simulated cells in the above section “Simulation study of the phase controller”.

(70) SOC Controller Performance

(71) A second experiment to verify the performance of the SOC controller was also conducted. Each smart cell was connected to a fully charged set of cells, as listed in Table II. However, unlike the previous experiments and simulations, each smart cell started by operating with a duty cycle of 0.5. It became the role of the SOC Controller to correct the mismatch in duty cycles to ensure all three smart cells discharged proportional to their capacity.

(72) During operation, the SOC controller estimates the average string voltage by calculating the difference in levels as described in the above section “SOC Controller Design”. FIG. 10 shows how the cell voltages and duty cycles evolved over time during the experiment.

(73) As shown in FIG. 10, the duty cycles vary quite a bit during operation. This is due to the operation of the SOC controller, attempting to yield accurate voltage information from the string of switching smart cells. Since the controller relies on measuring the difference between levels to measure the average string voltage, there are moments during operation where these levels are non-existent, for example, when all of the duty cycles sum to a positive integer. Therefore, to counteract this possibility, if a cell senses that it has not been able to measure the string voltage for more than 2.5 minutes (although it will be appreciated that this is a non-limiting example time), it increases or decreases its duty cycle by a fixed amount. This will introduce levels into the voltage measured across L.sub.sc, and the cells will be able to measure the average string waveform. This is exactly what is happening from about 75 minutes to 200 minutes in the experimental results of FIG. 10. Cell 001 is modifying its duty cycle to get a better string measurement. As a result, “Steps” in the duty cycle are generated by the SOC Controller when an average string voltage measurement cannot be obtained.

(74) Due to the limited sampling resolution of the analog to digital converter, each cell implements a ±10 mV dead zone around its reference voltage.

(75) At the end of the experiment, the cells were allowed to rest for 10 minutes, and their voltages were measured. The results are shown in Table III, and they are all within 50 mV of each other. This is a very good result considering there is no communication between any of the smart cells. Furthermore, if the SOC controller was not operating, the string imbalance would have been much greater as shown in FIG. 11, where the smallest capacity cell discharges in around 450 minutes, clearly limiting the pack performance compared to the SOC controlled case.

(76) TABLE-US-00003 TABLE III Cell voltages at the end of the SOC Controller experiment after 10 minutes rest. Cell Voltage (V) 1 3.162 2 3.140 3 3.113

(77) It will thus be appreciated that a completely decentralized battery management system has been described here, based around the concept of a smart cell. The smart cell was built around (1) a phase controller, that synchronized all of the switching actions of the cells to minimize the output voltage ripple, and (2) a SOC controller which adjusted the duty cycle of the local smart cell to synchronize the local cell's voltage with the pack voltage, and thus, its state of charge.

(78) In the systems described here, the voltage across the filtering inductor was measured to yield the switching states, and the average state of charge of the system. While the above description is focused on synchronization of the states of charge of a series string of smart cells, the techniques described here have applications in many other areas.

(79) For example, as presented here, the smart cell concept has been shown to operate at the cell level. However, the same decentralized controller can be employed at higher power levels to break a series string of battery cells into packs instead of individual cells.

(80) The smart cell may include the implementation of a complete battery management system at the cell level, where the state of health, and state of charge are managed by the decentralized controller. In particular, the SOC Controller may be augmented with a battery model to improve its performance.

(81) Finally, some of the phase synchronization techniques presented here can be used to create completely decentralized MMC converters. Using a simple modification of multiplying (7) by −1, the smart cells can be designed to synchronize their switching actions to produce sinusoidal output waveforms as depicted in FIG. 12.

(82) More specifically FIG. 12 shows an oscilloscope screen shot of the three smart cells operating with synchronized switching, averaging applied with 8 samples. Channel 2 (top trace) is the voltage across L.sub.sc of the first smart cell with a capacity of C.sub.1. Channel 2 (middle trace), is the output voltage ripple. Channel 3 (bottom trace) is the current in the smart cell inductors.