Wafer pin chuck fabrication and repair

Abstract

In a wafer chuck design featuring pins or mesas making up the support surface, engineering the pins to have an annular shape, or to contain holes or pits, minimizes sticking of the wafer, and improves wafer settling. In another aspect of the invention is a tool and method for imparting or restoring flatness and roughness to a surface, such as the support surface of a wafer chuck. The tool is shaped such that the contact to the surface being treated is a circle or annulus. The treatment method may take place in a dedicated apparatus, or in-situ in semiconductor fabrication apparatus. The tool is smaller than the diameter of the wafer pin chuck, and may be approximate to the spatial frequency of the high spots to be lapped. The movement of the tool relative to the support surface is such that all areas of the support surface may be processed by the tool, or only those areas needing correction.

Claims

1. A method for lapping a wafer chuck having a wafer support surface that is populated with pins, each of the pins having a pitted terminal surface having a roughness, the terminal surfaces collectively configured to contact and support a semiconductor wafer, said method comprising: (a) providing a lapping tool having a toroidal surface having a recessed central region (i) having a diameter that is less than that of said wafer chuck; (b) bringing said lapping tool into contact with said terminal surfaces of said pins of said wafer chuck; (c) passing said lapping tool over all of said support surface of said wafer chuck, and thereby abrading high spots on said collection of terminal surfaces of said pins, and thereby bringing said collection of terminal surfaces of pins to a flat condition while maintaining a roughness; wherein the toroidal surface and the recessed central region of the tool allows gradual transition as the tool passes over the high spots by maintaining contact with adjacent lower spots of the pins during lapping.

2. The method of claim 1, wherein the tool is ceramic.

3. The method of claim 1, wherein the tool is the same material as the pin chuck.

4. The method of claim 1, wherein said terminal surface has a SPQ plateau roughness of at least 23.9 nm.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1A is a perspective-view drawing illustrating a pitted wafer chuck pin. FIG. 1B is a cross-sectional view of FIG. 1A, also showing wafer 20 and escaping gas 22.

(2) FIGS. 2A and 2B are optical photomicrographs showing unbroken SiC grains, and pitted SiC grains, respectively.

(3) FIG. 3 is a perspective view of a single pin of a wafer chuck shaped as an annulus, that is, having a single hole or depression in the center.

(4) FIG. 4A is an interferometer map showing the toroidal shape of the lapping tool.

(5) FIG. 4B is a perspective view of an annulus shaped tool for flattening and roughening a wafer chuck.

(6) FIG. 4C is a perspective view of an alternate embodiment of a wafer chuck flattening/roughening tool, namely a collection of annular sub-tools arranged in a circle.

(7) FIG. 5 is a cross-section view of annular and disc-shaped tools, respectively, in contact with a non-flat surface of an article to be lapped.

(8) FIGS. 6A and 6B show top (plan) and perspective views of a lapping machine arranged to be used in conjunction with a lapping tool of the present invention. FIG. 6C is a backside perspective close-up view of the lapping tool and rollers.

(9) FIG. 7 is a graph plotting the degree of flatness errors as a function of spatial frequency before and, after lapping by a technique and tool of the present invention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

(10) 1. Pin Chuck Mesa Design for Minimizing Sticking and Improved Wafer Settling

(11) The first aspect of the invention pertains to engineering the plateaus or mesas or pins (this feature will mostly be referred to hereafter as pins) of a wafer pin chuck to minimize sticking of the wafer, and to improve wafer settling.

(12) With specific regard to the wafer settling issue, when a wafer is initially placed into position on the support surface defined by the pins, it is actually desirable that there be pockets of trapped gas (e.g., air) between the wafer and the pins, to help support the wafer. Once in position, the applied vacuum causes the release of the gas from the isolated pockets, and the wafer settles onto the pins. In the absence of these isolated pockets, the gas may not be trapped initially. Instead, it may find a leak path. Without this initial support by the gas, the wafer can make a rapid hard contact with the pins during the positioning process. Among the undesirable outcomes in this situation is the occurrence of non-repeatable clamping errors.

(13) One technique for creating pockets on the terminal surface of the pins (that is, the surface that supports the wafer) is to deliberately introduce the pockets or pits into this surface, for example, by laser or electro-discharge (EDM) machining. FIG. 1A is a perspective-view drawing illustrating a wafer chuck pin 10 having bearing. 16 that has been engineered by machining to have both closed-end (e.g., blind) holes 12, as well as open-ended holes 14. FIG. 1B is a cross-sectional view of FIG. 1A, also showing wafer 20 and escaping gas 22. FIGS. 2A and 2B are optical photomicrographs of a polished terminal surface of a pin of a pinned wafer chuck, where FIG. 2A does not have pockets or pits, and FIG. 2B does exhibit such holes.

(14) Another approach along these same lines is to machine one large hole in the middle or center region of the pin terminal surface. Here, a depression 32 is machined out, leaving an annulus or annular contact area 34 around the periphery of the pin 10. This is illustrated in the perspective-view drawing of FIG. 3.

(15) These techniques reduce friction between the wafer and the wafer chuck support surface. The reduced friction helps in settling of a wafer on the pins of the support surface independent of any bow of the wafer, and independent of the roughness of the backside of the wafer.

(16) 2. Roughness Correction of Pin Chuck while Maintaining Flatness

(17) The second aspect of the invention pertains to correcting the roughness of a pin chuck while maintaining flatness.

(18) Another problem occurs during manufacture of the wafer chucks. The support surface of the chuck is lapped to provide a surface of extreme flatness. Occasionally, there is added a post processing technique like ion beam (e.g., IBF).

(19) The lapping process typically involves a fixed or bound abrasive. Due to inherent limitations in the uniformity of conditions to maintain flatness and roughness, often flatness is achieved at the expense of roughness. More exactly, local or global flatness may be improved, but roughness is reduced. This is at least a potential problem because if contacting surfaces are too smooth, they will stick together. What is needed is a way to achieve the required flatness as well as the required roughness.

(20) An embodiment of the present invention solves the roughness problem. Specifically, it imparts, maintains or restores roughness to the terminal surfaces (pin tops) of the pins by lapping with a tool that has about the same hardness as that of the surface being treated. Preferably, the lapping tool has the same composition as the surface being treated.

(21) 3. Description of the Lapping Tool

(22) The lapping tool may be in the general shape of a disc or puck. The tool should be sufficiently large that it can be moved over the surface defined by the pin tops with minimal constraint, for example, unconstrained in the z-axis, and not fall down between adjacent pins. An overall length or diameter of about 18 to 28 mm is typical. The lapping tool may be arranged to pass over the entire surface of the wafer chuck, contacting each pin terminal surface one or more times.

(23) The lapping tool should have at least the same hardness as the support surface of the wafer chuck being treated. Since the wafer chuck typically is fabricated from a hard material such as ceramic, the lapping tool should be at least this hard. Materials of this degree of hardness will abrade rather than polish the tops of the support surfaces (e.g., pins), and this is what is desired in this application. By having a greater hardness, most of the wear due to abrasion will go into the wafer support surface rather than the lapping/treatment tool. This can be achieved by incorporating diamond into the lapping tool. An interesting thing happens when the lapping tool has about the same hardness as the wafer support surface, and that is that roughness is maximized. In general, abrading materials of similar hardness leads to high roughness.

(24) A popular choice for, the wafer chuck material is silicon carbide, SiC. Thus, the lapping tool may be fabricated from SiC, or based on SiC ceramic. A processing approach for making SiC-based ceramics that affords flexibility is the reaction-bonding technology, as described above. The reaction bonding process typically leaves a small amount of residual elemental silicon in the formed body, so the resulting product is a composite of SiC and Si, often denoted Si/SiC. Some of the SiC is provided as a reinforcement filler, for example, as particulate. Some of all of this SiC filler can be replaced with other reinforcements such as boron carbide or diamond, thereby engineering different properties of the lapping tool. The Si content can be designed to be between about 5 percent by volume and about 45 percent. The B4C content can be designed to be between about 10 vol % and about 65 vol %. The diamond content can be designed to be between about 0.1 vol % and about 60 vol %.

(25) 4. Flatness Correction of Pin Chuck while Maintaining Roughness

(26) The lapping or treatment tool may also be used to impart, maintain or restore flatness to the wafer support surface of a wafer pin chuck. In general, flatness is achieved by grinding down high points until they are the same elevation as the low points. A typical experience is that repeated (e.g., thousands of times) setting and removing of silicon wafers onto the pins of a wafer chuck wears the pin tops, particularly around the outer periphery of the chuck. Thus, to restore wafer flatness, it is necessary to wear down non-worn pins until they are at the elevation of the worn pins.

(27) In wafers and wafer chucks at least, flatness problems often have a periodicity or waviness to themwaves of high and low spots for example. How frequently these errors occur can be expressed as a spatial frequency. Errors whose periodicity is greater than the size of the die (microprocessor chip) are of little relevance since the wafer will eventually be sliced up to recover the dies printed thereon. Errors whose periodicity is less than the spacing between adjacent pins has no meaning. Very high frequency errors, such as those within a pin top, are not relevant, as they will not affect the accurate positioning of a wafer. Thus, the range of spatial frequencies of concern have a periodicity between the pin spacing and the die size, or between about 3 mm and 28 mm.

(28) The treatment tool of the present invention is sized to be able to treat errors (high spots) in this range of periodicity. Moreover, it is shaped to preferentially treat (e.g., abrade) high spots. Although the tool may have the general and overall shape of a disc, not all of the surface of the tool that is adjacent to the pins is in contact with the pins. Instead, the region of the tool that actually contacts the pins during lapping is a line that closes on itself such as an oval or ellipse. More specifically, this closed loop may be a circle or annulus, that is, a ring having an outer diameter and inner diameter. Although the adjacent surface of the tool may be continuous, the central or middle region of the tool may be recessed; thus, this central or middle region does not contact the pins. The same may also be true of the very outer edge of the adjacent surface: it may feature a lip, radius or turned-up edge. These recesses are well illustrated by the interferometer image of the tool as shown in FIG. 4A. Thus, the tool may be thought of as having a toroidal or doughnut shape, as suggested by the perspective drawing of FIG. 4B. Furthermore, the lapping or treatment tool may feature a plurality of annular or toroidal sub-tools arranged in a group, for example, approximating a circle, as suggested by the perspective view of FIG. 4C.

(29) The recessed outer and inner edges of the annular contact region are useful for making a gradual transition as the tool passes over a high spot. In the absence of these recesses, the tool would abruptly impact the high spot. The recessed middle or central region of the tool also serves another role in that it permits the tool to treat high spots while maintaining contact with adjacent lower spots (e.g., pins of lower elevation). In other words, the tool maintains conformity as it traverses over the pin tops. This is best illustrated in FIG. 5 by the cross-sectional view of a wavy, non-flat surface being treated (lapped) by a toroidal tool 52 of the instant invention, and a flat-bottomed tool 54. The toroidal tool 52 bridges 56, 57 long period variations, whereas the flat-bottomed tool does not, instead, making point contact 58. Thus, the toroidal tool can be said to conformally treat the pin tops.

(30) Accordingly, as long as the circle or area of contact on the tool is flat, the tool does not have to be held in any kind of rigid or precise fixed orientation in the lapping machine during the lapping process. Rather, it can be attached to the machine using a ball-and-socket joint, or other attachment means of minimal constraint.

(31) 5. The Lapping Machine and Lapping Process

(32) FIGS. 6A and 6B show top (plan) and perspective views of a lapping machine arranged to be used in conjunction with a lapping tool of the present invention. These figures show the relative motions of the lapping tool and wafer chuck during the lapping operation. Here, wafer pin chuck 60 is mounted on a movable table 62 that moves linearly left and right. A counterclockwise rotation is imparted to wafer pin chuck 60. This rotation holds treatment (lapping) tool 64 against a pair of rollers 66, 68 that are rotatably mounted to stationary arm 70. One or both of the rollers may be driven, thereby imparting a rotation to tool 64. The lapping machine does not apply downward (e.g., z-axis) pressure to the tool. Rather, simple dead weight loading presses tool 64 against the terminal (top) surface of the pins. Thus, the treatment tool is not highly constrained during the lapping process, and could even be minimally constrained.

(33) FIG. 6C is a close-up perspective view of lapping tool 64 and rollers 66 and 68. This view is from behind the position of the view of FIG. 6B to better illustrate the rollers, tool, and their rotations.

(34) The following table describes some typical operating parameters for the lapping machine:

(35) TABLE-US-00001 Part RPM (fixed) 3.0 Step From Edge (mm) (start position) 3.5 Linear Stage Travel (mm) 109.0 Linear Stage Feed Rate (mm/min.) 0.9 Lap Dia. (mm) OD (22 mm effective) 37.5 Lap weight (g) 60.2 Lap Shape Toroidal Lap Sample Number D Cycle Time 2:01

(36) To sum up this section, the lapping machine can be set up or programmed to have the lapping tool pass over the entire surface of the wafer pin chuck, or by preferentially treating the higher regions of the chuck support surface (i.e., deterministic treating). Vacuum may be applied in the center or around the edge of the chuck to remove particulate generated by correction. The treatment tool should be designed in a more-or-less of an annulus or toroidal shape so it will conformally seek a position normal to the surface even though the pin chuck is not perfectly flat. The free state or minimally restricted state of the tool will allow the tool to naturally, thus preferentially seek and hit, treat the higher pins of the pin chuck, correcting for the flatness variation. The size of the annulus of the tool can be selected to treat or correct high spots over a select spatial frequency range. The force applied can be kept fixed or varied depending on the features or edges to provide a more or less equal treatment allowing the natural state of the tool to define. The location of the tool and the local force can be controlled to effectively control and compensate for non-flat wear of the pin chuck in known patterns. The material of the pin chuck is composed of a similar or harder material than the pins such that the roughness is maintained in the top surface of the pins of the chuck. The applied pressure, dwell or velocity of the tool may also be adjusted to perform mostly cleaning rather than flattening/roughening. Cleaning is sometimes required because the wafer chuck pins can become contaminated with debris such as the chemicals used in semiconductor processing.

(37) 6. Flatness and Roughness Correction in Lithography Tool

(38) The third aspect of the invention pertains to correcting the flatness and roughness of a pin chuck in a lithography tool.

(39) Still another problem occurs during use of these pin chucks, and that is that the edges tend to be subjected to greater wear than the interior of the wafer supporting surface. What is needed is a way to correct or refurbish these worn surfaces. Especially preferred would be a way to do this in-situ, that is, while the chuck is still installed in a lithography machine, for example. Unfortunately, up until the instant invention, there has been no known method for in-situ flattening or correcting a pin chuck.

(40) Now, however, the materials, articles and techniques of the instant invention turn out to be well suited for the in-situ flattening, roughening and/or cleaning of a reticulated or pinned wafer chuck support surface. More exactly, the present methods do not use loose grinding or lapping media but rather, a self-supporting disc-shaped tool. The amount of debris that is produced in lapping the pin tops is minimal. Furthermore, what debris is produced is pushed off of the pin tops and it falls harmlessly near the base or bottom of the pins. Thus, the debris is out of the way and will not affect the flatness or roughness of the pins, and does not pose a contamination problem.

EXAMPLES

(41) The following examples illustrate with still more specificity several embodiments of the present invention. These examples are meant to be illustrative in nature and should not be construed as limiting the scope of the invention.

Example 1: Achieving Flatness

(42) A 300 mm diameter semiconductor vacuum chuck was made from reaction bonded SiC ceramic (Si/SiC).

(43) As is common in the industry, the top surface (i.e., wafer contact surface) of the chuck was EDM machined to have a plurality of pins (also known as mesas). The pins had a nominal diameter of 0.35 mm. The purpose of the pins is to minimize wafer to chuck contact area to less than 1.5 percent (area %), which enhances function by reducing backside wafer contamination issues, providing a uniform backside vacuum force, and easing wafer release from the chuck, among other advantages.

(44) The top surface of the pin chuck was put into a flat state with traditional lapping, which is common in the industry. The flatness of the surface was measured by placing a Si wafer of known flatness on the pinned surface, applying vacuum, and measuring the top side of the wafer using a ZYGO interferometer. The surface is characterized at the die-site level with flatness (also known as moving averageMAin nm) and slope (also known as slope-local-anglesLAin wad). The area of the measurement is 28 mm8 mm. The as-lapped pin chuck measured 4.76 nm MA (mean+3 standard deviations for all die sites across the 300 mm surface) and 1.60 rad sLA (mean+3 standard deviations).

(45) The surface of the pin chuck was then treated with the technology of the present invention. Specifically, a 22 mm OD by 3 mm ID toroidal-shaped annular tool was moved across the top of the pins using a load of nominally 60g and tool radii of 27 mm. The tool was constructed from the same reaction bonded SiC formulation that was used to produce the pin chuck to provide a hard surface for efficient wear. The surface was treated with 50 passes. During this process, the tool moved laterally along the top of the pins, lightly abrading high spots. Upon completion of the process, the surface was again characterized yielding 3.97 nm MA and 1.07 urad sLA.

(46) To those skilled in the art, there are many process modifications that can be employed to change, alter and optimize the performance of the process, including geometry of the tool, construction material of the tool, number of passes, applied load, etc.

Example 2: Achieving Roughness

(47) To those skilled in the art, it is valuable to have pin chucks with good flatness, as detailed in Example 1, to enhance semiconductor fabrication processes. However, the surface of the pins must also have some level of roughness. If the top surface of the pins is too smooth, the wafer and pin chuck can stick together by the principle of optical contacting (optical contacting is the phenomenon where two bodies will stick together upon contact if they are very flat and very smooth). Sticking of the wafer to the pin chuck results in many unwanted problems such as difficult de-chucking and saddling of the wafer as it tries to lay flat on the pin chuck.

(48) Lapping with a coarse media (e.g., diamond lapping compound with a particle size of greater than or equal to 2 m) is known to yield the desired coarse surface roughness on the top of the pins.

(49) As with coarse particle lapping, the process of the present invention also provides the desired rough surface finish on the top of the pins.

(50) A 300 mm pin chuck was brought to flatness with a conventional lapping process using 2 m diamond particle media. The plateau roughness (Spq) was measured with a ZYGO white light interferometer, yielding 23.9 nm. This level of roughness is desired to prevent sticking of the wafer by optical contacting.

(51) Similarly, a 300 mm pin chuck was brought to flatness using the technology of the present invention. Using the method of Example 1, a reaction bonded SiC annular work piece (lapping tool) was passed across the top of the pin chuck to wear-down high spots and enhance flatness. As a result of the flattening, the desired high surface roughness was maintained, or even enhanced. After the process, the Spq surface roughness was 26.1 nm.

Example 3: Wear Correction

(52) During use, wafer pin chucks will wear and lose their flatness specification. The wear is from multiple sources, including thousands of silicon wafers sliding on and off the surface, contaminants being brought to the pin chuck from the back side of the wafer, machine vibration, handling, etc. An effective pin chuck refurbishment process is needed.

(53) A pin chuck that had seen a high level of field use was obtained. Using the method described in Example 1, the flatness was measured yielding 6.0 nm MA and 2.0 rad sLA. These values are unacceptably high.

(54) This worn pin chuck was processed using the annular tool per the process described in Example 1. As a result of this processing, the flatness was improved to 5.4 nm MA and 1.8 rad sLA, which provides additional life for the component.

(55) To one skilled in the art, there are several extensions to this wear correction. First, additional surface treatments can be conducted to further enhance flatness. Second, the process and be conducted in the semiconductor machine tool (i.e., inside the semiconductor fabrication facility) rather than remotely, which saves the typical logistical costs of component refurbishment.

Example 4: Effect of Lap Tool Size on Spatial Frequency of Errors

(56) Referring to FIG. 7, what is shown is the well-known plot of power spectral density (PSD) as a function of spatial frequency for an optical surface. PSD is a mathematical function correlating to the flatness of an optical surface. The plot of FIG. 7 shows the effect of lapping a surface with a lapping tool of the present invention having a 28 mm annular contact area. Specifically, the graph shows that the lapping tool had an effect on flatness in the region of spatial frequencies close to the size of the tool.

Summary and Conclusions

(57) What is claimed as novel is a technique to use a small tool (sometimes referred to as a puck or disc) with an annular shape to the contact area that is held in such a way as it can naturally ride over the larger frequencies that are not needed to be corrected. This small puck corrects the high spots that it encounters by conventional mechanical means. The general tool shape of an annulus is one whose diameter is not needed to be any greater than 28 mm (thus working a surface feature that is less critical) but typically from 10-28 mm. The width of the annulus should also be specified and typically is on the order of the pin spacing or larger, but not large enough to prevent the tool from sufficiently conforming to the larger frequency surfaces. The treatment tool can be a toroidal (doughnut) shape. More generally, it can be a continuous surface with a depression in the center and a roll on the edge, thus providing an annular contact area.

(58) The flatness of the tool in the contact area, when viewed along the peak of the annulus, should be generated to a flatness level that exceeds the specifications of the wafer chuck in that region. This can be accomplished by optically polishing.

(59) The material of the tool in contact with the pins should be of a material that is as hard or harder than the pins, which for this case is Si/SiC. The application of a material with equal hardness or greater (diamond for example) assures that the tool is equally or less worn that the magnitude of the removal from the wafer chuck, thus preserving the flatness condition during the lapping cycle.

(60) The material and structure of the annular treatment tool should be designed with a material that is light and stiff enough to float over the surface but not so heavy as to compress pins. Nor should the tool material lack stiffness such that it sags between pins, resulting in conformally lapping pins that do not stick up. A preferred material for this structure may be Si/SiC, Si/SiC/B4C, or Si/SiC/Diamond, for example.

(61) Applications of this lapping tool and methods include: Flattening pin chucks for semiconductor lithography or inspection while maintaining roughness Correction or addition of roughness while maintaining flatness Correction of worn patterns in pin chucks

INDUSTRIAL APPLICABILITY

(62) Components with a plurality of pins (or plateaus or mesas) on their surface are common in precision industries. The present invention focuses on semiconductor vacuum pin chucks that are used to hold wafers during processing. The technology in this invention allows the flatness and roughness of the pin tops to be optimized, and allows the pin top surfaces to be regenerated after field use. This technology is transferable to many other precision pin-top components, such as, but not limited to, electrostatic chucks with surface pins, reticle vacuum and electrostatic pin chucks, wafer handling arms, and components for flat panel display manufacture (glass chucks, glass handing arms, reticle chucks, etc.).

(63) In addition, this technology is transferable to the surface modification (flattening, roughening, etc.) of surfaces that do not have pins. This provides value in preparing mirror and lens surfaces, both flat and curved.

(64) An artisan of ordinary skill will appreciate that various modifications may be made to the invention herein described without departing from the scope or spirit of the invention as defined in the appended claims.