Receiver configuration for a control unit in a vehicle and method for generating a synchronization pulse

Abstract

A receiver configuration for a control unit in a vehicle having a voltage generator for generating a synchronization pulse, which includes a first voltage source, a current source and a current sink, the voltage generator generating the synchronization pulse within predefined specification limits having a predefined shape and a predefined time behavior, and the receiver configuration outputting the synchronization pulse for synchronizing a signal transmission via a databus to at least one sensor. A method is also provided for generating a synchronization pulse. The voltage generator generates the synchronization pulse via the current source and the current sink by charging and/or discharging a bus load essentially as a sinusoidal oscillation.

Claims

1. A receiver configuration for a control unit in a vehicle, the receiver configuration including a voltage generator to generate a synchronization pulse which includes a first voltage source, a current source and a current sink, the voltage generator to generate the synchronization pulse within predefined specification limits having a predefined shape and a predefined time behavior, and the receiver configuration configured to output the synchronization pulse for synchronization of a signal transmission via a databus to at least one sensor, wherein the voltage generator is configured to generate the synchronization pulse via the current source and the current sink by at least one of charging and discharging a bus load as a sinusoidal oscillation so that the synchronization pulse includes a form substantially of a complete continuous sine wave.

2. The receiver configuration as recited in claim 1, wherein: the voltage generator includes at least one digital/analog converter and at least one digital trigger circuit that provides a digital output to the at least one digital/analog converter; the at least one digital/analog converter produces a reference current corresponding to the digital output of the at least one digital trigger circuit; the at least one digital/analog converter provides the reference current to each of the current source and the current sink; the current source and current sink perform a sequence of charging and a discharging of the bus load, which is applied to the databus, using a voltage of the voltage source and according to the provided reference current; and the sine wave form of the synchronization pulse is a product of the sequence of the charging and the discharging.

3. The receiver configuration as recited in claim 1, wherein the form includes four consecutive and different sine wave quadrants.

4. The receiver configuration as recited in claim 1, wherein the form includes a first region beginning from a first sine wave trough to a sine wave crest, immediately inflecting into a second region that extends from the sine wave crest to a second sine wave trough.

5. A receiver configuration for a control unit in a vehicle, the receiver configuration including a voltage generator to generate a synchronization pulse which includes a first voltage source, a current source and a current sink, the voltage generator to generate the synchronization pulse within predefined specification limits having a predefined shape and a predefined time behavior, and the receiver configuration configured to output the synchronization pulse for synchronization of a signal transmission via a databus to at least one sensor, wherein: the voltage generator is configured to generate the synchronization pulse via the current source and the current sink by at least one of charging and discharging a bus load as a sinusoidal oscillation; and the voltage generator includes at least one digital trigger circuit and at least one digital/analog converter which generate a sinusoidal reference current and output the generated sinusoidal reference current to each of the current source and the current sink in parallel.

6. The receiver configuration as recited in claim 5, wherein a first digital trigger circuit and a first digital/analog converter generate a sinusoidal reference current and output same to the current source.

7. The receiver configuration as recited in claim 5, wherein a joint digital trigger circuit and a joint digital/analog converter generate a sinusoidal reference current and output same to the current source and the current sink.

8. The receiver configuration as recited in claim 7, wherein the current source supplies current values which are greater than or equal to 0 mA, the current sink supplies current values less than 0 mA.

9. The receiver configuration as recited in claim 5, wherein: the at least one digital trigger circuit at least one of (1) stores the predefined shape and the predefined time behavior of the synchronization pulse and (2) calculates the predefined shape and the predefined time behavior of the synchronization pulse; and the at least one digital trigger circuit is configured to output to the at least one digital/analog converter digital data words that correspond to the predefined shape and predefined time behavior of the synchronization pulse.

10. A receiver configuration for a control unit in a vehicle, the receiver configuration including a voltage generator to generate a synchronization pulse which includes a first voltage source, a current source and a current sink, the voltage generator to generate the synchronization pulse within predefined specification limits having a predefined shape and a predefined time behavior, and the receiver configuration configured to output the synchronization pulse for synchronization of a signal transmission via a databus to at least one sensor, wherein: the voltage generator is configured to generate the synchronization pulse via the current source and the current sink by at least one of charging and discharging a bus load as a sinusoidal oscillation; and the voltage generator includes: a first digital trigger circuit and a first digital/analog converter configured to generate, and output to the current source, a sinusoidal reference current; and a second digital trigger circuit and a second digital/analog converter configured to generate, and output to the current sink, a sinusoidal reference current.

11. A receiver configuration for a control unit in a vehicle, the receiver configuration including a voltage generator to generate a synchronization pulse which includes a first voltage source, a current source and a current sink, the voltage generator to generate the synchronization pulse within predefined specification limits having a predefined shape and a predefined time behavior, and the receiver configuration configured to output the synchronization pulse for synchronization of a signal transmission via a databus to at least one sensor, wherein: the voltage generator is configured to generate the synchronization pulse via the current source and the current sink by at least one of charging and discharging a bus load as a sinusoidal oscillation; the voltage generator includes at least one digital trigger circuit and at least one digital/analog converter configured to generate, and output to the current source and the current sink, a sinusoidal reference current; and the at least one digital trigger circuit regulates the synchronization pulse based on a zero-signal current and the bus load, a zero-signal current regulation supplying a measure for the zero-signal current and an achieved synchronization pulse amplitude supplying a measure for the bus load, the synchronization pulse amplitude being ascertainable by evaluation of the bus voltage.

12. The receiver configuration as recited in claim 11, wherein for evaluation of the bus voltage, a decision threshold and a time window are defined, the at least one digital trigger circuit configured to recognize that the synchronization pulse amplitude is too high when the synchronization pulse reaches the decision threshold at a point in time before the time window, the at least one digital trigger circuit configured to recognize that the synchronization pulse amplitude is too low when the synchronization pulse has not reached the decision threshold during a period of the synchronization pulse, and the at least one digital trigger circuit configured to recognize a correct synchronization pulse amplitude when the synchronization pulse has reached the decision threshold at a point in time within the time window.

13. A method for generating a synchronization pulse for synchronization of a subsequent signal transmission between a receiver configuration and at least one sensor via a databus in a vehicle, comprising: generating the synchronization pulse within predefined specification limits and to have a predefined shape and a predefined time behavior; and transmitting the synchronization pulse by the receiver configuration to the at least one sensor; wherein the synchronization pulse is generated as a sinusoidal oscillation including substantially a complete continuous sine wave.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 shows a schematic block diagram of a sensor configuration having a first exemplary embodiment of a receiver configuration in accordance with the present invention for a control unit in a vehicle, which generates and outputs an optimized synchronization pulse.

(2) FIG. 2 shows a schematic block diagram of a sensor configuration having a second exemplary embodiment of a receiver configuration in accordance with the present invention for a control unit in a vehicle, which generates and outputs an optimized synchronization pulse.

(3) FIG. 3 shows a schematic diagram of the shape and time characteristic of a traditional trapezoidal synchronization pulse within predefined limits.

(4) FIG. 4 shows a schematic diagram of the shape and the time characteristic of a traditional rounded trapezoidal synchronization pulse within the predefined limits.

(5) FIG. 5 shows a schematic diagram of the shape and the time characteristic of an optimized synchronization pulse in accordance with the present invention within the defined limits.

(6) FIG. 6 shows a schematic diagram of the bus voltage during a synchronization pulse optimized in accordance with the present invention.

(7) FIG. 7 shows a first schematic diagram of the bus current during a synchronization pulse optimized in accordance with the present invention.

(8) FIG. 8 shows a schematic diagram of the principle of regulation of the synchronization pulse amplitude using three synchronization pulses having different amplitudes, only the middle curve of which is within the specified limits.

(9) FIG. 9 shows a second schematic diagram of the bus current during a synchronization pulse optimized in accordance with the present invention.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

(10) As is shown in FIGS. 1 and 2, sensor configurations 1, 1 include a databus 5, at least one sensor 7 and one exemplary embodiment of a receiver configuration 3, 3 according to the present invention for a control unit in a vehicle. Receiver configurations 3, 3 according to the present invention each include a voltage generator 30, 30 for generating a synchronization pulse P.sub.sync having a first voltage source 3.1, a current source 3.5 and a current sink 3.6. According to the present invention, voltage generator 30, 30 generates a synchronization pulse P.sub.sync via current source 3.5 and current sink 3.6 by charging and/or discharging a bus load essentially as a sinusoidal oscillation.

(11) As is shown in FIG. 5, voltage generator 30, 30 generates a synchronization pulse P.sub.sync within predefined specification limits Vo, Vu having a predefined shape and predefined time characteristic. Receiver configuration 3, 3 outputs synchronization pulse P.sub.sync for synchronization of a subsequent signal transmission via a databus 5 to at least one sensor 7. In order for a synchronous bus system having one sensor 7 or multiple sensors to function, synchronization pulse P.sub.sync shown here has a certain shape and a certain time characteristic for all possible bus configurations under all possible operating conditions. As is also shown in FIG. 5, synchronization pulse P.sub.sync has an edge steepness predefined by the edge steepness of a first characteristic curve which represents lower limit Vu and the edge steepness of a second characteristic curve which represents upper limit Vo. Due to the sine shape or sinusoidal shape, synchronization pulse P.sub.sync is optimized within predefined limits Vu, Vo, in such a way that a preferably low electromagnetic emission is achievable, in particular in the spectral range of signal transmission (100 kHz to 300 kHz), which remains limited to the range of the fundamental waves of synchronization pulse P.sub.sync.

(12) As is also shown in FIGS. 1 and 2, voltage generator 30, 30 includes at least one digital trigger circuit 32, 42 and at least one digital/analog converter 34, 44, which generate and output an essentially sinusoidal reference current to current source 3.5 and current sink 3.6. The exemplary embodiments illustrated here permit a very robust implementation of synchronization pulse P.sub.sync and a reduced electromagnetic emission. The triggering of current source 3.5 and of current sink 3.6 for generating synchronization pulse P.sub.sync may also be shifted completely into the digital part of receiver configuration 3, 3, which results in an area-efficient approach due to the ever advancing scaling of the semiconductor technology.

(13) As is also shown in FIGS. 1 and 2, a voltage supply 3.2 of remaining circuits 3.3 of receiver configuration 3, 3 is decoupled from databus 5 via a switching unit 3.4 during the generation and outputting of synchronization pulse P.sub.sync, while voltage generator 30, 30 is activated to generate synchronization pulse P.sub.sync. Since voltage generator 30, 30 includes current source 3.5 and current sink 3.6, there is no need for an additional switch in series with current source 3.5 and current sink 3.6.

(14) As is also shown in FIG. 1, the first exemplary embodiment of receiver configuration 3 according to the present invention, as shown here, includes a first voltage generator 30, which has a first digital trigger circuit 42 and a first digital/analog converter 44, which generate and output an essentially sinusoidal reference current to current source 3.5, and a second digital trigger circuit 32 and a second digital/analog converter 34, which generate a generally sinusoidal reference current and output it to current sink 3.6.

(15) As is also shown in FIG. 2, the second exemplary embodiment of receiver configuration 3 according to the present invention, as shown here, includes a second voltage generator 30, which includes a joint digital trigger circuit 32 and a joint digital/analog converter 34, which generate a generally sinusoidal reference current and output it to current source 3.5 and current sink 3.6. The number of components of voltage generator 30 from FIG. 1 may be reduced by joint use of digital trigger circuit 32 and digital/analog converter 34 for current source 3.5 and current sink 3.6. Voltage generator 30 from FIG. 1 thus uses less layout area or silicon area in comparison with voltage generator 30 from FIG. 1.

(16) The shape of synchronization pulse P.sub.sync is stored either in the digital part or in digital trigger circuit 32, 42 or is calculated with the aid of an algorithm in the digital part or in digital trigger circuit 32, 42. At least one digital/analog converter 34, 44 generates from the N-bit data word a reference current, which is conducted to the databus via current source 3.5 or current sink 3.6 and charges or discharges the load applied to the databus. To generate a sinusoidal or approximately sinusoidal synchronization pulse P.sub.sync from FIG. 5, both current source 3.5 and current sink 3.6 are triggered sinusoidally or approximately sinusoidally. FIGS. 6 and 7 outline the basic sequential control for generating a synchronization pulse P.sub.sync. FIG. 6 shows a voltage pulse U.sub.sync and FIG. 7 shows a corresponding current pulse I.sub.sync. At starting point t.sub.1 of synchronization pulse P.sub.sync, current source 3.5 supplies a zero-signal current I.sub.0 from voltage supply 3.2 of receiver configuration 3, 3. The information about zero-signal current I.sub.0 is obtained by current source 3.5 from a zero-signal current re-adjustment known from the related art. At the first inflection point of voltage pulse U.sub.sync, a greatest current I.sub.sync flows from current source 3.5, and only zero-signal current I.sub.0 flows from current source 3.5 at maximum Max of voltage pulse U.sub.sync. To implement the descending edge of synchronization pulse P.sub.sync, current I.sub.sync is reduced by current source 3.5 after voltage maximum Max is reached until the current ultimately becomes zero and the current sink 3.6 starts a discharging process. At the second inflection point of voltage pulse U.sub.sync, a greatest current I.sub.sync flows into current sink 3.6 and then declines again until current source 3.5 intervenes again, and in the last phase of synchronization pulse P.sub.sync supplies current I.sub.sync at final point in time t.sub.2. Zero-signal current is in turn transferred from voltage supply 3.2 of receiver configuration 3, 3 at the final point in time t.sub.2. Current source 3.5 thus supplies current values which are greater than or equal to 0 mA during the duration t.sub.sync of synchronization pulse P.sub.sync, and current sink 3.6 supplies current values less than 0 mA.

(17) The resolution of the data word is selected for emission reasons, in such a way that synchronization pulse P.sub.sync may be imaged without any significant discontinuities. The capacitance of the bus load integrates bus current I.sub.Bus and smoothes voltage U.sub.BUS on databus 5 in this way. The bus load may vary greatly as a function of the bus operation and necessitates a certain driver capability of current source 3.5 and current sink 3.6. This means that current source 3.5 and current sink 3.6 are capable of supplying and receiving a sufficiently high current to permit the desired shape of synchronization pulse P.sub.sync without any signal collapse or signal deformation. This driver capability is an important influencing parameter in the choice of an appropriate resolution of digital/analog converter 34, 44.

(18) As is apparent from FIG. 5, requirements are made of the shape and edge steepness of synchronization pulse P.sub.sync. On the one hand, the edge steepness must not be too low since this would result in higher tolerances in the recognition time of sensors 7. This in turn may limit the maximum number of sensors 7 and may thus reduce data throughput. On the other hand, the edge steepness must not be too high since this would result in increased electromagnetic emission. Two variables which greatly influence the behavior of synchronization pulse P.sub.sync include the bus load and zero-signal current I.sub.0 of sensor 7 or of the sensors. Various bus and sensor configurations have greatly differing loads and zero-signal currents I.sub.0. Bus current I.sub.Bus and bus voltage U.sub.Bus are regulated to nevertheless be able to represent a synchronization pulse P.sub.sync within predefined limits Vu, Vo despite these great variations in bus load and zero-signal current.

(19) Digital trigger circuit 32, 42 uses the information about zero-signal current I.sub.0 from the re-adjustment of the zero-signal current and the information about achieved synchronization pulse amplitude Max to regulate synchronization pulse P.sub.sync. Knowledge of zero-signal current I.sub.0 is necessary to ensure correct transfer of zero-signal current I.sub.0 by current source 3.5 of the voltage synchronization pulse generator at the start of synchronization pulse P.sub.sync. Voltage generator 30, 30, which generates synchronization pulse P.sub.sync and includes at least one digital trigger circuit 32, 42, at least one digital/analog converter 34, 44, current source 3.5, current sink 3.6 and voltage supply 3.1 for current source 3.5 is identified as the synchronization pulse generator. Synchronization pulse amplitude Max is ascertained by the evaluation of bus voltage U.sub.Bus. A decision threshold U.sub.reg and a time window t.sub.reg are defined for evaluation of bus voltage U.sub.Bus. The at least one digital trigger circuit 32, 42 recognizes that synchronization pulse amplitude Max1 is too high when synchronization pulse P.sub.sync reaches decision threshold U.sub.reg at a point in time t.sub.reg1 which is before time window t.sub.reg. This state is represented by a first characteristic curve K1 in FIG. 8. The at least one digital trigger circuit 32, 42 recognizes that synchronization pulse amplitude Max2 is too low when synchronization pulse P.sub.sync does not reach decision threshold U.sub.reg during a period t.sub.sync of synchronization pulse P.sub.sync. In FIG. 8 this state is represented by a second characteristic curve K2. The at least one digital trigger circuit 32, 42 recognizes a correct synchronization pulse amplitude Max when synchronization pulse P.sub.sync reaches decision threshold U.sub.reg at a point in time t.sub.reg2, which is within time window t.sub.reg. This state is represented in FIG. 8 by a third characteristic curve K3. Decision threshold U.sub.reg may be monitored by a comparator, for example. If decision threshold U.sub.reg is exceeded too early, i.e., before monitoring window t.sub.reg, generated synchronization pulse P.sub.sync would then be too high. If decision threshold U.sub.reg is never exceeded, then generated synchronization pulse P.sub.sync would be too low. Only when decision threshold U.sub.reg has been exceeded in monitored time window t.sub.reg is there a synchronization pulse P.sub.sync of the correct height. In principle, the synchronization pulse amplitude may be evaluated at any point in synchronization pulse P.sub.sync, for example, even along the rising or falling edges. However, even the slightest tolerances and thus the most reliable regulation are to be expected in the vicinity of the maximum of pulse voltage U.sub.sync since the voltage here is subject to the least changes.

(20) As is shown in FIG. 9, the duration of synchronization pulse t.sub.sync is kept constant while step height S.sub.h of output current pulse I.sub.sync, based on the at least one digital/analog converter 34, 44, may be scaled according to the information from the amplitude evaluation. Step height S.sub.h is calculated by multiplying the minimum possible step height times a scaling factor. The minimum step height is obtained from the minimum outputtable current value of current source 3.5 and of current sink 3.6. The scaling factor is increased when synchronization pulse P.sub.sync is too low and is decreased when synchronization pulse P.sub.sync is too high until the correct height is reached, and decision threshold U.sub.reg is exceeded within time window t.sub.reg.

(21) Specific embodiments of the method according to the present invention for generating a synchronization pulse P.sub.sync for synchronization of a subsequent signal transmission between receiver configuration 3, 3 and at least one sensor 7 via a databus 5 in a vehicle generate synchronization pulse P.sub.sync within predefined specification limits Vo, Vu having a predefined shape and a predefined time behavior. Synchronization pulse P.sub.sync is transmitted from receiver configuration 3, 3 to the at least one sensor 7 at the start of the signal transmission between the at least one sensor 7 and receiver configuration 3, 3. In accordance with the present invention, synchronization pulse P.sub.sync is generated generally as a sinusoidal oscillation.