Coding and decoding methods with differentiated protection
09941905 ยท 2018-04-10
Assignee
Inventors
Cpc classification
H03M13/2792
ELECTRICITY
H03M13/6522
ELECTRICITY
H03M13/1102
ELECTRICITY
International classification
H03M13/00
ELECTRICITY
H03M13/15
ELECTRICITY
H03M13/29
ELECTRICITY
Abstract
A coding method with differentiated protection to protect, with a different protection efficiency, a number of groups of data in a frame to be transmitted. The invention is based for that on the use of a correcting code of the LDPC type concatenated with an algebraic correcting code. The invention also proposes a decoding method compatible with the coding method with differentiated protection.
Claims
1. A coding method with differentiated protection applied to a frame comprising a set of bits, the coding being performed at least from a first systematic correcting code, represented by a bipartite graph, called Tanner graph, comprising a plurality of first nodes, called variable nodes, said graph further comprising a plurality of second nodes, called check nodes, each variable node being connected to at least one check node by a branch, the number of branches of a variable node being called degree of the variable node, wherein each variable node is associated with a bit of a word of said first code, the variable nodes associated with the systematic bits of the word of the first code being called systematic variable nodes, said method comprising the following steps: decomposing the frame into a plurality of subframes, each having a different priority level, applying to each subframe, except for the subframe of lowest priority level, a second algebraic correcting code of predetermined efficiency, determining said predetermined efficiency as increasing when the priority level of each subframe decreases when the number of subframes is at least equal to three, applying an interleaving of the bits of all the subframes so as to perform a correlation between the systematic variable nodes of said first systematic correcting code, arranged according to the value of their degree, and the bits of each subframe, the subframes being arranged according to their priority level, and coding, using the first systematic correcting code, the frame composed of the interleaved bits of all the concatenated subframes.
2. The coding method with differentiated protection of claim 1, wherein the bits of each subframe are correlated with the systematic variable nodes of said first systematic correcting code, arranged in ascending order of the value of their degree according to a descending order of the priority levels of the subframes.
3. The coding method with differentiated protection of claim 1, wherein the bits of each subframe are correlated with the systematic variable nodes of said first systematic correcting code, arranged in ascending order of the value of their degree according to an ascending order of the priority levels of the subframes.
4. The coding method with differentiated protection of claim 3, wherein the first systematic correcting code is constructed such that the proportion of systematic variable nodes of a degree equal to the maximum degree is equal to the ratio between the number of bits of the subframe of highest priority level and the number of bits of a word of said first systematic correcting code.
5. The coding method with differentiated protection of claim 1, wherein the decomposition of the frame into subframes is performed by re-ordering the bits of the frame according to their priority level.
6. The coding method with differentiated protection of claim 5, wherein the priority level of a bit is defined as a function of the criticality of the information associated with the bit, of the weight of the bit or of the refresh frequency of the information associated with the bit.
7. The coding method with differentiated protection of claim 6, wherein the data transmitted in the frame are data of a satellite navigation message generated by a satellite radio-navigation system.
8. The coding method with differentiated protection of claim 1, wherein the second algebraic correcting code is a BCH code.
9. A decoding method with differentiated protection applied to a coded frame comprising a set of bits coded using the coding method with differentiated protection according to claim 1, the decoding method comprising the following steps: performing a first decoding of the coded frame using a first decoding algorithm of a first systematic correcting code based on the use of a bipartite graph, so as to obtain a first decoded frame, decomposing the first decoded frame into subframes, each subframe containing the bits corresponding to the systematic variable nodes arranged according to the value of their degree, the subframes being arranged according to their priority level, performing a second decoding of each subframe, except the frame of lowest priority level, using a second decoding algorithm of a second algebraic correcting code of predetermined efficiency, and determining said predetermined efficiency as increasing when the priority level of each subframe decreases, when the number of subframes is at least equal to three.
10. The decoding method with differentiated protection of claim 9, further comprising a step of concatenation of the subframes in a second decoded frame.
11. The decoding method with differentiated protection of claim 9, wherein the second correcting code is an error correcting and detecting code, said decoding method further comprising the following steps: during the second decoding of each subframe, detecting whether the subframe is correctly decoded or not, if the subframe is correctly decoded, i. coding with said second algebraic correcting code, each decoded subframe to obtain a coded subframe, ii. applying a second iteration of the first decoding by specifying, to the decoding algorithm of said first systematic correcting code, a maximum likelihood for said bits of each coded subframe.
12. The decoding method with differentiated protection of claim 9, wherein the second algebraic correcting code is a BCH code.
13. The decoding method with differentiated protection of claim 9, wherein the decoding of said first systematic correcting code and the decoding of the second algebraic correcting code are performed jointly.
14. A coding device with differentiated protection, the coding being applied to a frame comprising a set of bits, the coding being performed at least from a first systematic correcting code represented by a bipartite graph, called Tanner graph, comprising a plurality of first nodes, called variable nodes, said graph further comprising a plurality of second nodes, called check nodes, each variable node being connected to at least one check node by a branch, the number of branches of a variable node being called degree of the variable node, wherein each variable node is associated with a bit of a word of said first code, the variable nodes associated with the systematic bits of the word of the first code being called systematic variable nodes, the coding device being configured to execute the following steps: decomposing the frame into a plurality of subframes, each having a different priority level, applying to each subframe, except for the subframe of lowest priority level, a second algebraic correcting code of predetermined efficiency, determining said predetermined efficiency as increasing when the priority level of each subframe decreases when the number of subframes is at least equal to three, applying an interleaving of the bits of all the subframes so as to perform a correlation between the systematic variable nodes of said first systematic correcting code, arranged according to the value of their degree, and the bits of each subframe, the subframes being arranged according to their priority level, and coding, using the first systematic correcting code, the frame composed of the interleaved bits of all the concatenated subframes.
15. A satellite radio-navigation signal transmitter comprising a coding device according to claim 14 for coding, in a differentiated manner, satellite radio-navigation messages.
16. A decoding device with differentiated protection, the decoding being applied to a coded frame comprising a set of bits coded using a coding, the decoding device being configured to execute the steps of: performing a first decoding of the coded frame using a first decoding algorithm of a first systematic correcting code based on the use of a bipartite graph, to obtain a first decoded frame, decomposing the first decoded frame into subframes, each subframe containing the bits corresponding to the systematic variable nodes arranged according to the value of their degree, the subframes being arranged according to their priority level, performing a second decoding of each subframe, except the frame of lowest priority level, using a second decoding algorithm of a second algebraic correcting code of predetermined efficiency, and determining said efficiency as increasing when the priority level of each subframe decreases, when the number of subframes is at least equal to three.
17. A satellite radio-navigation signal receiver comprising a decoding device according to claim 16 for decoding, in a differentiated manner, satellite radio-navigation messages.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) Other features and advantages of the present invention will become more apparent on reading the following description in relation to the attached drawings which represent:
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DETAILED DESCRIPTION
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(11) The method receives as input a frame T comprising a set of bits and produces at its output a coded frame T.sub.c for it to be transmitted over a radio channel, for example a satellite transmission channel.
(12) According to a first step 101, a priority level is assigned to the data transmitted in the frame T.
(13) The priority level of each bit is chosen as a function of the importance of the information contained in that bit. In other words, a high priority level is assigned to the bits which have to be received as a priority. A high priority level means that the associated bits must be protected by a correcting code of lower protection efficiency in order to increase the level of protection on these bits to thus increase the probability of them being correctly received after transmission through a radio channel.
(14) Conversely, a low priority level can be assigned to the bits which do not require a high probability of correct reception and which can be transmitted without the addition of protection by a correcting code or with a protection using a correcting code of high protection efficiency.
(15) In the context of the application of the invention to a GNSS data frame, the priority level can be assigned to the bits of the frame by taking into account the following constraints. Firstly, the priority level can be set as a function of the type of information to be transmitted. In effect, not all the information to be transmitted has an equal level of criticality.
(16) Secondly, a higher priority level can be assigned to the high-order bits of the quantized data in order to differentiate the protection to be applied as a function of the level of quantization of the data. Conversely, the low-order bits can be associated with a low priority level because they are less significant and do not therefore require a high probability of correct reception.
(17) Finally, some information items are repeated over time with a greater or lesser refresh frequency. A high priority level can be assigned to the information items which are never repeated or are which repeated with a low frequency. Conversely, the information items repeated with a high frequency can be assigned a low priority level.
(18) The examples of assignment of priority levels to the bits of the frame T given above are given in an illustrative and nonlimiting manner. A person skilled in the art seeking to apply the invention to a particular standard will be able to define other strategies for managing priority levels according to the requisite needs. The general idea in the application of the step 101 is to define a high priority level for the bits which require a high probability of correct reception and to define a low priority level for the bits which have fewer constraints on their correct reception rate.
(19) The priority level can be an integer varying over a given range, for example a strictly positive integer between 0 and M, 0 being the lowest priority level and M being the highest priority level.
(20) In a second step 102, the frame T is decomposed into N.sub.t subframes by grouping together, in each subframe, the bits of equivalent priority level. For example, if N.sub.t is equal to two, step 102 consists in grouping together, in a first subframe, the highest priority level bits, and, in a second subframe, the lowest priority level bits. If N.sub.t is greater than two, the bits are arranged as a function of their ascending priority level and N.sub.t subframes are constructed each comprising the bits having an identical or close priority level. The decomposition 102 of the frame T into subframes can be done by setting identical lengths for the subframes or by grouping together, in a subframe, the bits having a same priority level, in which case the subframes can have different lengths.
(21) In a third step 103, the subframes obtained are demultiplexed to be each processed by a first distinct channel coding operation for each subframe. The example of
(22) The subframe ST.sub.0 grouping together the bits of lowest priority levels is not subjected to any channel coding operation initially and is directly transmitted to a multiplexing step 106.
(23) The subframe ST.sub.1 grouping together the bits of highest priority levels is transmitted to a channel coding step 104 which consists in applying to the subframe ST.sub.1 an algebraic correcting code, for example a BCH correcting code.
(24) If a number N.sub.t, greater than two, of subframes is generated, an algebraic correcting code of BCH code type is applied to the N.sub.t1 subframes comprising the bits of highest priority levels. Each correcting code is applied with a different protection efficiency that increases as the average priority level of each subframe decreases. The subframe of lowest average priority level is transmitted without coding directly to the multiplexing step 106.
(25) By way of example, if three subframes are considered, the coding efficiencies used can be, for example, equal to 0, 2/3 and 3/4, respectively.
(26) The set of subframes is then multiplexed, in a step 105, to reconstruct a frame of the same size as the frame T received as input for the first step 101. This reconstructed frame is then coded, in a step 106, by a second correcting code. The second correcting code is a correcting code of the LDPC (Low Density Parity Code) code type or any correcting code of the same type which can be represented using a bipartite graph called Tanner graph.
(27) The reference work [1], and in particular Section 5 entitled Low-density parity-check codes, describe in detail the construction and the representation of a correcting code of LDPC type using a bipartite graph called Tanner graph.
(28) A Tanner graph is composed of two types of nodes. A first type of node is called variable node, or even code-bit node according to usages. The variable nodes are each associated with a bit of a code word. There are therefore as many variable nodes as there are bits in the code word to be decoded. Each variable node is connected to one or a number of check nodes, or constraint nodes. The number of check nodes is equal to the number of rows of the parity matrix of the correcting code. The number of variable nodes is equal to the number of columns of the parity matrix. A check node of index i is connected to a variable node of index j if, and only if, the element of the row i and of the column j of the parity matrix of the code is equal to 1. A connection between a variable node and a check node is called a branch. The number of connections starting from a node is the degree of a node.
(29) The correcting code used in the step 106 to code the multiplexed frame must also be a systematic correcting code. This type of code is for example described in Section 6.5.2 of the work [1] which relates to the codes called Irregular Repeat-Accumulate Codes, also called IRA codes. Such codes have the particular feature of being generated from a parity matrix of the form H=[H.sub.U H.sub.P]. H.sub.P is a square matrix of size mm where m is the number of check nodes of the code. H.sub.U is a matrix with m rows and n-m columns, with R=m/n being the efficiency of the code. H.sub.P is a so-called bidiagonal matrix, the form of which is given on page 269, relation (6.4) of the work [1]. As indicated above, the number of variable nodes is equal to the number of columns of the parity matrix H. In the case of systematic IRA codes, it is possible to distinguish the variable nodes associated with the columns of the matrix H.sub.U and the variable nodes associated with the columns of the matrix H.sub.P. The latter correspond to the systematic bits of the code word and will hereinafter be called systematic variable nodes. The systematic bits are the useful bits at the input of the coding operation, unlike the parity bits which are the redundancy bits added by the coding operation. Alternatively, the parity matrix H can also take the form H=[H.sub.P H.sub.U], the choice of the order between the matrices H.sub.P and H.sub.U being determined by convention.
(30) The description will now return to describing the coding method according to the invention. In an additional step 105, executed after the step 104 and before the step 106, the subframes coded by application of an algebraic correcting code in the step 104 are interleaved using an interleaver, the function of which is to correlate the bits of the coded subframes with the systematic variable nodes of the bipartite graph of the LDPC systematic correcting code. The correlation depends, on the one hand, on the average priority level of the subframe and, on the other hand, on the degree of the systematic variable nodes.
(31) The introduction of the step 105 is based on the observation that the variable nodes with the most connection in a Tanner graph, that is to say the nodes of highest degree, are those for which the bits of the code word associated with these nodes have the greatest probability of being false after the decoding of the code word.
(32) The invention exploits this observation to correlate the bits of the coded subframes and the systematic variable nodes of the Tanner graph of the LDPC code so as to optimize the overall performance levels in decoding the coded frame T.sub.c as output from the coding operation 106 by a systematic correcting code of the LDPC type.
(33) The step 105 thus consists initially in arranging the systematic variable nodes of the Tanner graph of the LDPC code used in the step 106 according to an order, ascending or descending, of their degrees. This step can be performed from the parity matrix H of the code since the systematic variable nodes correspond to the first (or last) n-m columns of the matrix H and the degree of each variable node is given by the sum of the values of the column of the matrix H associated with the variable node.
(34) Secondly, the coded subframes and the non-coded subframe are correlated with the systematic variable nodes of the LDPC code as a function of the average priority level of the subframe and of the degrees of the variable nodes.
(35) To do this, a first strategy consists in associating the subframes of highest priority levels with the systematic variable nodes of lowest degrees. Thus, a higher probability of correct decoding is favoured for the highest priority subframes.
(36) In the example of
(37) In order to better explain the operation performed by the step 105, a numerical example is described which is not necessarily representative of a real situation but which makes it possible to understand how to implement the step 105.
(38) It is assumed for the following that the frame T to be coded is demultiplexed into two subframes. The highest priority subframe ST.sub.1 contains, after coding 104, 10 bits, and the lowest priority subframe ST.sub.0 contains 5 bits. A vector V.sub.deg is defined that is of the same size as the frame T at the input of the LDPC coding step 106. The size of the vector V.sub.deg and of the frame T is, in this example, equal to 15. The vector V.sub.deg contains the indices of the systematic variable nodes sorted in ascending order of their degrees. For example, the vector V.sub.deg is equal to [5; 1; 15; 6; 12; 8; 14; 3; 7; 11; 2; 4; 9; 13; 10]. The correlation operation 105 then consists in assigning the 10 bits of the highest priority subframe ST.sub.1 to the first 10 systematic variable nodes identified in the vector V.sub.deg, namely the nodes of indices [5; 1; 15; 6; 12; 8; 14; 3; 7; 11]. The 5 bits of the lowest priority subframe ST.sub.0 are assigned to the variable nodes of indices [2; 4; 9; 13; 10].
(39) The above description of the step 105 can easily be extended to a number of subframes greater than two.
(40) A second strategy for implementing the step 105 consists, on the contrary, in associating the subframes of highest priority levels with the systematic variable nodes of highest degrees. According to this second strategy, it is considered that the subframes of highest priority levels are already protected by the addition of an algebraic correcting code (step 104) and the aim is to favour, in the second coding step 106, this time the subframe ST.sub.0 of lowest priority level which has not been protected by an algebraic correcting code.
(41) Furthermore, this second strategy offers an advantage in the case where the decoding is performed in two iterations as will be explained in more detail hereinbelow in the paragraph associated with
(42) According to a variant of the second strategy for implementing the step 105, it is possible to construct an LDPC correcting code by setting the number of systematic variable nodes for which the degree is equal to the maximum degree out of the set of variable nodes. For that, a maximum degree value d.sub.max, a possible typical value being a maximum degree equal to ten, is first of all set. This parameter influences the error floor level in the decoding of the LDPC code but also the signal-to-noise ratio obtained for a given error rate by the decoding algorithm. The higher the maximum degree, the lower the error floor will be, but the higher the signal-to-noise ratio from which the decoding algorithm begins to decode will be.
(43) A proportion of nodes of degree d.sub.max is then set, this proportion being exactly equal to the ratio between the number of bits of the coded subframe of highest priority level and the number of bits of an LDPC code word. The proportion of the other variable nodes is defined according to principles well known to those skilled in the art and described in particular in the reference work [1], in Sections 5 and 6. Using known methods, it is possible to generate a parity matrix for the code which is compatible with the constraints set above. In this way, the bits of the subframe of highest priority level will be associated only with systematic variable nodes of degrees equal to the maximum degree.
(44) One advantage of this variant is that it makes it possible to limit the proportion of variable nodes of maximum degrees which makes it possible to improve the error floor on the error rate curve obtained after decoding. In effect, according to this variant, the proportion of variable nodes of maximum degrees is limited to the proportion of number of bits of the coded subframe of highest priority level out of all the bits.
(45) The variant described above can also be envisaged by this time setting the number of systematic variable nodes for which the degree is equal to the lowest degree out of all the variable nodes.
(46) The correlation step 105 makes it possible to generate a frame T from the different subframes. The frame T is then coded 106 by an LDPC IRA systematic correcting code according to a coding method known to those skilled in the art, described for example in Section 6.5.2 of the reference work [1].
(47) The choice of the coding efficiencies of the BCH algebraic correcting code or codes and of the LDPC correcting code can be made so as to obtain an overall coding efficiency between the input frame T and the output frame T.sub.c which is equal to a given efficiency.
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(49) The frame T.sub.c is received as input for the decoding method according to the invention after having been transmitted through an imperfect propagation channel, for example a satellite or radio transmission channel, which potentially generates errors on the bits of the frame T.sub.c when it is received by a receiver.
(50) In a first step 201 of the decoding method, the received frame is decoded using a decoding algorithm of a code of the LDPC type. The decoding algorithm is based on the Tanner graph generated from the parity matrix of the LDPC code chosen to implement the coding method. One possible decoding algorithm can be one of those described in Section 5 of the reference work [1] or any other equivalent algorithm based on a bipartite Tanner graph. Such an algorithm is not described in detail in this document because those skilled in the art, specializing in correcting codes, will know to refer to the work [1] or any other reference work in the field to implement this algorithm.
(51) In a second step 202, a de-interleaving operation is performed on the decoded frame obtained at the output of the first decoding step 201. The de-interleaving operation consists of the reverse operation to that implemented in the step 105 of the coding method. In other words, in the step 105 of the coding method, the interleaving function implemented to correlate the bits of the subframes according to their priority levels with the systematic variable nodes of the LDPC code according to their degrees is saved and transmitted to the receiver responsible for implementing the decoding method according to the invention.
(52) The de-interleaving operation executed by the step 202 produces as output N.sub.t subframes of different priority levels, which correspond to the N.sub.t subframes generated during the coding method.
(53) Returning to the numeric example described to illustrate the step 105 of the coding method according to the invention, the step 202 consists in generating the subframes ST.sub.1 and ST.sub.0 as follows. The subframe ST.sub.1 contains the bits which have the following indices in the frame at the output of the decoding step 201: [5;1;15; 6; 12; 8; 14; 3; 7; 11]. The subframe ST.sub.0 contains the bits which have the following indices: [2; 4; 9; 13; 10].
(54) Each subframe produced at the output of the step 202 is then subjected, apart from the subframe ST.sub.0 of lowest priority level, to a decoding step 203 using a decoding algorithm of an algebraic correcting code of BCH code type which consists of the reverse operation of the coding operation performed in the step 104 of the coding method according to the invention. One possible decoding algorithm is, for example, the Berlekamp-Massey algorithm described in Section 3.3.2 of the reference work [1].
(55) The decoded subframes ST.sub.1 as well as the subframe ST.sub.0 of lowest priority level are then concatenated 204 to generate a single frame and then a final step 205 of de-interleaving is applied to perform the reverse operation to the interleaving operation executed in the step 101 of the coding method according to the invention which aims to order the bits of the frame T to be coded as a function of their priority level.
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(57) According to this variant, the steps 201 to 205 of the decoding method described in
(58) If the correct decoding indicator P is positive, a second decoding iteration is then executed. In this second iteration, the coding step(s) 213 by an algebraic correcting code of the subframe(s) of high priority levels are reiterated identically to the coding step 104 of the method described in
(59) In an additional step 211, the correct decoding indicator P supplied by the decoding algorithm 203 of the BCH code is used to supply additional information to the decoding algorithm 201 of the LDPC code. This information consists in providing significant reliability, in the second iteration of the decoding 201 of the LDPC code, to the bits which have been correctly decoded by the BCH code. The significant reliability can be introduced by saturating, in the Tanner graph of the LDPC code, with a maximum value, the likelihood information items associated with the bits which have been correctly decoded by the decoding algorithm of the BCH code 203. Thus, this second iteration makes it possible to improve the correction capacity of the decoding algorithm of the LDPC code 201 and in particular on the bits of the subframe ST.sub.0 not protected by a BCH code.
(60) In other words, the step 211 consists in providing the decoding algorithm of the LDPC code 201 with a vector of likelihoods of the bits produced as output of the BCH coding step 213 in which the values are saturated with maximum values. For example, if the maximum possible value of a likelihood is equal to 50, the likelihoods supplied in the step 211 are equal to +50 for a bit equal to 1 and to 50 for a bit equal to 0. The term likelihood is well known in the field of correcting code decoding algorithms, it denotes a flexible information item associated with a bit, in other words an information item on the probability of its value. For example, if the likelihood values vary between 50 and +50, the value 50 corresponds to a high certainty that the bit is equal to 0, the value +50 corresponds to a high certainty that the bit is equal to 1 and the intermediate values correspond to less high probabilities. The value 0 corresponds to an equal probability of the bit being at 0 or at 1. Because of the correct decoding information item, it is known that the bits at the output of the BCH coding step 213 are correct, so it is possible to saturate their likelihood values with maximum values as absolute value.
(61) When the BCH decoder 203 does not correctly decode a subframe on the 1.sup.st iteration, in other words when the indicator P indicates a bad decoding, the 2.sup.nd iteration of the algorithm is not implemented.
(62) The step 212 of interleaving and of correlation of the likelihood vector (associated with the bits produced by the BCH coding step 213) with the systematic variable nodes of the LDPC code is similar to the step 105 of the coding method described in
(63) The second variant of the decoding method according to the invention, which includes a second decoding iteration, is particularly advantageous when the bits of the subframes of highest priority levels are associated with the systematic variable nodes of highest degrees. In effect, in the second iteration, the bits of the highest priority subframes, which are protected by a BCH code, benefit from a significant reliability because of the correct decoding information supplied by the BCH decoder on the 1.sup.st decoding iteration. Since these bits are associated with the variable nodes of highest degrees which are the nodes which exhibit a greater probability of error because of their numerous connections, the second decoding iteration will substantially improve the decoding of the lowest priority subframe (that which is not protected by a BCH code) since the latter is associated with the variable nodes of lowest degrees.
(64) If, conversely, the bits of the lowest priority subframe are associated with the variable nodes of highest degrees and the bits of the subframes protected by the BCH code are associated with the variable nodes of lowest degrees, the correct decoding information item supplied by the BCH decoder will improve the reliability on the variable nodes of lowest degrees, which is less advantageous because, naturally, the variable nodes of lowest degrees are less connected and have a lower probability of error than the variable nodes of highest degrees.
(65) According to yet another variant (not described in the figures), the decoding algorithm 203 of the BCH code can be directly incorporated in and merged with the decoding algorithm 201 of the LDPC code.
(66) For that, an overall parity matrix associated with the coding method according to the invention is generated from the respective parity matrices of the BCH code and of the LDPC code. The first rows of the overall parity matrix correspond to the parity equations of the BCH code. The overall decoding algorithm 201 can then be executed directly in the form of a decoding algorithm of an LDPC code.
(67) When the decoding method operates in two iterations, on completion of the first iteration, the parity equations on the part of the parity matrix which corresponds to the BCH code are checked and the syndromes associated with these equations are calculated according to a principle known in the field of the decoding algorithms of BCH codes. If the syndromes are nil, a second decoding iteration is performed in the same way as that described in
(68) By performing the LDPC decoding and the BCH decoding jointly via a single decoding algorithm, the specific BCH decoding step 203 is eliminated.
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(70) The curve 401 represents the bit error rate measured after decoding on the highest priority subframe ST.sub.1.
(71) The curve 402 represents the bit error rate measured after decoding on the lowest priority subframe ST.sub.0.
(72) The curve 403 represents the frame error rate measured only on the lowest priority subframes ST.sub.0.
(73) The curve 404 represents the frame error rate measured only on the highest priority subframes ST.sub.0.
(74) The curve 405 represents the frame error rate measured only on the lowest priority subframes ST.sub.0 with a decoding applied according to the variant embodiment described in
(75) The different curves represented in
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(77) The coder 500 according to the invention receives as input a frame T of bits to be coded and produces as output a frame T.sub.c of coded bits. The coder 500 comprises different modules configured to execute the steps of the coding method described in
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(79) The decoder 600 according to the invention receives as input a frame T.sub.c of coded bits and produces as output a frame T of decoded bits. The decoder 600 comprises different modules configured to execute the steps of the decoding method described in
(80) The decoder 600 can comprise other modules for executing the additional steps described in the variant of the decoding method illustrated in
(81) The different modules described in
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(84) The modules of the coder and of the decoder according to the invention can be implemented from hardware and/or software elements. To this end, the invention can notably be implemented as a computer program comprising instructions for the execution thereof. The computer program can be stored on a processor-readable storage medium. The medium can be electronic, magnetic, optical or electromagnetic.
(85) In particular, the invention as a whole or each module of the coder or of the decoder according to the invention can be implemented by a device comprising a processor and a memory. The processor can be a generic processor, a dedicated processor, an application-specific integrated circuit (also known by the acronym ASIC), or a field-programmable gate array (also known by the acronym FPGA).
(86) The device can use one or more dedicated electronic circuits or a general-purpose circuit. The technique of the invention can be implemented on a reprogrammable computation machine (a processor or a microcontroller for example) executing a program comprising a sequence of instructions, or on a dedicated computation machine (for example a set of logic gates like an FPGA or an ASIC, or any other hardware module).
(87) According to one embodiment, the device comprises at least one computer-readable storage medium (RAM, ROM, EEPROM, flash memory or any other memory technology, CD-ROM, DVD or another optical disc medium, magnetic cassette, magnetic tape, magnetic storage disc or another storage device or another non-transient computer-readable storage medium) coded with a computer program (that is to say a number of executable instructions) which, when it is executed on a processor or a number of processors, performs the functions of the embodiments of the invention described previously.
(88) By way of example of a hardware architecture suitable for implementing the invention, a device according to the invention can comprise a communication bus to which are linked a central processing unit or microprocessor (CPU), a read-only memory (ROM) that can include the programs necessary for the implementation of the invention; a random access memory or cache memory (RAM) comprising registers suitable for storing variables and parameters created and modified during the execution of the abovementioned programs; and a communication or I/O interface (I/O being the acronym for Input/Output) suitable for transmitting and receiving data.
(89) The reference to a computer program which, when it is run, performs any one of the functions described previously, is not limited to an application program running on a single host computer. On the contrary, the terms computer program and software are used here in a general sense to refer to any type of computer code (for example, application software, micro software, micro code, or any other form of computer instruction) which can be used to program one or more processors to implement aspects of the techniques described here. The computing means or resources can notably be distributed (Cloud computing), possibly according to peer-to-peer technologies. The software code can be executed on any appropriate processor (for example, a microprocessor) or processor core or a set of processors, whether provided in a single computation device or distributed between a plurality of computation devices (for example as are possibly accessible in the environment of the device). The executable code of each program allowing the programmable device to implement the processes according to the invention can be stored, for example, on a hard disc or in read-only memory. In general, the program or programs will be able to be loaded into one of the storage means of the device before being executed. The central processing unit can control and direct the execution of the instructions or portions of software code of the program or programs according to the invention, instructions which are stored on the hard disc or in the read-only memory or else in the other abovementioned storage elements.
REFERENCES
(90) [1] Channel codes, classical and modern, William E. Ryan, Shu Lin, Cambridge university press.