TRANSMISSION SYSTEM AND TRANSMISSION METHOD FOR TRANSMITTING DATA AND ENERGY VIA A TWO-WIRE LINE

Abstract

In examples, a transmission system for transmitting data and energy, with a master-module, at least one slave-module, and a two-wire line between the master-module and the slave-module for bidirectional data transmission between the master-module and the slave-module and for energy transmission from the master-module to the slave-module. Examples provide for the transmission system to be switchable be-tween several operating states, the operating states preferably differing with regard to energy transmission and/or with regard to data transmission. Furthermore, examples include an adapted master-module, a slave-module and an associated operating method.

Claims

1-28. (canceled)

29. A transmission system for transmission of data and energy, with a) a master-module, b) at least one slave-module, and c) a two-wire line between the master-module and the slave-module for bidirectional data transmission between the master-module and the slave-module and for energy transmission from the master-module to the slave-module, wherein d) the transmission system is switchable between several operating states.

30. The transmission system according to claim 29, wherein the operating states differ with regard to at least one of the following: energy transmission; and data transmission.

31. The transmission system according to claim 29, wherein the transmission system is switchable between at least two of the following operating states: a) a first operating state for energy transmission from the master-module to the at least one slave-module via the two-wire line, b) a second operating state for data transmission from the master-module to the at least one slave-module via the two-wire line, and c) a third operating state for data transmission from the at least one slave-module to the master-module via the two-wire line.

32. The transmission system according to claim 31, wherein at least one of: in the first operating state no data transmission takes place from the master-module to the at least one slave-module, in the second operating state no energy transmission takes place from the master-module to the at least one slave-module, and in the third operating state also an energy transmission takes place from the master-module to the at least one slave-module.

33. The transmission system according to claim 31, wherein a) the energy transmission from the master-module to the at least one slave-module is temporarily restricted or interrupted in the second operating state during the data transmission from the master-module to the at least one slave-module, and b) the at least one slave-module comprises an energy store in order to supply the slave-module with the energy required for operation during the restriction or interruption of the energy transmission from the master-module in the second operating state, and c) the at least one slave-module comprises a discharge protection in order to prevent excessive discharge of the energy store during the restriction or interruption of the energy transmission from the master-module in the second operating state.

34. The transmission system according to claim 29, wherein the master-module and the at least one slave-module are configured to transmit data from the at least one slave-module to the master-module by load modulation via the two-wire line.

35. The transmission system according to claim 34, wherein a) the at least one slave-module comprises a current modulator in order to modulate a load current provided by the master-module via the two-wire line corresponding to the data to be transmitted, and b) the master module comprises a current demodulator in order to demodulate the load current provided by the slave-module and to determine the data contained therein.

36. The transmission system according to claim 35, wherein the current modulator in the at least one slave-module comprises at least one current pulse generator which modulates the load current provided via the two-wire line in the form of pulses, so that the load current comprises current pulses corresponding to the data to be transmitted.

37. The transmission system according to claim 36, wherein a) the current modulator in the at least one slave-module comprises several current pulse generators which are connected in parallel, and b) the current pulse generators connected in parallel modulate the load current provided via the two-wire line differently, so that the load current is configured to show different current pulses.

38. The transmission system according to claim 36, wherein the current pulse generator in the at least one slave-module comprises at least one of the following components: a) a switching element, the switching element being connected between the two lines of the two-wire line in order to modulate the load current which is provided by the master-module via the two-wire line, b) a current limiter in order to limit the load current when the transistor switches through, and c) a microprocessor for controlling the transistor according to the data to be transmitted from the slave-module to the master-module.

39. The transmission system according to claim 35, wherein the current demodulator in the master-module comprises a current pulse detector in order to detect the current pulses of the load current.

40. The transmission system according to claim 39, wherein the current pulse detector in the master-module comprises at least one of the following components: a) a filter in order to pass through the rapidly varying current changes of the load current caused by the information-containing current pulses, and to attenuate the slowly varying current changes of the load current, the filter outputting a load current signal, b) an amplifier for amplifying the load current signal filtered by the filter, c) a detector for comparing the load current signal with at least one predetermined level, and d) a pre-state memory for temporarily storing a pre-state of the load current, wherein the detector compares the current state of the load current signal with the pre-state of the load current signal stored in the pre-state memory.

41. The transmission system according to claim 29, wherein the master-module comprises at least one of the following components for the data transmission to the at least one slave-module: a) a controllable switch for switching the energy transmission from the master-module to the at least one slave-module during the data transmission from the master-module to the at least one slave-module, b) an output circuit for generating voltage pulses on the two-wire line corresponding to the data to be transmitted to the at least one slave-module, and c) a microprocessor for providing the data to be transmitted to the slave module and for controlling the controllable switch or the output circuit corresponding to the data to be transmitted to the at least one slave-module.

42. The transmission system according to claim 29, wherein the at least one slave-module comprises a voltage detector for detecting the voltage pulses transmitted by the master-module via the two-wire line.

43. The transmission system according to claim 29, wherein a) the master-module and the at least one slave-module have a common electrical reference potential, or b) the transmission system is configured as a bus system, so that several slave-modules connected in parallel are connectable to the master-module via the two-wire line.

44. The transmission system according to claim 29, wherein at least one of: a) the master-module comprises a controllable changeover switch which connects the two-wire line in the master-module either to a supply voltage or to a receiver, b) the master-module comprises a controllable switch between the supply voltage and the changeover switch in order to transmit voltage pulses via the two-wire line, c) the slave module contains a voltage detector to detect the voltage pulses sent by the master-module via the two-wire line, and d) the slave-module comprises a current pulse generator to generate current pulses for the data transmission from the slave-module to the master-module.

45. The transmission system according to claim 44, wherein the transmission system is switchable between at least two of the following operating states: a) a first operating state for energy transmission from the master-module to the slave-module, wherein the changeover switch in the master-module connects the two-wire line to the supply voltage and the switch is closed so that the supply voltage is connected to the two-wire line and supplies the slave-module with current via the two-wire line, b) a second operating state for data transmission from the master-module to the slave-module, wherein the changeover switch in the master-module connects the two-wire line to the supply voltage and the switch modulates the supply voltage corresponding to the data to be transmitted, and c) a third operating state for data transmission from the slave-module to the master-module, wherein the switch in the master-module connects the two-wire line to the receiver and the receiver in the master-module receives the data sent by the slave-module via the two-wire line.

46. The transmission system according to claim 44, wherein a) the receiver in the master-module comprises a transistor, which is connected with its base to the two-wire line via the changeover switch, b) the transistor of the receiver in the master-module is connected between the supply voltage and ground, and c) a current limiter is arranged in the master-module between the supply voltage and the transistor.

47. A master-module for a transmission system according to claim 29, wherein the master-module is switchable between several operating states, the operating states differing with regard to at least one of the following: the energy transmission; and the data transmission.

48. The master-module according to claim 47, wherein the master-module is switchable between at least two of the following operating states: a) the first operating state for energy transmission from the master-module to the at least one slave-module via the two-wire line, b) the second operating state for data transmission from the master-module to the at least one slave-module via the two-wire line, and c) the third operating state for data transmission from the at least one slave-module to the master-module via the two-wire line.

49. The master-module according to claim 48, wherein the master-module comprises at least one of the following components: a) the current demodulator to demodulate the load current provided by the master-module via the two-wire line and to determine the data contained therein, b) the filter in order to pass the rapidly varying current changes of the load current caused by the information-containing current pulses, and to attenuate the slowly varying current changes of the load current, the filter outputting a load current signal, c) the amplifier for amplifying the filtered load current signal, d) the detector for comparing the load current signal with at least one predetermined level, e) the pre-state memory for temporarily storing a pre-state of the filtered load current determined by the detector, wherein the detector compares the current state of the load current signal with the pre-state of the load current signal stored in the pre-state memory, f) the controllable switch for switching the energy transmission from the master-module to the at least one slave-module during the data transmission from the master-module to the at least one slave-module, g) the output circuit for generating voltage pulses on the two-wire line corresponding to the data to be transmitted to the at least one slave-module, and h) the microprocessor for providing the data to be transmitted to the at least one slave-module and for controlling the transistor or the output circuit corresponding to the data to be transmitted to the at least one slave-module.

50. The master-module according to claim 47, wherein at least one of: a) the master-module comprises a controllable changeover switch which connects the two-wire line in the master-module either to a supply voltage or to a receiver, b) the master-module comprises a controllable switch between the supply voltage and the changeover switch in order to transmit voltage pulses via the two-wire line, c) the slave-module contains a voltage detector to detect the voltage pulses sent by the master-module via the two-wire line, and d) the slave module comprises a current pulse generator to generate the current pulses for the data transmission from the slave-module to the master-module.

51. The master-module according to claim 50, wherein the transmission system is switchable between at least two of the following operating states: a) a first operating state for energy transmission from the master-module to the slave-module, wherein the changeover switch in the master-module connects the two-wire line to the supply voltage and the switch is closed so that the supply voltage is connected to the two-wire line and supplies the slave-module with current via the two-wire line, b) a second operating state for data transmission from the master-module to the slave-module, wherein the changeover switch in the master-module connects the two-wire line to the supply voltage and the switch modulates the supply voltage corresponding to the data to be transmitted, and c) a third operating state for data transmission from the slave-module to the master-module, wherein the switch in the master-module connects the two-wire line to the receiver and the receiver receives the data sent by the slave-module via the two-wire line.

52. The master module according to claim 50, wherein a) the receiver in the master-module comprises a transistor, which is connected with its base to the two-wire line via the changeover switch, b) the transistor of the receiver in the master-module is connected between the supply voltage and ground, and c) a current limiter is arranged in the master-module between the supply voltage and the transistor.

53. The master module according to claim 47, wherein a) the master-module comprises a controllable first switch which, depending on its controlling, optionally connects the two-wire line to a supply voltage or disconnects it from the supply voltage, b) the controllable first switch is closed for an energy transmission from the master-module to the slave-module, c) the controllable first switch is closed and opened for a data transmission from the master-module to the slave-module in time with the data to be transmitted, and d) the controllable first switch is opened for a data transmission from the slave-module to the master-module.

54. The master module according to claim 53, wherein a) the master-module comprises a controllable second switch which, depending on its controlling, optionally connects the two-wire line to the supply voltage via a current limiter or disconnects it from the supply voltage, b) the controllable second switch is opened for an energy transmission from the master-module to the slave-module, c) the controllable second switch is opened for a data transmission from the master-module to the slave-module, and d) the controllable first switch is closed for a data transmission from the slave-module to the master-module.

55. A slave-module for a transmission system according to claim 29, wherein the slave-module is switchable between several operating states, the operating states differing with regard to at least one of the following: the energy transmission; and the data transmission.

56. The slave-module according to claim 55, wherein the slave-module is switchable between at least two of the following operating states: a) the first operating state for energy transmission from the master-module to the at least one slave-module via the two-wire line, b) the second operating state for data transmission from the master-module to the at least one slave-module via the two-wire line, and c) the third operating state for data transmission from the at least one slave-module to the master-module via the two-wire line.

57. The slave-module according to claim 55, wherein the slave-module comprises at least one of the following components: a) the energy store in order to supply the slave-module with the energy required for operation during the interruption of the energy transmission from the master-module in the second operating state, b) the discharge protection in order to prevent excessive discharge of the energy store during the interruption of the energy transmission from the master-module in the second operating state, c) the current modulator in order to modulate a load current provided by the master module via the two-wire line corresponding to the data to be transmitted to the master-module, d) the current pulse generator, which modulates the load current provided via the two-wire line in the form of pulses and generates current pulses corresponding to the data to be transmitted to the master-module, e) the transistor, which is connected between the two lines of the two-wire line in order to modulate the load current provided by the master-module via the two-wire line, f) the current limiter in order to limit the load current when the transistor switches through, and g) the microprocessor for controlling the transistor corresponding to the data to be transmitted from the slave-module to the master-module.

58. A transmission method for transmitting data and energy via a two-wire line between a master-module and a slave-module, wherein the master-module and the slave-module are operated in different operating states, the operating states differing with regard to at least one of the following: the energy transmission; and the data transmission.

Description

[0042] Other advantageous embodiments of the invention are characterized in the sub claims or are explained in more detail below together with the description of the preferred embodiments of the invention with reference to the figures.

[0043] FIG. 1 shows a conventional transmission system as described at the beginning.

[0044] FIG. 2 shows an example of a transmission system according to the invention.

[0045] FIG. 3 shows the chronological sequence of voltages and currents in the embodiment according to FIG. 2.

[0046] FIG. 4 shows a schematic illustration of a current pulse detector in the master-module.

[0047] FIG. 5 shows the signal curves indicated for the current pulse detector according to FIG. 4.

[0048] FIG. 6 shows a schematic illustration of the transmission system according to the invention.

[0049] FIG. 7 shows a modified embodiment.

[0050] FIG. 8 shows a time diagram with the voltage curves in the embodiment according to FIG. 7.

[0051] FIG. 9 shows a further modified embodiment.

[0052] In the following, the embodiment of a transmission system according to the invention illustrated in FIG. 2 is described, which comprises a master-module 8, a two-wire line 9 and several slave modules 10-12, wherein only the slave-module 10 is illustrated in detail, while the other slave-modules 11, 12 are only indicated schematically.

[0053] The master-module 8 is supplied with a supply voltage U.sub.0 via two input connections 13, 14 (master input + and master input ). A ground can be connected internally to the input connection 14 (master input ).

[0054] The master module 8 can generate an internal voltage U.sub.02 via a voltage regulator 15.

[0055] The slave modules 10-12 each comprise two input connections 16, 17 (slave + and slave ), which are each connected to two output connections 20, 21 of the master-module 8 via a supply line 18, 19 of the two-wire line 9. The other slave-modules 11, 12 are connected in parallel.

[0056] The core function of the invention is now that both an energy supply from the master-module 8 to the slave-modules 10-12 and a bidirectional digital data transmission between the master-module 8 and the slave-modules 10-12 can take place via the two-wire line 9 consisting of the two supply lines 18, 19, which is solved as follows.

[0057] The temporal operation of the transmission system via the two-wire line 9 consisting of the two supply lines 18, 19 can be divided into three phases (operating states): [0058] Phase A: energy transmission phase, i.e. energy transmission from the master-module 8 to the slave-modules 10-12. [0059] Phase B: a master-to-slave communication phase (downlink-broadcast-phase), i.e. a data transmission from the master-module 8 to at least one of the slave-modules 10-12. [0060] Phase C: a slave-to-master communication phase (uplink-phase), i.e. a data transmission from one of the slave-modules 10-12 to the master-module 8.

[0061] The master-module 8 contains a microprocessor 22, which can control a switch 23, for example a bipolar transistor, with which the supply voltage U.sub.0 or an internally generated voltage (e.g. U.sub.02) can be forwarded to the output connection 20.

[0062] In the phase A and in the phase C, the switch 23 is controlled, i.e. closed. No data transmission takes place in the phase A. The slave-modules 10-12 contain an energy store 24 (e.g. capacitor), which can be charged in the phase A and recharged at the beginning of the phase C. A voltage regulator 25, which is contained in the slave-modules 10-12, can convert the time-varying voltage U.sub.11 of the energy store 24 into a stabilized voltage U.sub.12, which is provided to the microprocessor 27 and further electronics 27 contained in the slave-modules 10-12.

[0063] In the phase B, the switch 23 in the master module 8 is opened for a certain period of time. The microprocessor 22 can now send voltage pulses to the output connection 20 of the master-module 8 via the controllable switch 23 and/or directly from an output circuit of the microprocessor via an output circuit 26. The voltage U.sub.11 of the energy store 24 in the slave-modules 10-12 decreases with increasing time, depending on the current consumption of the slave-modules 10-12 and the resulting discharge of the energy store 24 in this phase. The output circuit 26 is provided between the output of the microprocessor 22 and the output connection 20 of the master-module 8 in order to be able to transmit data via this path.

[0064] The slave-modules 10-12 contain a microprocessor 27, which is connected to a voltage detector 28. The voltage detector 28 has the task to detect the voltage pulses emitted by the master-module 8 when they exceed or fall below a threshold value and to adjust their level to a value that can be processed by the microprocessor 27. The voltage detector 28 can, for example, consist of a voltage divider or an NPN bipolar transistor with an upstream base resistor and emitter resistor, which is connected to an internal supply voltage U.sub.12. To prevent rapid discharging of the energy store 24 contained in the slave-module 8 in this phase B, a discharge protection 29, for example in the form of a diode, can be provided.

[0065] In phase C, the slave-to-master communication phase, the controllable switch 23 contained in the master-module 8 is closed so that energy can be provided to the slave-modules 10-12 by the master module 8. The energy stores 24 of the slave-modules 10-12, which may have been partially discharged in a previous master-to-slave communication phase, are recharged at the beginning of the phase C.

[0066] During or following this recharging phase, the slave-modules 10-12 can change their current consumption via a current pulse generator 30. The current pulse generator 30 can consist of a bipolar transistor with a base resistor, which can be controlled by the microprocessor 27 contained in the slave-modules 10-12. The amplitude of the current flowing from the master-module 8 to the slave-modules 10-12 can be influenced by a current limiter 31 (in the simplest case a collector resistor), which is switched on and off by the transistor of the current pulse generator 30.

[0067] In addition, a further current pulse generator 32 can be connected in parallel in order to generate different current pulse levels. The current pulse generator 32 may also comprise a possibly different current limiter 33.

[0068] The master-module 8 contains a current detector, e.g. in the form of a current measuring resistor 34 and a pulse detector 35, in order to convert the current pulses generated by the slave-modules 10-12 in the load current into a signal that can be evaluated by the microprocessor 22 contained in the master-module 8. The current detector measures the total current from normal power supply and the current pulses for the communication, which must be separated and processed correspondingly by the pulse detector 35. The method is also known in the literature as load modulation, as the current load is changed by the slave-modules 10-12, which in turn can be detected in the master-module 8.

[0069] A suitable anti-collision method can be used so that the master-module 8 can clearly assign the communication of the slave-modules 10-12.

[0070] FIG. 3 shows an example of the schematic time curve of different voltages and currents that can occur at different positions of the transmission system for energy and data transmission via the two-wire line 9 consisting of the supply lines 18, 19. All time curves are based on the same time base.

[0071] An energy transmission phase (phase A) takes place between t.sub.0 and t.sub.1, a master-to-slave communication phase (phase B) takes place between t.sub.1 and t.sub.4, and a slave-to-master communication phase (phase C) takes place between t.sub.4 and t.sub.9. This is followed by a new energy transmission phase (phase A) from time t.sub.9.

[0072] The signal U.sub.0C represents the chronological sequence of the voltage between the input connections 16, 17 of the slave-module 10 (slave+ and slave) and corresponds to the input voltage U.sub.0 between the times t.sub.0 and t.sub.1 minus a possible voltage drop across the controllable switch 23 in the master-module 8 as well as a voltage drop across the supply lines 18, 19 and the wiring. Alternatively, the applied voltage can also be set to a different value via an internal voltage regulator.

[0073] At the time t.sub.1, the controllable switch 23 in the master-module 8 is opened and the voltage drops to a low value, e.g. 0V.

[0074] Between the times t.sub.2 to t.sub.3, voltage pulses are generated, which can either be generated directly by the microprocessor 22 of the master-module 8 by means of the output circuit 26 or generated with the aid of the controllable switch 23. As no (or no large) capacitance is connected directly to the signal path during this period, the steep edges of the voltage pulses are maintained. The voltage level of the voltage pulses between t.sub.2 and t.sub.3 can optionally comprise a different value than in the period between t.sub.0 and t.sub.1. The voltage pulses can contain information that is transmitted from the master-module 8 to all connected slave-modules 10-12. An example of such information can be a request command packet for a data packet of one of the slave-modules 10-12. A data packet can consist of various parts, such as a destination address, the data to be transmitted and a CRC-error detection part (CRC: Cyclic Redundancy Check).

[0075] At time t.sub.4, the controllable switch 23 is closed again so that the level corresponds to the value in the period between t.sub.0 and t.sub.1.

[0076] Another option is that the voltage U.sub.0C between t.sub.1 and t.sub.4 is not completely reduced to 0V in the meantime, but only slightly reduced, e.g. from 10V to 5V or from 24V to 22V. This can have the advantage that a continuous energy transmission is made possible and the time span between t.sub.2 and t.sub.3 in which a data transmission is possible can be extended.

[0077] The voltage U.sub.11 at the energy store 24 of the slave-module 10 initially increases depending on the state of charge of the energy store 24 from the time t.sub.0 until it finally assumes a more or less constant value. As the controllable switch 23 is opened at time t.sub.1, the voltage of the energy store 24 decreases depending on the current consumption of the slave-module 10.

[0078] At time t.sub.4, the controllable switch 23 in the master-module 8 is closed and the energy store 24 is recharged. With a constant charging current, which can be realized, for example, by a current limiter circuit 40 connected upstream of the energy store 24, the voltage at the energy store 24 increases linearly. The current limiter circuit 40 offers the advantage that the charging current is limited at the time t.sub.4, which limits the load on the controllable switch 23 of the master-module 8, through which the total current of all connected slave-modules 10-12 flows. The voltage at the energy store 24 reaches a maximum value at time t.sub.5 and remains more or less constant from this time onwards.

[0079] The voltage curve marked with the signal U.sub.Sdin corresponds to the voltage pulse detector signal provided to the microprocessor 27 in the slave module 8. The signal can be, for example, an inverted and level-adjusted version of the voltage signal U.sub.0C due to an optional inverter and level limiter circuit in the voltage detector 28.

[0080] Level changes on this signal typically run synchronously with level changes in the voltage U.sub.0C. The threshold value for the level change must be selected low enough so that the changes can also be correctly detected during phases of smaller amplitudes of the voltage U.sub.0C. This signal can be fed to the microprocessor 27 and evaluated there so that the information sent can be recognized by the master-module 8 and responded to accordingly.

[0081] The time curve of the current flowing through the current detector or through the current measuring resistor 34, respectively, is marked with the signal I.sub.0C. At the time t.sub.0, the current is typically high depending on the charge state of the energy store 24 of the connected slave-modules 10-12. The current is limited by the optional charging current limitation. If the voltages of the energy stores 24 of the connected slave-modules 10-12 reach a certain level, the current falls below the limiting current and the current decreases over time until it reaches a constant value and all energy stores are charged. The more or less constant value that then typically occurs is given by the current requirement of the connected slave-modules 10-12, which is assumed to be constant in this example for a clearer illustration.

[0082] Between the times t.sub.1 and t.sub.4, the controllable switch 23 is open and the required operating current of the slave-modules 10-12 is provided from the respective energy stores 24, so that no current flows through the current measuring resistor 34.

[0083] At time t.sub.4, the controllable switch 23 is closed and the energy stores 24 contained in the connected slave-modules 10-12 are recharged. The charging current can be limited as described above and decreases when a certain voltage level of the energy store 24 is reached.

[0084] At time t.sub.5, the energy stores 24 are fully charged and a more or less constant current flows through the current measuring resistor 34, which is given by the operating current of the slave-modules 10-12, which is assumed to be constant.

[0085] Between the times t.sub.6 to t.sub.7, current pulses are generated by the current pulse generator 30 of one of the slave-modules 10-12. The current pulses briefly and steeply increase the current in the current measuring resistor 34 compared to a basic value, which is given by the more or less constant operating current of the slave modules 10-12. The level of the current value during the active current pulses can be set by the current limiter 31. A good compromise between a sufficient signal level on the one hand and a minimization of the power loss on the other is generally selected here.

[0086] By suitably buffering the supply voltage of the slave-modules 10-12 and the current limiter 40, the temporal change of the operating current of the slave-modules 10-12 can only take place slowly, while the current pulses can cause a temporally rapid change of the current in the current measuring resistor 34. This means that the current pulses can also be transmitted during the recharging of the buffer-capacity, as the rapid current change associated with the pulses can be easily separated from the weak or slow current changes or the constant current each caused by the recharging of the energy store 24. An abrupt current change after switching the power supply on or off up to the level of the current limitation is limited to a defined period and must be ignored by the master-module 8. The current pulses can contain binary information that can be transmitted from the microprocessor 27 in the slave-module 10 to the master-module 8. An example may be a response to a request command from the master-module 8. An advantage of the invention is that an energy transmission from the master-module 8 to the slave-modules 10-12 during phase C is possible. In this respect, information can be transmitted from the slave-modules 10-12 to the master-module 8 over a longer period of time. This is particularly advantageous if a lot of information has to be transmitted from the slave-modules 10-12 to the master-module 8 and only relatively little information is to be transmitted from the master-module 8 to the slave-modules 10-12.

[0087] No current pulses are generated in the period between the times t.sub.7 and t.sub.8. Between the time t.sub.8 and t.sub.9, current pulses with a higher amplitude and shorter interval width are generated than in the period t.sub.6 to t.sub.7, which can be generated by the second current pulse generator 32. Due to the higher amplitude of the current, which in an exemplary embodiment is higher (the current limiter 33 is selected differently than the current limiter 31) than the current consumption at the beginning of the recharging of the energy store 24 at time t.sub.0 and t.sub.4, other information, e.g. time-critical information such as an error indicator, can be transmitted in a more interference-proof manner than is the case when transmitting the data in the time interval between t.sub.6 to t.sub.7. By using an interval width that differs from that in the time interval t.sub.6 to t.sub.7, the error information can also be detected quickly and efficiently without, for example, reconstructing data packets or performing an error detection. For example, only one or a few pulses can be transmitted here, signalling the need for immediate action.

[0088] The voltage curve generated by the pulse detector 35 and provided to the microprocessor 22 in the master-module 8 is described in FIG. 2 as U.sub.Mdin. The voltage curve comprises binary levels, a high level that ideally corresponds to the supply voltage of the microprocessor 22 in the master-module 8 and a low level that ideally corresponds to 0V.

[0089] Between the times t.sub.0 and t.sub.1, the voltage level depends on the state of charge of the energy store 24 and thus the current change of the current in the measuring resistor dI.sub.0C/dt. The exact procedure is described in FIGS. 3 and 4. In the example shown, the current change at the time t.sub.0 is strongly positive and leads to a high level of the pulse detector 35, is then constant and then becomes negative, which leads to a low level of the pulse detector 35.

[0090] At time t.sub.4 the current change is high, is then constant and then negative, which also leads to a signal with a changing level. Both level changes of U.sub.Mdin are not relevant for data or information transmission, respectively, and can or must be ignored by the microprocessor.

[0091] In the period t.sub.6 to t.sub.7, the current change caused by the current pulse generators 30, 32 of the slave-modules 10-12 is converted into corresponding signal levels. In the period between the times t.sub.8 and t.sub.9, the current pulses generated by the second current pulse generators of the slave-modules 10-12 are converted into signal levels with a different edge width. The different current pulse amplitude is not differentiated in this embodiment. For the communication from the slave-module 8 to the master-module 8, only the time periods t.sub.6 to t.sub.7 and t.sub.8 to t.sub.9 contain information. Level changes of the voltage U.sub.Mdin in other time periods do not contain any information relevant for the communication between the master-module 8 and slave-modules 10-12. The time at which the controllable switch 23 is closed and opened is known to the microprocessor 22 in the master-module 8. The closing and opening of the controllable switch 23 each time results in a high current change dI.sub.0C/dt, caused by the recharging of the energy stores 24 in the slave-modules 10-12, which is noticeable in level changes on the voltage U.sub.Mdin. The duration of the resulting level is to be estimated by the master-module 8 and the slave-modules 10-12 and must not be taken into account for the communication.

[0092] FIG. 4 contains a schematic illustration of a pulse detector 35 and FIG. 5 shows the signal characteristics.

[0093] The current I.sub.0C (block 41) corresponds to the current that flows through the current measuring resistor 34 in the master-module 8.

[0094] The voltage U.sub.Rm (block 42), which drops differentially across the current measuring resistor 34, is directly proportional to the current.

[0095] By a high-pass or band-pass filtering and amplification of the voltage U.sub.Rm (block 43), the slowly varying part of the voltage change, which can be caused by the time-varying current consumption of the slave-modules 10-12, is attenuated more strongly than temporally rapid changes. A temporally rapid increase in the current through the current measuring resistor 34, as can be caused by switching on a suitable current pulse generator in a slave-module 10 connected to the master-module 8, leads to a positive voltage pulse of the voltage U.sub.F.

[0096] If the voltage U.sub.F exceeds a positive threshold value (block 44), a voltage U.sub.D can be assigned a high level. A rapid reduction in the current flowing through the current measuring resistor 34, which can be achieved by switching off a current pulse generator 30, 32 in a slave-module 10 connected to the master-module 8, results in a negative voltage pulse of the voltage U.sub.F. If the voltage U.sub.F falls below a negative threshold value, a voltage U.sub.D can be assigned a low level. Since in one realization of the circuit the current pulse generators 30, 32 can generate a current change at a finite speed, the time curve of the current consumption of the slave-modules 10-12 is not constant and the filtering only comprises a limited attenuation, only a finite voltage swing of the voltage U.sub.F can be generated. If the voltage swing is not sufficient so that the voltage U.sub.F reaches a threshold value even at times when one of the current pulse generators 30, 32 is not switched on or off, it can be advantageous to perform an edge detection of the time curve of the voltage U.sub.F. For this purpose, for example, the current value of the voltage U.sub.F can be compared with a past value and an edge can be detected when a threshold value of the difference between the two voltages is exceeded.

[0097] The time marked with t.sub.4 in FIG. 5 corresponds to the time at which the controllable switch 23 in the master-module 8 is closed. The current increases sharply at time t.sub.4, as the energy stores 24 contained in the slave-modules 10-12 connected to the master-module 8 are recharged. The current limiter 40 contained in the slave-modules 10-12 can limit the current to a maximum value that depends on the number of connected slave-modules 10-12. The rapid increase in current at the time t.sub.4 leads to a voltage pulse of the voltage U.sub.F. The voltage U.sub.Mdin assumes a high level. At time t.sub.5 the charging process is complete and the current decreases rapidly over time. This can be taken as a negative voltage pulse of the voltage U.sub.F and leads to a low voltage level of the voltage U.sub.Mdin.

[0098] Between the times t.sub.6 and t.sub.7, current pulses are generated by one of the current pulse generators 30, 32 in one of the connected slave-modules 10, 12. Between the times t.sub.8 and t.sub.9, voltage pulses are generated by the second current pulse generator 32 contained in a connected slave-module 10-12. The current pulses can differ in amplitude and/or frequency.

[0099] FIG. 6 describes a possible implementation of the communication from the slave-modules 10-12 to the master-module 8. In particular, the focus here is on the structure of the pulse detector 35, which is shown here in more detail as a block diagram. In addition, the components from the slave module 8 required for communication via load modulation are illustrated again.

[0100] A current I.sub.1D that changes abruptly due to the variable current sink is measured together with the supply current I.sub.1 flowing continuously to the slave-module 8 as a total current I.sub.0C via the current measuring resistor 34 in the master-module 8 and converted into a voltage U.sub.Rm. Using suitable filter and amplifier elements 36, the rapidly changing current changes can be filtered out from the slow ones. This produces the voltage signal U.sub.F. The filtered pulses are then converted via a comparator 37 into a form that can be processed by a receiver 38, producing the signal U.sub.Mdin. An optional pre-state memory 39 can help to extract more reliable levels from the filtered signal U.sub.F.

[0101] FIG. 7 shows the basic structure of the data transmission path according to a further embodiment. This embodiment corresponds in part to the embodiment as described above, so that reference is also made to the above description in order to avoid repetition, with the same reference signs being used for corresponding details.

[0102] The data transmission path consists of a master-module 8, which is connected to a slave-module 10 via a two-wire line 9 (supply line). The master-module 8 can supply the slave-module 10 with power via the two-wire line 9 and communicate with it.

[0103] In the supply phase, a changeover switch 47 is in position (a) and a switch 46 is closed.

[0104] During a data sending from the master-module 8 to the slave-module 10, the changeover switch 47 remains in position (a) and the switch 46 is switched on and off in time with the data. This results in a potential change on the two-wire line 9, which also sets in time with the data and can be evaluated with the voltage detector 28 in the slave-module 10.

[0105] When the master module 8 expects a response, the changeover switch 47 is set to position (b) so that a current limiter 45 limits the current drawn by the slave-module 10. Through the current pulse generator 30, the slave-module 10 can generate a potential change on the two-wire line 9 if the additional current drawn by the current pulse generator 30 is above the limiting current through the current limiter 45. In other words, when the current pulse generator 30 is switched on, more current is required by the master-module 8 than can be provided by the current limiter 45. This results in a voltage drop or potential change on the two-wire line 9, respectively. A voltage detector 49 in the master-module 8 can be used to evaluate this change in potential in the master-module 8. By cyclically switching the current pulse generator 30, data can thus be sent from the slave-module 10 to the master module 8.

[0106] During a data sending from the slave-module 10 to the master-module 8, the slave-module 10 can disconnect the two-wire line 9 internally with a switch 48 in order to prevent unwanted influences from the downstream circuit components (e.g. power supply) from affecting the communication. The slave-module 10 must be able to bridge this phase using an energy store, for example, in order to guarantee its own energy requirements.

[0107] FIG. 8 describes the voltage signals at the potentials U.sub.0C (signal between the master-module 8 and the slave-module 10 on the two-wire line 9) and U.sub.11 (voltage at the energy store of a slave) during a communication sequence between the two devices. A modified method to the previously described sequence is used:

[0108] In phase 1 (supply), the slave-module 10 is supplied with energy by the master-module 8 via the potential U.sub.0C, which is also stored in the energy store with the potential U.sub.11.

[0109] Phase 2 (master->slave) follows, in which the master-module 8 sends data to the slave-module 10 via U.sub.0C. The special feature here is that during the transmission of a defined amount of data, the voltage at the energy store has dropped significantly, so that the entire data content cannot be transmitted without the slave-module 10 would switch off in the meantime, as the supply voltage would no longer be sufficient to operate the device at some point. This is remedied by transmission pauses between two of the above-mentioned defined quantities of transmitted data, during which a short supply phase of length t.sub.1 is inserted in which the energy store can recharge again. This would theoretically allow a transmission of any amount of data from the master-module 8 to the slave-module 10.

[0110] As already described in FIG. 7, the return communication from the slave-module 10 to the master-module 8 takes place differently as described in the previous explanations. If the master-module 8 expects data from the slave-module 10 after the time period t.sub.2, it switches on a current limitation for the potential U.sub.0C (changeover switch 47). This means that the slave-module 10 can no longer draw any amount of current without the voltage U.sub.0C collapsing. This principle is used for the data transmission from the slave-module 10 to the master-module 8 by the slave-module 10 switching a load on and off in time with the data to be transmitted, which is dimensioned in such a way that the voltage U.sub.0C drops sufficiently when the load is switched on. The master-module 8 can then read in the modulated voltage (via the voltage detector 49) and evaluate it correspondingly.

[0111] While the current limitation in the master-module 8 is active (changeover switch 47 in position (b)), no additional energy is provided for the operation of the slave-module 10 (switch 48 for disconnecting the supply from FIG. 7 is open). Correspondingly, the voltage U.sub.11 at the energy store of the slave-module 10 drops continuously in this phase. Here, after a defined amount of transmitted data, there is a correspondingly timed transmission pause of length t.sub.4, during which the master-module 8 switches the supply back on for t.sub.3, i.e. switches the changeover switch 51 to state (a). The energy store can be recharged during this phase. The master-module 8 then switches the current limitation back on and awaits the next data packet from slave-module 10. Here, any amount of data can theoretically be transmitted from the slave-module 10 to the master-module 8.

[0112] The embodiment according to FIG. 9 corresponds in part to the embodiment according to FIG. 7, so that to avoid repetition, reference is also made to the above description, wherein the same reference symbols are used for corresponding details.

[0113] FIG. 9 shows the basic structure of the data transmission path. It consists of a master-module 8, which is connected to a slave-module 10 via a two-wire line 9 (supply line). The master-module 8 can supply the slave-module 10 with power via the two-wire line 9 and communicate with it.

[0114] In the supply phase, a switch 50 is closed and preferably a switch 51 is open, so that path (a) is in use.

[0115] During a data transmission from the master-module 8 to the slave-module 10, the switch 50 is switched on and off in time with the data. This results in a potential change on the two-wire line 9, which also sets in time with the data and can be evaluated by the voltage detector 28 in the slave-module 10. While the switch 50 is switched off, the slave-module 10 must power itself, e.g. via an energy store.

[0116] When the master-module 8 expects a response, the switch 50 is opened and the switch 51 is closed. Path (b) is therefore in use, so that the current drawn by the slave-module 10 is limited by a current limiter 52. The current pulse generator 30 enables the slave-module 10 to generate a potential change on the two-wire line 9 if the additional current drawn by the current pulse generator 30 is higher than the limiting current due to the current limitation 52.

[0117] A voltage detector 49 in the master-module 8 can be used to evaluate this change in potential in the master-module 8.

[0118] During a data sending from the slave-module 10 to the master-module 8, the slave-module 10 can disconnect the two-wire line 9 internally with the switch 48 so that the communication is not affected by unwanted influences from the downstream circuit components (e.g. power supply). The slave-module 10 must be able to bridge this phase using an energy store, for example, in order to guarantee its own energy requirements.

[0119] The invention is not limited to the preferred embodiments described above. Rather, a large number of variants and modifications are possible which also make use of the inventive concept and therefore fall within the scope of protection. In particular, the invention also claims protection for the subject matter and the features of the sub claims independently of the claims referred to in each case and, in particular, also without the features of the main claim. The invention thus comprises different aspects of the invention, which enjoy protection independently of each other.

LIST OF REFERENCE SYMBOLS

[0120] 1 master-module [0121] 2 slave-module [0122] 3 two-wire line [0123] 4 energy source of the master-module [0124] 5 data interface of the master-module [0125] 6 energy sink of the slave-module [0126] 7 data interface of the slave-module [0127] 8 master-module [0128] 9 two-wire line [0129] 10-12 slave-modules [0130] 13 input connection of the master-module on high-side [0131] 14 input connection of the master-module on low-side [0132] 15 voltage regulator in the master-module [0133] 16 input connection of the slave-module to high-side [0134] 17 input connection of the slave-module to low-side [0135] 18, 19 supply lines between master-module and slave-module [0136] 20 output connection of the master-module on high-side [0137] 21 output connection of the master-module on low-side [0138] 22 microprocessor in the master-module [0139] 23 switch in the master-module [0140] 24 energy store in the slave-module [0141] 25 voltage regulator in the slave-module [0142] 26 output circuit in the master-module [0143] 27 microprocessor in the slave-module [0144] 27 further electronics in the slave-module [0145] 28 voltage detector in the slave-module [0146] 29 discharge protection in the slave-module [0147] 30 current pulse generator 1 in the slave-module [0148] 31 current limiter of the current pulse generator 1 in the slave-module [0149] 32 current pulse generator 2 in the slave-module [0150] 33 current limiter of the current pulse generator 2 in the slave-module [0151] 34 current measuring resistor in the master-module [0152] 35 pulse detector in the master-module [0153] 36 filter and amplifier elements in the master-module [0154] 37 comparator [0155] 38 receiver [0156] 39 pre-state memory [0157] 40 current limiter circuit in the slave-module [0158] 41 block provision of current I.sub.0C [0159] 42 block supply of voltage U.sub.RM [0160] 43 block filtering and amplification [0161] 44 block level change detection [0162] 45 current limitation [0163] 46 switch [0164] 47 changeover switch [0165] 48 switch [0166] 49 voltage detector [0167] 50 switch [0168] 51 switch [0169] 52 current limitation [0170] U.sub.0 supply voltage of the master-module [0171] U.sub.02 internal voltage in the master-module [0172] U.sub.11 voltage of the energy store (capacitor) in the slave-module [0173] U.sub.12 internal supply voltage in the slave-module [0174] U.sub.Sdin voltage at the data input of the microprocessor in the slave-module [0175] U.sub.0C voltage at the input connection of the slave-module on the high side [0176] U.sub.Mdin voltage at the data input of the microprocessor in the master-module [0177] I.sub.0C current through the current measuring resistor in the master-module [0178] I.sub.1 supply current to the slave-modules [0179] U.sub.Rm voltage across the current measuring resistor in the master-module [0180] U.sub.F voltage pulse at the input of the comparator