Compatible circuit and terminal

Abstract

Disclosed are a compatible circuit and a terminal. The compatible circuit includes a printed circuit board (PCB) of which the existing structure is not changed, and a group of compatible devices which are in a pin-to-pin form and have different internal structures, wherein the compatible devices and the PCB are assembled together; the internal structures of the compatible devices are matched with a link compatibility selection requirement; and the compatible devices are configured to conduct link selection output on at least two links which are input and need compatibility, in accordance with the link compatibility selection requirement.

Claims

1. A compatible circuit, comprising: a printed circuit board PCB with an unchanged existing structure, and one group of compatible devices which are in a Pin-to-Pin form and have different internal structures, wherein the compatible devices and the PCB are assembled together; the internal structures of the compatible devices are matched with a link compatibility selection requirement; and the compatible devices are configured to conduct a link selection output on at least two links which are inputted and need compatibility according to the link compatibility selection requirement, wherein there are two links which are inputted and need compatibility, and the two links are a first link and a second link respectively; accordingly, one group of compatible devices comprises two compatible devices, which are a first compatible device and a second compatible device respectively, wherein: the first compatible device is configured to connect the inputted first link to a first output end to output, and select the first link to be under a working state when the first compatible device and the PCB are assembled together; and the second compatible device is configured to connect the inputted second link to the first output end to output, and select the second link to the under a working state when the second compatible device and the PCB are assembled together.

2. A compatible circuit, comprising: a printed circuit board PCB with an unchanged existing structure, and one group of compatible devices which are in a Pin-to-Pin form and have different internal structures, wherein the compatible devices and the PCB are assembled together; the internal structures of the compatible devices are matched with a link compatibility selection requirement; and the compatible devices are configured to conduct a link selection output on at least two links which are inputted and need compatibility according to the link compatibility selection requirement, wherein there are more than two links which are inputted and need compatibility, and the more than two links are a first link to an N.sup.th link respectively; and N is a natural number greater than 2; accordingly, one group of compatible devices comprises more than two compatible devices, which are a first compatible device to an N.sup.th compatible device; wherein: the first compatible device is configured to connect the inputted first link to a first output end to output, and select the first link to be under a working state when the first compatible device and the PCB are assembled together; and so on, until the N.sup.th compatible device is configured to connect the inputted N.sup.th link to the first output end to output, and select the N.sup.th link to be under a working state when the N.sup.th compatible device and the PCB are assembled together.

3. A compatible circuit, comprising: a printed circuit board PCB with an unchanged existing structure, and one group of compatible devices which are in a Pin-to-Pin form and have different internal structures, wherein the compatible devices and the PCB are assembled together; the internal structures of the compatible devices are matched with a link compatibility selection requirement; and the compatible devices are configured to conduct a link selection output on at least two links which are inputted and need compatibility according to the link compatibility selection requirement, wherein there are N links which are inputted and need compatibility, and the N links are a first link to an N.sup.th link respectively; N is a natural number greater than or equal to 2; accordingly, one group of compatible devices comprises N compatible devices, which are a first compatible device to an N.sup.th compatible device respectively; there are M output ends, and M is a natural number greater than or equal to 2, wherein: the first compatible device is configured to connect at least one link of the inputted first link to the N.sup.th link to a first output end to output, and select the at least one link of the inputted first link to the N.sup.th link which is connected to the first output end to be under a working state when the first compatible device and the PCB are assembled together; the N.sup.th compatible device is configured to connect at least one link of the inputted first link to the N.sup.th link to at least one output end of the first output end to the M.sup.th output end to output, and select the at least one link of the inputted first link to the N.sup.th link which is connected with the at least one output end to be under a working state when the N.sup.th compatible device and the PCB are assembled together; and so on, until a compatibility selection of any connection between N inputs and M outputs are completed through the first compatible device to the N.sup.th compatible device.

4. The compatible circuit according to claim 3, wherein the output end is configured to connect to a public link, and the compatible devices are located at a front segment or a rear segment of the public link.

5. The compatible circuit according to claim 1, wherein the internal structures of the compatible devices are formed by at least one manner of series resistors, capacitors, inductors and straight-through wires according to the link compatibility selection requirement.

6. The compatible circuit according to claim 1, wherein the compatible devices are also internally packed with at least one device of a differential duplexer, a single-ended duplexer, a differential filter and a single-ended filter.

7. The compatible circuit according to claim 1, wherein the compatible devices and the PCB are assembled together in a mounting manner.

8. A terminal, comprising a compatible circuit, wherein: the compatible circuit comprises: a printed circuit board PCB with an unchanged existing structure, and a group of compatible devices which are in a Pin-to-Pin form and have different internal structures, the compatible devices and the PCB are assembled together; the internal structures of the compatible devices are matched with a link compatibility selection requirement; and the compatible devices are configured to conduct a link selection output on at least two links which are inputted and need compatibility according to the link compatibility selection requirement, wherein there are two links which are inputted and need compatibility, and the two links are a first link and a second link respectively; accordingly, one group of compatible devices comprises two compatible devices, which are a first compatible device and a second compatible device respectively, wherein: the first compatible device is configured to connect the inputted first link to a first output end to output, and select the first link to be under a working state when the first compatible device and the PCB are assembled together; and the second compatible device is configured to connect the inputted second link to the first output end to output, and select the second link to be under a working state when the second compatible device and the PCB are assembled together.

9. A terminal, comprising a compatible circuit, wherein: the compatible circuit comprises: a printed circuit board PCB with an unchanged existing structure, and a group of compatible devices which are in a Pin-to-Pin form and have different internal structures, the compatible devices and the PCB are assembled together; the internal structures of the compatible devices are matched with a link compatibility selection requirement; and the compatible devices are configured to conduct a link selection output on at least two links which are inputted and need compatibility according to the link compatibility selection requirement, wherein there are more than two links which are inputted and need compatibility, and the more than two links are a first link to an N.sup.th link respectively; and N is a natural number greater than 2; accordingly, one group of compatible devices comprises more than two compatible devices, which are a first compatible device to an N.sup.th compatible device; wherein: the first compatible device is configured to connect the inputted first link to a first output end to output, and select the first link to be under a working state when the first compatible device and the PCB are assembled together; and so on, until the N.sup.th compatible device is configured to connect the inputted N.sup.th link to the first output end to output, and select the N.sup.th link to the under a working state when the N.sup.m compatible device and the PCB are assembled together.

10. A terminal, comprising a compatible circuit, wherein: the compatible circuit comprises: a printed circuit board PCB with an unchanged existing structure, and a group of compatible devices which are in a Pin-to-Pin form and have different internal structures, the compatible devices and the PCB are assembled together: the internal structures of the compatible devices are matched with a link compatibility selection requirement; and the compatible devices are configured to conduct a link selection output on at least two links which are inputted and need compatibility according to the link compatibility selection requirement, wherein there are N links which are inputted and need compatibility, and the N links are a first link to an N.sup.th link respectively; N is a natural number greater than or equal to 2; accordingly, one group of compatible devices comprises N compatible devices, which are a first compatible device to an N.sup.th compatible device respectively; there are M output ends, and M is a natural number greater than or equal to 2, wherein: the first compatible device is configured to connect at least one link of the inputted first link to the N.sup.th link to a first output end to output, and select the at least one link of the inputted first link to the N.sup.th link Which is connected to the first output end to the under a working state when the first compatible device and the PCB are assembled together; the N.sup.th compatible device is configured to connect at least one link of the inputted first link to the N.sup.th link to at least one output end of the first output end to the M.sup.th output end to output, and select the at least one link of the inputted first link to the N.sup.th link which is connected with the at least one output end to be under a working state when the N.sup.th compatible device and the PCB are assembled together; and so on, until a compatibility selection of any connection between N inputs and M outputs are completed through the first compatible device to the N.sup.th compatible device.

11. The terminal according to claim 10, wherein the output end is configured to connect to a public link, and the compatible devices are located at a front segment or a rear segment of the public link.

12. The terminal according to claim 8, wherein the internal structures of the compatible devices are formed by at least one manner of series resistors, capacitors, inductors and straight-through wires according to the link compatibility selection requirement.

13. The terminal according to claim 8, wherein the compatible devices are also internally packed with at least one device of a differential duplexer, a single-ended duplexer, a differential filter and a single-ended filter.

14. The terminal according to claim 8, wherein the compatible devices and the PCB are assembled together in a mounting manner.

15. The compatible circuit according to claim 2, wherein the internal structures of the compatible devices are formed by at least one manner of series resistors, capacitors, inductors and straight-through wires according to the link compatibility selection requirement.

16. The compatible circuit according to claim 2, wherein the compatible devices are also internally packed with at least one device of a differential duplexer, a single-ended duplexer, a differential filter and a single-ended filter.

17. The compatible circuit according to claim 2, wherein the compatible devices and the PCB are assembled together in a mounting manner.

18. The compatible circuit according to claim 3, wherein the internal structures of the compatible devices are formed by at least one manner of series resistors, capacitors, inductors and straight-through wires according to the link compatibility selection requirement.

19. The compatible circuit according to claim 3, wherein the compatible devices are also internally packed with at least one device of a differential duplexer, a single-ended duplexer, a differential filter and a single-ended filter.

20. The compatible circuit according to claim 3, wherein the compatible devices and the PCB are assembled together in a mounting manner.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIGS. 1a-1b are block diagram for selecting inputs and outputs of a compatible circuit by using the related art;

(2) FIG. 2 is a block diagram for selecting inputs and outputs of compatible circuits by using compatible devices, according to the embodiments of the present disclosure;

(3) FIG. 3 is a block diagram of selecting inputs and outputs of N link compatible circuits by using Pin-to-pin compatible devices, according to the embodiments of the present disclosure;

(4) FIGS. 4a-4b are block diagrams for selecting an input and an output of a circuit by using the compatible devices, according to the embodiments of the present disclosure;

(5) FIG. 5 is a block diagram for selecting an input and an output of a circuit by using the compatible devices, according to the embodiments of the present disclosure;

(6) FIG. 6 is a block diagram of a compatible design for four TX links by using a one-from-four device, according to the embodiments of the present disclosure;

(7) FIGS. 7a-7b are block diagrams of a compatible design of packing differential or single-ended duplexers inside the compatible devices, according to the embodiments of the present disclosure; and

(8) FIGS. 8a-8b are block diagrams of a compatible design of packing differential or single-ended filters inside the compatible devices, according to the embodiments of the present disclosure.

DETAILED DESCRIPTION

(9) The implementation of the technical solutions be further described in details with reference to the drawings hereinafter.

(10) The embodiments of the present disclosure can satisfy a layout requirement of more terminal parts for a smart terminal, so that all the terminal parts are unnecessary to be designed on one PCB, and an additional cost will not be increased. Moreover, a compatible design idea is introduced in the circuit design of the terminal. The embodiments of the present disclosure are different from the existing circuit compatibility technology in the industry. The existing circuit compatibility technology is as shown in FIG. 1a to FIG. 1b. Because it is almost impossible to arrange all radio frequency links on a PCB, it is usually necessary to repeatedly utilize the radio frequency links and even baseband links in a limited space while designing frequency band compatibility. As shown in FIG. 1a, input and output selection effects of different links are achieved by mounting resistors and capacitors at different positions, wherein link A and link B refer to an input respectively, and link C refers to an output. However, in the method as shown in FIG. 1a, redundant lines exist, which influences a radio frequency index. As shown in FIG. 1b, the redundant lines are eliminated through overlapping bonding pads, however, this is a non-standard design, and the compatible frequency bands are limited.

(11) The compatibility technology of the embodiments of the present disclosure does not change the existing PCB, and the existing PCB still implements the present basic functions, but a compatible device having a special structure is mounted on the existing PCB to achieve the compatible/multiplexing purpose of the circuit design. This function may be implemented by designing one compatible device corresponding to one type of special function. That is, with regard to different intelligent demands of the terminal, a link selection compatibility effect is implemented by a manner of adopting one existing PCB+any one of multiple compatible devices, thus satisfying the purpose of circuit design compatibility. Because it only needs to change the compatible devices and does not need to change the existing PCB, all the terminal parts are unnecessary to be designed on one PCB with the changes, and an additional cost will not be increased.

(12) The embodiments of the present disclosure provide a compatible circuit, including:

(13) a printed circuit board PCB with an unchanged existing structure, and a group of compatible devices which are in a Pin-to-Pin form and have different internal structures, wherein the compatible devices and the PCB are assembled together. The internal structures of the compatible devices are matched with a link compatibility selection requirement; and the compatible devices are configured to conduct link selection output on at least two links which are inputted and need compatibility according to the link compatibility selection requirement.

(14) In a preferred implementation manner of the embodiments of the present disclosure, two links which are inputted and need compatibility are provided, which are a first link and a second link respectively.

(15) Accordingly, one group of compatible devices includes two compatible devices, which are a first compatible device and a second compatible device respectively.

(16) The first compatible device is configured to connect the inputted first link to a first output end to output, and select the first link to be under a working state when the first compatible device and the PCB are assembled together.

(17) the second compatible device is configured to connect the inputted second link to the first output end to output, and select the second link to be under a working state when the second compatible device and the PCB are assembled together.

(18) In the preferred implementation manner, a group of compatible devices formed by the first compatible device and the second compatible device can be adopted to implement a one-from-two solution for two-link compatibility selection.

(19) In a preferred implementation manner of the embodiments of the present disclosure, more than two links which are inputted and need compatibility are provided, which are a first link to an N.sup.th link respectively; and N is a natural number greater than 2.

(20) Accordingly, one group of compatible devices includes more than two compatible devices, which are a first compatible device to an N.sup.th compatible device respectively.

(21) The first compatible device is configured to connect the inputted first link to a first output end to output, and select the first link to be under a working state when the first compatible device and the PCB are assembled together; and

(22) the similar process is performed, until the N.sup.th compatible device is configured to connect the inputted N.sup.th link to the first output end to output, and select the N.sup.th link to be under a working state when the N.sup.th compatible device and the PCB are assembled together.

(23) In the preferred implementation manner, a group of compatible devices formed by the first compatible device to the N.sup.th compatible device can be adopted to implement a one-from-N compatible solution for N-link compatibility selection.

(24) In a preferred implementation manner of the embodiments of the present disclosure, N links which are inputted and need compatibility are provided, which are a first link to an N.sup.th link respectively; and N is a natural number greater than or equal to 2.

(25) Accordingly, one group of compatible devices includes N compatible devices, which are a first compatible device to an N.sup.th compatible device respectively; M output ends are provided, and M is a natural number greater than or equal to 2.

(26) The first compatible device is configured to connect at least one link of the inputted first link to the N.sup.th link to the first output end to output, and select the at least one link of the inputted first link to the N.sup.th link which is connected to the first output end to be under a working state when the first compatible device and the PCB are assembled together;

(27) the N.sup.th compatible device is configured to connect at least one link of the inputted first link to the N.sup.th link to at least one output end of the first output end to the M.sup.th output end to output, and select the at least one link of the inputted first link to the N.sup.th link which is connected with the output end to be under a working state when the N.sup.th compatible device and the PCB are assembled together; and

(28) the similar process is performed, until compatibility selection of any connection between N inputs and M outputs is completed through the first compatible device to the N.sup.th compatible device.

(29) In the preferred embodiment, a group of compatible devices formed by the first compatible device to the N.sup.th compatible device can be adopted to implement an M-from-N compatible solution for N-link compatibility selection.

(30) In a preferred implementation manner of the embodiments of the present disclosure, the output end is configured to connect to a public link, and the compatible devices are located at a front segment or a rear segment of the public link.

(31) In a preferred implementation manner of the embodiments of the present disclosure, the internal structure of the compatible device is formed by at least one manner of series resistors, capacitors, inductors and straight-through wires according to the link compatibility selection requirement.

(32) In a preferred implementation manner of the embodiments of the present disclosure, the compatible device is also internally packed with at least one device of a differential duplexer, a single-ended duplexer, a differential filter and a single-ended filter.

(33) In a preferred implementation manner of the embodiments of the present disclosure, the compatible devices and the PCB are assembled together in a mounting manner.

(34) Embodiments of the present disclosure provide a terminal including the compatible circuit.

(35) The compatible circuit includes: a printed circuit hoard PCB with an unchanged existing structure, and a group of compatible devices which are in a Pin-to-Pin form and have different internal structures, wherein the compatible devices and the PCB are assembled together. The internal structures of the compatible devices are matched with a link compatibility selection requirement; and the compatible devices are configured to conduct link selection output on at least two links which are inputted and need compatibility according to the link compatibility selection requirement.

(36) In a preferred implementation manner of the embodiments of the present disclosure, the compatible circuit is the compatible circuit according to any one of the foregoing solutions.

(37) It is apparent that the embodiments of the present disclosure achieve the purpose of link selection compatibility through designing a group of Pin-to-Pin compatible devices with different internal structures. The embodiments of the present disclosure are explained specifically with reference to examples under a plurality of scenes.

(38) First scene: a scene of circuit compatibility selection for two links, i.e., a one-from-two scene.

(39) FIG. 2 shows two Pin-to-Pin compatible devices a and b with different internal structures designed according to the embodiments of the present disclosure, wherein the internal structures thereof are as shown in FIG. 2. FIG. 2 shows compatible devices that conduct circuit compatibility selection on two links, wherein the inside of the compatible device may either be packed with resistors according to demands (as shown FIG. 2), or packed with capacitors, inductors or straight-through wires according to demands. Link C is designed to be a public link, and links A and B are designed to be links that require compatibility. When the compatible device a is mounted on the PCB, then link A is selected; and when the compatible device b is mounted on the PCB, then link B is selected, so that an effect of being compatible with two frequency bands (or links) is achieved, and no redundant connection is generated.

(40) Second scene: a scene of N-link (any quantity of links) compatibility selection, i.e., a one-from-multiple scene, wherein N is a natural number greater than 1.

(41) FIG. 3 shows N Pin-to-Pin compatible devices 1 to N with different internal structures designed according to the embodiments of the present disclosure, wherein the internal structures thereof are as shown in FIG. 3, including N pin-to-pin compatible devices with different internal connections, wherein the inside of the compatible device may either be packed with resistors (as shown in FIG. 3) according to requirements or packed with capacitors, inductors or straight-through wires according to requirements. Link Y is designed to be a public link, and links A to N are designed to be links that require compatibility. Selecting corresponding devices according to requirements can achieve to select one from N of the links, i.e., link A is selected when the compatible device 1 is mounted link B is selected when the device 2 is mounted and similarly, link E is selected when the device e (1<=e<=N) is mounted; until link N is selected when the device N is mounted. In this way, a purpose of being compatible with N links is achieved.

(42) Third scene: a scene of circuit compatibility selection for five links, which is different from the above first scene and second scene in that two links, rather than one link, are outputted, i.e., a two-from-five scene.

(43) It should be noted that in addition to the compatible devices under the above-mentioned one-from-N (one-from-multiple) scene, there may be compatible devices under an M-from-N (multiple from multiple) scene. That is, the compatible devices according to the embodiments of the present disclosure may also be expanded to a multiple-from-multiple scene. For example, FIG. 4a to FIG. 4b show two examples of the two-from-five scene. FIGS. 4a-4b show the two-from-five scene illustrated by the embodiments of the present disclosure (two-from-five scene includes 20 cases), and among them, two cases are taken as examples for explanation only herein.

(44) It is possible to design 20 pin-to-pin compatible devices with different internal structures. FIGS. 4a-4b show two compatible devices, wherein according to requirements, the inside of the compatible device may be packed with capacitors (as shown in FIGS. 4a-4b), or packed with resistors, inductors or straight-through wires. When the first compatible device in FIGS. 4a-4b is selected, then Input 1 is connected to Output 1, and Input 3 is connected to Output 2; When the second compatible device is selected, then Input 3 is connected to Output 1, and Input 5 is connected to Output 2. In a similar manner, an object of freely connecting five input ends to two output ends can be achieved by selecting 20 different devices, thus completing two-from-five link compatibility selection.

(45) Similarly, FIG. 5 shows a block diagram of an M-from-N scene, wherein N is a natural number greater than 1, and NI is a natural number greater than or equal to 1. N*M pin-to-pin devices may be designed to complete a compatible situation of freely connecting N inputs to M outputs.

(46) Fourth scene: a link compatibility scene of one-from-four compatible devices in the field of radio frequency technologies.

(47) FIG. 6 is an example of the embodiments of the present disclosure that complete the compatibility of four transmitting links through selecting one pin-to-pin device from a group of four pin-to-pin devices, wherein the compatibility of four links can be completed only through selecting one of the four pin-to-pin devices, and one TX transmitting link is shared. The PA module in FIG. 6 refers to a power amplifier, the full name of which is a Power Amplifier, and a PA match module is a match circuit of the power amplifier. The solution may be generalized to a one-from-multiple solution in any situations.

(48) Fifth scene: a scene of applying compatible devices and packing other devices excluding resistors and capacitors, or the like, inside the compatible devices, wherein this scene includes two situations of packing a differential duplexer and a single-ended duplexer.

(49) FIG. 7a shows a structure and a design solution of the differential duplexer, wherein two differential duplexers are Pin-to-Pin, and meanwhile, a compatible device A supports frequency band A, and a compatible device B supports frequency band B. The insides of the compatible devices A and B are integrated with the differential duplexer, wherein A and B are packed in the same way, but have different internal connecting relationships, and the frequency bands of the integrated duplexers are also different. Rx A1 and Rx A2 are receiving differential links of frequency band A, and TX A is a transmitting link of frequency band A; Rx B1 and Rx B2 are receiving differential links of frequency band B, and TX B is a transmitting link of frequency band B; and ANT is a public end. When the compatible device A is selected, link (frequency band) A is selected, and link (frequency band) A works by using the compatible device A; and similarly, when the compatible device B is selected, link B is selected, and link B works by using the compatible device B.

(50) FIG. 7b shows a structure and a design solution of the single-ended duplexer, wherein a compatible device A supports frequency band A, and a compatible device B supports frequency band B. The insides of the compatible devices A and B are integrated with the single-ended duplexer, wherein A and B are packed in the same way, but have different internal connecting relationships, and the frequency bands of the integrated duplexers are also different. Rx A is a receiving link of frequency band A, and TX A is a transmitting link of frequency band A; Rx B is a receiving link of frequency band B, and TX B is a transmitting link of frequency band B; and ANT is a public end. When the compatible device A is selected, link (frequency band) A is selected, and link (frequency band) A works by using the compatible device A; and similarly, when the compatible device B is selected, link B is selected, and link B works by using the compatible device B.

(51) Both the compatible devices as shown in FIG. 7a or FIG. 7b can be compatible with two links (frequency bands).

(52) Sixth scene: a scene of applying compatible devices and packing other devices excluding resistors and capacitors, or the like, inside the compatible devices, wherein this scene includes two situations of packing a differential filter and a single-ended filter at different frequency bands.

(53) FIGS. 8a-8b illustrate the embodiments of the present disclosure that propose to pack the differential filters and single-ended filters into the compatible devices. FIG. 8a shows a structure and a design solution of the differential filter, wherein two differential filters are Pin-to-Pin, but a compatible device A supports frequency band A, and a compatible device supports frequency band B. Rx A1 and Rx A2 are receiving differential links of frequency band A; Rx B1 and Rx B2 are receiving differential links of frequency band B; and ANT is a public end. When the compatible device A is used, frequency band A is linked to work, and when the compatible device B is used, frequency band B is linked to work, so that an object of being compatible with two frequency bands is achieved.

(54) FIG. 8b shows a structure and a design solution of the single-ended filter, wherein two differential filters are Pin-to-Pin, but a compatible device A supports frequency band A, and a compatible device supports frequency band B. Rx A is a receiving link of frequency band A; Rx B is a receiving link of frequency band B; and ANT is a public end. When the compatible device A is used, frequency hand A is linked to work, and when the compatible device B is used, frequency band B is linked to work, so that an object of being compatible with two frequency hands is achieved.

(55) Both the compatible devices as shown in FIG. 8a or FIG. 8b can be compatible with two links (frequency bands).

(56) It should be noted that the structure and design solution of the differential filter as shown in FIG. 8a as well as the structure and design solution of the single-ended filter as shown in FIG. 8b are similarly suitable for a TX transmitting filter. All these figures are schematic diagrams, and specific device packing may be changed, while any changes within the spirit and principle of the present disclosure shall all fall within protection scope of the present disclosure.

(57) In conclusion, when adopting the embodiments of the present disclosure, a compatible effect can be achieved by only replacing a group of Pin-to-Pin compatible devices at the front segment or rear segment of the public link while designing the PCB, which can reduce redundant lines produced by the existing compatible solution, and avoid Pin-on-Pin design; the compatible effect can be achieved by replacing the compatible devices; and more links (frequency bands) can be compatible.

(58) Moreover, the embodiments of the present disclosure also propose a concept of packing a compatible link in such devices like a filter, a duplexer, a power amplifier, etc., so that redundant compatible devices can be omitted, and a layout space of the PCB occupied by the device is further reduced.

(59) Moreover, the present disclosure may also be generalized to design of all compatible circuits excluding radio frequency, to play a role of being compatible with two or more links and frequency bands in a space as small as possible, and increasing the compatibility of circuit design while reducing the space of the PCB occupied by the devices and circuits.

(60) If the integrated module according to the embodiments of the present disclosure is implemented in the form of a software function module and is sold or used as an independent product, it may be stored in a computer-readable storage medium. Based on such understanding, the essential part or the part contributing to the prior art of the technical solution of the embodiments of the present disclosure may be implemented in the form of a software product. The computer software product is stored in a storage medium, and includes several instructions for instructing a computer device (which may be a personal computer, a server, a network device, or the like) to execute all or a part of the method according to individual embodiments of the present disclosure. The aforementioned storage medium includes: any medium that is capable of storing program codes, such as a USB disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk. In this way, the embodiments of the present disclosure are not restricted to any particular combination of hardware and software.

(61) The above is merely preferred embodiments of the present disclosure, but is not intended to limit the protection scope of the present disclosure.

INDUSTRIAL APPLICABILITY

(62) The compatible circuit according to the embodiments of the present disclosure includes: the printed circuit board PCB with an unchanged existing structure, and a group of compatible devices which are in a Pin-to-Pin form and have different internal structures, wherein the compatible devices and the PCB are assembled together; the internal structures of the compatible devices are matched with a link compatibility selection requirement; and the compatible devices are configured to conduct a link selection output on at least two links which are inputted and need compatibility according to the link compatibility selection requirement. Because the link selection output complied with the link compatibility selection requirement is implemented through the compatible devices without changing the PCB, the embodiments of the present disclosure have compatibility, so that all the terminal parts are unnecessary to be designed on one PCB, and an additional cost will not be increased.