Process of manufacturing an open pattern inductor
09929229 ยท 2018-03-27
Assignee
Inventors
Cpc classification
Y10T29/49069
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
Y10T29/49075
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
Y10T29/4902
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
Y10T29/49073
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H01L27/08
ELECTRICITY
Y10T29/4906
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
Y10T29/49071
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
International classification
Abstract
Various embodiments includes a stacked open pattern inductor fabricated above a semiconductor substrate. The stacked open pattern inductor includes a plurality of parallel open conducting patterns embedded in a magnetic oxide or in an insulator and a magnetic material. A layer of magnetic material may be located above the inductor and below the inductor to confine electronic noise generated in the stacked open pattern inductor to the area occupied by the inductor. The stacked open pattern inductor may include a magnetic material directly contacts one of the conducting patterns and the substrate. The stacked open pattern inductor may be fabricated using conventional integrated circuit manufacturing processes, and the inductor may be used in connection with computer systems.
Claims
1. A method comprising: forming an inductor including forming a first conductive pattern over a semiconductor substrate and forming a second conductive pattern over the same semiconductor substrate that the first conductive pattern is formed, such that the first and second conductive patterns are arranged in a stack over the same semiconductor substrate, wherein the first conductive pattern is formed such that the first conductive pattern includes an outermost open pattern including outermost segments and an interior area that includes an entire area between the outermost segments of the outermost on pattern and such that the interior area is free of additional portions of the first conductive pattern, and the second conductive pattern is formed such that the second conductive pattern includes an outermost on pattern including outermost segments and an interior area that includes an entire area between the outermost segments of the outermost open pattern of the second conductive pattern and such that the interior area of the second conductive pattern is free of additional portions of the second conductive pattern, and wherein a direction from the interior area of the first conductive pattern to the outermost open pattern of the first conductive pattern is parallel to a surface of the semiconductor substrate, and a direction from the interior area of the second conductive pattern to the outermost open pattern of the second conductive pattern is parallel to a surface of the semiconductor substrate; forming a conductive path coupled to the first and second conductive patterns; forming a magnetic material overlying the semiconductor substrate, wherein the magnetic material is formed such that the first conductive pattern directly contacts the magnetic material, and the magnetic material directly contacts the semiconductor substrate; forming a first additional magnetic material overlying the first conductive pattern after the first conductive pattern is formed; forming a first hole in the first additional magnetic material to expose a portion of the first conductive pattern at the first hole; forming a first conductive segment of the conductive path in the first hole, the first conductive segment of the conductive path contacting the portion of the first conductive pattern; forming a second additional magnetic material overlying the second conductive pattern after the first conductive segment of the conductive path and the second conductive pattern are formed; forming a second hole in the second additional magnetic material to expose a portion of the second conductive pattern at the second hole; forming a second conductive segment of the conductive path in the second hole, the second conductive segment of the conductive path contacting the portion of the second conductive pattern; and forming a third conductive pattern overlying the second additional magnetic material after the second conductive segment of the conductive path is formed, the third conductive pattern is formed such that a portion of third conductive pattern contacts the second conductive segment of the conductive path.
2. The method of claim 1, wherein the first additional magnetic material is between the first and second conductive patterns.
3. The method of claim 2, wherein the first additional magnetic material is formed, such that a portion of the first additional magnetic material fills the interior area of the first conductive pattern.
4. The method of claim 2, wherein the first conductive pattern is formed such that the first conductive pattern includes an outside edge, and the first additional magnetic material is formed such that the first additional magnetic material extends beyond the outside edge of the first conductive pattern.
5. The method of claim 1, wherein: the first additional magnetic material includes magnetic oxide; and the second additional magnetic material includes magnetic oxide.
6. The method of claim 1, wherein the second additional magnetic material fills the interior area of the second conductive pattern.
7. The method of claim 1, wherein the third additional magnetic material fills the interior area of the third conductive pattern.
8. The method of claim 1, wherein the second conductive pattern is formed over the first conductive pattern and the semiconductor substrate after the first conductive pattern is formed over the semiconductor substrate.
9. The method of claim 1, wherein the first conductive pattern is formed such that the first conductive pattern includes an outside edge, and the first additional magnetic material is formed such that the first additional magnetic material extends beyond the outside edge of the first conductive pattern.
10. The method of claim 9, wherein the second conductive pattern is formed such that the second conductive pattern includes an outside edge, and the second additional magnetic material is formed such that the second additional magnetic material extends beyond the outside edge of the second conductive pattern.
11. The method of claim 10, wherein the third conductive pattern is formed such that the third conductive pattern includes an outside edge, and the third additional magnetic material is formed such that the third additional magnetic material extends beyond the outside edge of the third conductive pattern.
12. A method comprising: forming a first conductive pattern of an inductor over a semiconductor substrate, wherein the first conductive pattern is formed such that the first conductive pattern includes outermost segments and an interior area that includes an entire area between the outermost segments, the interior area is free of additional portions of the first conductive pattern, and wherein the outermost segments of the first conductive pattern include a first outermost segment, a second outermost segment, and a third outermost segment contacting the first and second outermost segments, and a direction between the first and second outermost segments of the first conductive pattern is parallel to a surface of the semiconductor substrate; forming a second conductive pattern of the inductor over the semiconductor substrate after the first conductive pattern is formed, wherein the second conductive pattern is formed such that the second conductive pattern includes outermost segments and an interior area that includes an entire area between the outermost segments, the interior area is free of additional portions of the second conductive pattern, and wherein the outermost segments of the second conductive pattern include a first outermost segment, a second outermost segment, and a third outermost segment contacting the first and second outermost segments, and a direction between the first and second outermost segments of the second conductive pattern is parallel to the surface of the semiconductor substrate; forming a third conductive pattern of the inductor over the semiconductor substrate after the second conductive pattern is formed, wherein the third conductive pattern is formed such that the third conductive pattern includes outermost segments and an interior area that includes an entire area between the outermost segments, the interior area is free of additional portions of the third conductive pattern, and wherein the outermost segments of the second conductive pattern include a first outermost segment, a second outermost segment, and a third outermost segment contacting the first and second outermost segments, and a direction between the first and second outermost segments of the third conductive pattern is parallel to the surface of the semiconductor substrate; forming a conductive path coupled to the first, second, and third conductive patterns, wherein the conductive path includes a first segment coupled to a portion of the first conductive pattern and a first portion of the second conductive pattern, and a second segment coupled to a second portion of the second conductive pattern and a portion of the third conductive pattern; and forming a magnetic material overlying the semiconductor substrate, wherein the magnetic material is formed such that the first conductive pattern directly contacts the magnetic material, and the magnetic material directly contacts the semiconductor substrate.
13. The method of claim 12, further comprising: forming a first additional magnetic material overlying the first conductive pattern after the first conductive pattern is formed; forming a first hole in the first additional magnetic material to expose the portion of the first conductive pattern at the first hole; and forming the first segment of the conductive path in the first hole.
14. The method of claim 13, further comprising: forming a second additional magnetic material overlying the second conductive pattern after the first segment of the conductive path and the second conductive pattern are formed; forming a second hole in the second additional magnetic material to expose the second portion of the second conductive pattern at the second hole; and forming the second segment of the conductive path in the second hole.
15. The method of claim 14, wherein the first additional magnetic material includes magnetic oxide.
16. The method of claim 15, wherein the second additional magnetic material includes magnetic oxide.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION OF THE INVENTION
(13) In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that structural, logical and electrical changes may be made without departing from the spirit and scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
(14) Inductors intended for use in circuits fabricated on a silicon substrate usually operate at lower frequencies and require larger inductances than inductors intended for use in circuits fabricated on a gallium arsenide substrate. As mentioned above, a larger inductance is usually realized in silicon by having the inductor occupy a larger surface area. According to one embodiment of the present invention, rather than increasing the inductance by increasing the surface area occupied by the inductor, a larger inductance is achieved by encapsulating an inductor in a magnetic material.
(15) Referring to
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(17) In the embodiment shown in
(18) Referring to
(19) Open conductive pattern 103 has a cross-sectional area. As the cross-sectional area decreases, the resistance increases, and the current carrying capacity of open conductive pattern 103 decreases. So, the cross-sectional area of open conductive pattern 103 is selected to ensure that open conductive pattern 103 is capable of carrying the anticipated operating current.
(20) Open conductive pattern 103, as shown in
(21) Referring to
(22) Open conductive pattern 106 has a cross-sectional area. As the cross-sectional area decreases, the resistance increases, and the current carrying capacity of open conductive pattern 106 decreases. So, the cross-sectional area of open conductive pattern conductor 106 is selected to ensure that open conductive pattern 106 is capable of carrying the anticipated operating current.
(23) Open conductive pattern 106, as shown in
(24) Referring to
(25) Open conductive pattern 109 has a cross-sectional area. As the cross-sectional area decreases, the resistance increases, and the current carrying capacity of open conductive pattern 109 decreases. So, the cross-sectional area of open conductor 109 is selected to ensure that open conductive pattern 109 is capable of carrying the anticipated operating current.
(26) As described briefly above, in a stacked open conductor inductor, each open conductive pattern can be fabricated from a different material. For example, open conductor pattern 103 can be fabricated from aluminum, open conductor pattern 106 can be fabricated from copper, and open conductor pattern 109 can be fabricated from gold. This provides a flexible environment for an inductor designer. In this environment, the designer can carefully control the heat generated by open pattern inductor 100, shown in
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(29) Magnetic material layer 206 is deposited on substrate 203, open inductor pattern 209 is deposited on magnetic material layer 206, magnetic material layer 212 is deposited above magnetic material layer 206, open inductor pattern 218 is deposited on magnetic material layer 212, magnetic material layer 221 is deposited above magnetic material layer 212, open inductor pattern 227 is deposited on magnetic material layer 221, and magnetic material layer 233 is deposited above magnetic material layer 221.
(30) Substrate 203 is preferably a semiconductor, such as silicon. Alternatively, substrate 203 is gallium arsenide, germanium, or some other substrate material suitable for use in the manufacturing of integrated circuits.
(31) Magnetic material layer 206 is deposited on the surface of substrate 203. Magnetic material layers 212, 221, and 233 are deposited to fill the interior area of open conductors 209, 218, and 227. Filling the interior area of open conductors 209, 218, and 227 with a magnetic material increases the inductance of open pattern inductor 200. The particular type of the magnetic material selected for use in a particular inductor design depends on the inductance requirement.
(32) Magnetic material layer 206, in one embodiment, extends beyond outside edge 231 of open conductive pattern 231. One advantage of extending magnetic material layer 206 beyond outside edge 231 of open conductive pattern 209 is that the magnetic flux generated by inductor 200 can be confined to the area occupied by inductor 200. In an alternate embodiment, each magnetic material layer 212, 221, and 233 can be extended beyond outside edge 231 of open conductive pattern 209. The amount of the extension is selected based on the anticipated current in inductor 200 and the magnetic permeability of magnetic material layers 212, 221, and 233. In one embodiment, the extension is less than about a millimeter, and in other embodiments the extension is less than one-half millimeter or one-tenth millimeter.
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(34) Referring to
(35) Referring to
(36) The description of
(37) Referring to
(38) Magnetic material layer 306 is deposited on substrate 303, insulating layer 309 is deposited on magnetic material layer 306, rectangular open inductor pattern 312 is deposited on insulating layer 309, second insulating layer 315 is deposited on rectangular open inductor pattern 312, and second magnetic material layer 318 is deposited on second insulating layer 315.
(39) Substrate 303, in one embodiment, is a semiconductor. Silicon is preferred, but the substrate 303 is not limited to a particular type of material. Germanium, gallium arsenide, and silicon-on-sapphire are all materials suitable for use as a substrate in the present invention.
(40) Magnetic material layer 306, in one embodiment, is deposited on the surface of substrate 303. The particular magnetic material selected for use in a particular inductor design depends on the inductance requirement. In one embodiment, in which a large inductance in a small volume is desired, a high permeability ferromagnetic material, such as pure iron or a NiFe alloy is selected. An example of a high permeability NiFe alloy is an alloy of 81% Ni and 19% Fe.
(41) Insulating layer 309 is deposited on magnetic material layer 306. In one embodiment, insulating layer 309 is an inorganic silicon oxide film. In an alternate embodiment, insulating layer 309 is silicon dioxide. In still another embodiment, which is perhaps preferable in a low temperature processing environment, insulating layer 309 is an organic insulator, such as parylene and polyimide.
(42) Rectangular open inductor pattern 312 is deposited on insulating layer 309. In an alternate embodiment, open inductor pattern 312 is an open circle. In a second alternate embodiment, inductor pattern 312 is a open polygon, where the open polygon may be in the shape of a triangle, square, rectangle, octagon, or hexagon. A rectangular open inductor pattern, which is shown as inductor pattern 312 in
(43) Referring to
(44) Second magnetic material layer 318 is deposited on second insulating layer 315, and is fabricated from the same materials as magnetic material layer 306. Second magnetic material layer 306 is preferably located above inductor pattern 312, and second magnetic material layer 318 does not intersect the plane of magnetic material layer 306.
(45) The contribution of the magnetic material layer 306 to the inductance of inductor 300 can be precisely controlled during the manufacturing process. The thickness of the layer of magnetic material along with the magnetic properties of the material define the contribution of the layer to the inductance of the inductor. Once the properties of the material are established during the preparation of the material, the thickness of the layer, which can be precisely controlled in an integrated circuit manufacturing process, defines the contribution of the layer of magnetic material to the inductance.
(46) Referring to
(47) Conductive path 347 couples sandwich structure 336 to second sandwich structure 339, and serially connects open inductor pattern 359 to inductor pattern 371. A current flowing in the serially connected inductor patterns creates a reinforcing magnetic field in magnetic material layer 365. Magnetic material layers 353 and 389 are located below inductor pattern 359 and above inductor pattern 383, respectively. Magnetic material layers 353 and 389 confine the magnetic flux and noise radiated by a current flowing in inductor patterns 359, 368, and 383 to the area bounded by the outer surfaces of magnetic material layers 353 and 389. By stacking sandwich structures, in one embodiment, a large inductance can be created without increasing the surface area on a substrate occupied by the inductor.
(48) The inductor of the present invention can be connected to other electronic devices in an integrated circuit. The inductor of the present invention is compatible with conventional silicon manufacturing processes, and structures for coupling passive devices, such as inductors, to other integrated circuit devices are known in the art.
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CONCLUSION
(51) Various embodiments solve many of the problems listed above and others which will become known to those skilled in the art upon reading and understanding the present disclosure. Some embodiments include a stacked open pattern inductor fabricated above a semiconductor substrate. The stacked open pattern inductor includes a plurality of parallel open conductive patterns embedded in a magnetic oxide or an insulator and a magnetic material. Embedding the stacked open pattern inductor in a magnetic oxide or in an insulator and a magnetic material increases the inductance of the inductor and allows the magnetic flux to be confined to the area of the inductor. A layer of magnetic material may be located above the inductor and below the inductor to confine electronic noise generated in the stacked open pattern inductor to the area occupied by the inductor. The stacked open pattern inductor may be fabricated using conventional integrated circuit manufacturing processes, and the inductor may be used in connection with computer systems.
(52) Several embodiments of an inductor and a method for fabricating inductors in an integrated circuit have been described. These embodiments are compatible with standard integrated circuit manufacturing processes, and provide flexibility in the selection of conductors and magnetic materials used in the construction of an inductor. Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that any arrangement which is calculated to achieve the same purpose may be substituted for the specific embodiment shown. This application is intended to cover any adaptations or variations of the present invention. Therefore, it is manifestly intended that this invention be limited only by the claims and the equivalents thereof.