Delta modulator receive channel for capacitance measurement circuits
09923572 ยท 2018-03-20
Assignee
Inventors
- Rishi Raghav Bacchu (San Jose, CA, US)
- Kaveh Hosseini (Cork, IE)
- Dermot MacSweeney (Cork, IE)
- Paul M. Walsh (Cork, IE)
- Kofi Makinwa (San Jose, CA, US)
Cpc classification
H03M3/322
ELECTRICITY
H03F2203/45288
ELECTRICITY
H03F2203/45146
ELECTRICITY
International classification
H03M3/00
ELECTRICITY
Abstract
A circuit, system, and method for measuring capacitance are described. A current may be received at an input of a conversion circuit. The current may be converted to a voltage signal which may be used to create a negative feedback current to the input of the conversion circuit and which may be demodulated digitally to provide a static digital output representative of a capacitance.
Claims
1. A receive channel comprising: an input configured to receive a first signal from a receive electrode, wherein the first signal is a current induced on the receive electrode by a drive signal on a drive electrode and a mutual capacitance between the receive electrode and the transmit electrode; a conversion circuit configured to convert the first signal to a second signal, wherein the receive electrode is coupled to a first input of the conversion circuit and wherein a second input of the conversion circuit is coupled to a reference voltage; a quantizer circuit configured to convert the second signal to a bitstream; a filter circuit coupled to the quantizer and configured to provide a filtered output of the bitstream from the quantizer circuit; a current source coupled between the output of the filter circuit and the conversion circuit, the current source configured to provide a feedback current to an input of the conversion circuit; and a demodulation circuit coupled to the output of the filter circuit, the demodulation circuit configured to generate a static output of the receive channel.
2. The receive channel of claim 1, wherein the conversion circuit is a transimpedance amplifier.
3. The receive channel of claim 1, wherein the output of the filter circuit is offset to produce a nominal zero current at an input of the conversion circuit.
4. The receive channel of claim 1, wherein the filter circuit is a filter configured to isolate a fundamental signal from the output of the quantizer circuit.
5. The receive channel of claim 1, wherein the conversion circuit is configurable to operation in a mutual capacitance mode in a first mode and in a self capacitance mode in a second mode.
6. A receive channel comprising: an input configured to receive a first signal from a receive electrode, wherein the first signal from the receive electrode is a current induced on the self capacitance by the receive electrode coupled to the conversion circuit and the switching voltage potential; a conversion circuit configured to convert the first signal to a second signal, wherein the receive electrode is coupled to a first input of the conversion circuit and wherein a second input of the conversion circuit is coupled to a switching voltage potential; a quantizer circuit configured to convert the second signal to a bitstream; a filter circuit coupled to the quantizer and configured to provide a filtered output of the bitstream from the quantizer circuit; a current source coupled between the output of the filter circuit and the conversion circuit, the current source configured to provide a feedback current to an input of the conversion circuit; and a demodulation circuit coupled to the output of the filter circuit, the demodulation circuit configured to generate a static output of the receive channel.
7. The receive channel of claim 6, wherein the conversion circuit is a transimpedance amplifier.
8. The receive channel of claim 6, wherein the output of the filter circuit is offset to produce a nominal zero current at an input of the conversion circuit.
9. The receive channel of claim 6, wherein the filter circuit is a filter configured to isolate a fundamental signal from the output of the quantizer circuit.
10. The receive channel of claim 6, wherein the conversion circuit is configurable to operation in a mutual capacitance mode in a first mode and in a self capacitance mode in a second mode.
Description
DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION
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(9) Capacitance measurement system 100 may be configured to measure either mutual capacitance or self capacitance, depending on application requirements. A mutual capacitance, C.sub.M, may be formed between electrodes of different axis. A mutual capacitance, C.sub.M, between a row electrode 111 and a column electrode 115 is shown in cutout 113. Mutual capacitance CM may be formed by two electrodes disposed adjacent to each other, though not necessarily intersecting. A self capacitance, C.sub.S, of a single electrode may be formed between the electrode and the surrounding circuit elements, including a ground electrode. Self capacitances, C.sub.S-column and C.sub.S-row, are shown for row electrode 111 and column electrode 115, respectively, in cutout 117. For self capacitance measurement, electrodes may be disposed so that none interest with eachother. In this embodiment, self capacitance electrodes may be configured as pads or discrete electrodes with a capacitance to ground or other circuit voltage potentials. Self capacitance electrodes may take the form of circles, ellipses, squares, rectangles, or have any of a variety of other shapes that are optimized for system requirements. In one embodiment, capacitance measurement system 100 may be configured to switch between a mutual capacitance sensing mode and a self capacitance sensing mode based on application requirements. In still another embodiment, capacitance measurement system 100 may be fixed as either a mutual capacitance measurement system or a self capacitance measurement system.
(10) Capacitance measurement system 100 may include a capacitance measurement circuit 140 coupled to column electrodes 115. Each of the column electrodes 115 may be coupled to RX channel 150 through an input multiplexer 145. The embodiment illustrated in
(11) When capacitance measurement system 100 is configured to measure mutual capacitance, row electrodes may be coupled to driver buffers 120 for providing a drive signal, TX, to one electrode of a mutual capacitance (shown in detail in cutout 113). While only eight drive buffers 120 are shown in
(12) In mutual capacitance sensing, a single axis may be coupled to RX channel 150. While
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(14) In one embodiment, quantizer 240 may oversample the TX input. The TX frequency on panel 210 may be 500 kHz, while the quantizer frequency (provided by a system clock, not shown) may be 6 MHz. In other embodiments, higher quantizer frequencies may be used (and provided by other clock sources). Higher oversampling ratios may provide better resolution from the receive channel
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(17) Delta modulator RX channel 400 may include comparator 440 coupled to the output of TIA 430. In one embodiment, comparator 440 may represent S/H 230 and quantizer 240 of
(18) Demodulator 480 may operate by receiving a digital code from adder 470. Add 470 may provide a digital offset configured to produce a nominal zero current from the output of the IDAC (source current IDAC 423 and sink current IDAC 427). In one embodiment, a fixed source current on source current IDAC 423 and a variable sink current on IDAC 427 may be used. In this embodiment, adder 470 may provide an offset to sink the fixed source current from source current IDAC 423, thereby cancelling the fixed source current and outputting a net zero current. In another embodiment, both the source current and the sink current may be programmable, with upper and lower bits from BPF 460 to drive the source current and sink current, respectively.
(19) The code from adder 470 may be converted from a dynamic signal to a static signal. The code from adder 470 may be converted to a static signal by multiplying it by a pattern. In one embodiment, the switching current on the output of BPF 460 may have the following pattern, or code: +2, 2, +2, 2, +2, 2, +2. Demodulator 480 may multiply the output of BPF 460 by the following pattern, or code: +1, 1, +1, 1, +1, 1, +1. The output of demodulator 480 may therefore be: +2, +2, +2, +2, +2, +2, +2. The output of demodulator 480 is therefore static.
(20) The static output of demodulator 480 may be used to determine the presence or absence of a conductive object on the panel according to various methods known in the art, including but not limited to baseline difference calculation. Baseline difference calculation may compare the output of demodulator 480 to a baseline value representative of an absence of a conductive object on mutual capacitance C.sub.M 420 (panel 210 of
(21) In one embodiment, BPF 460 may have a pass band centered on the frequency of transmit signal TX. In this embodiment, BPF 460 may pass the transmit signal TX, but reject signals with frequencies outside that band. BPF 460 may be digital and implemented with a biquad. The biquad may be programmed to implement multiple filter topologies, including but not limited to band pass and low pass filters.
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(23) For the embodiments of
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(26) The embodiments described herein may be used in various designs of mutual-capacitance sensing arrays of the capacitance sensing system, or in self-capacitance sensing arrays. In one embodiment, the capacitance sensing system detects multiple sense elements that are activated in the array, and can analyze a signal pattern on the neighboring sense elements to separate noise from actual signal. The embodiments described herein are not tied to a particular capacitive sensing solution and can be used as well with other sensing solutions, including optical sensing solutions, as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure.
(27) In the above description, numerous details are set forth. It will be apparent, however, to one of ordinary skill in the art having the benefit of this disclosure, that embodiments of the present invention may be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring the description.
(28) Some portions of the detailed description are presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm is here and generally, conceived to be a self-consistent sequence of steps leading to a desired result. The steps are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers or the like.
(29) It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the above discussion, it is appreciated that throughout the description, discussions utilizing terms such as encrypting, decrypting, storing, providing, deriving, obtaining, receiving, authenticating, deleting, executing, requesting, communicating, or the like, refer to the actions and processes of a computing system, or similar electronic computing device, that manipulates and transforms data represented as physical (e.g., electronic) quantities within the computing system's registers and memories into other data similarly represented as physical quantities within the computing system memories or registers or other such information storage, transmission or display devices.
(30) The words example or exemplary are used herein to mean serving as an example, instance or illustration. Any aspect or design described herein as example or exemplary is not necessarily to be construed as preferred or advantageous over other aspects or designs. Rather, use of the words example or exemplary is intended to present concepts in a concrete fashion. As used in this application, the term or is intended to mean an inclusive or rather than an exclusive or. That is, unless specified otherwise, or clear from context, X includes A or B is intended to mean any of the natural inclusive permutations. That is, if X includes A; X includes B; or X includes both A and B, then X includes A or B is satisfied under any of the foregoing instances. In addition, the articles a and an as used in this application and the appended claims should generally be construed to mean one or more unless specified otherwise or clear from context to be directed to a singular form. Moreover, use of the term an embodiment or one embodiment or an implementation or one implementation throughout is not intended to mean the same embodiment or implementation unless described as such.
(31) Embodiments described herein may also relate to an apparatus for performing the operations herein. This apparatus may be specially constructed for the required purposes, or it may comprise a general-purpose computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a non-transitory computer-readable storage medium, such as, but not limited to, any type of disk including floppy disks, optical disks, CD-ROMs and magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), EPROMs, EEPROMs, magnetic or optical cards, flash memory, or any type of media suitable for storing electronic instructions. The term computer-readable storage medium should be taken to include a single medium or multiple media (e.g., a centralized or distributed database and/or associated caches and servers) that store one or more sets of instructions. The term computer-readable medium shall also be taken to include any medium that is capable of storing, encoding or carrying a set of instructions for execution by the machine and that causes the machine to perform any one or more of the methodologies of the present embodiments. The term computer-readable storage medium shall accordingly be taken to include, but not be limited to, solid-state memories, optical media, magnetic media, any medium that is capable of storing a set of instructions for execution by the machine and that causes the machine to perform any one or more of the methodologies of the present embodiments.
(32) The algorithms and displays presented herein are not inherently related to any particular computer or other apparatus. Various general-purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct a more specialized apparatus to perform the required method steps. The required structure for a variety of these systems will appear from the description below. In addition, the present embodiments are not described with reference to any particular programming language. It will be appreciated that a variety of programming languages may be used to implement the teachings of the embodiments as described herein.
(33) The above description sets forth numerous specific details such as examples of specific systems, components, methods and so forth, in order to provide a good understanding of several embodiments of the present invention. It will be apparent to one skilled in the art, however, that at least some embodiments of the present invention may be practiced without these specific details. In other instances, well-known components or methods are not described in detail or are presented in simple block diagram format in order to avoid unnecessarily obscuring the present invention. Thus, the specific details set forth above are merely exemplary. Particular implementations may vary from these exemplary details and still be contemplated to be within the scope of the present invention.
(34) It is to be understood that the above description is intended to be illustrative and not restrictive. Many other embodiments will be apparent to those of skill in the art upon reading and understanding the above description. The scope of the invention should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.