Image capture device
09922793 ยท 2018-03-20
Inventors
Cpc classification
H01J35/065
ELECTRICITY
H01J29/46
ELECTRICITY
International classification
H01J29/46
ELECTRICITY
H01J29/02
ELECTRICITY
Abstract
An image capture device and an x-ray emitting device are introduced comprising an electron receiving construct and an electron emitting construct separated by a spacer. The electron receiving construct comprises a faceplate, an anode and an inward facing photoconductor. The electron emitting construct comprises: a backplate; a substrate; a cathode; a plurality of field emission type electron sources arranged in an array; a stratified resistive layer between the field emission type electron source and the cathode; a gate electrode; a focus structure and a gate electrode support structure configured to support the gate electrode at a required cathode-gate spacing from the cathode.
Claims
1. An electron emitting construct operable to direct electrons to an electron receiving construct separated therefrom by at least one spacer situated such that an unobstructed inner gap is present between said electron receiving construct and said electron emitting construct, said electron emitting construct comprising: a backplate; a substrate; a cathode; a gate electrode; a plurality of field emission type electron sources arranged in an array, said field emission type electron sources configured to emit an electron beam towards said electron receiving construct; a stratified resistive layer situated between the array of field emission type electron sources and the cathode; wherein said stratified resistive layer comprises at least a proximal resistor stratum closest to said field emission type electron sources, and a distal resistor stratum further from said field emission type electron sources, said proximal resistor stratum comprising a first resistive material having a first characteristic resistivity, and said distal resistor stratum comprising a second resistive material having a second characteristic resistivity, said first characteristic resistivity being greater than said second characteristic resistivity, and wherein at least one resistor stratum comprises at least one silicon carbide crystal.
2. The electron emitting construct of claim 1 wherein said stratified resistive layer further comprises at least one intermediate resistor stratum between said proximal resistor stratum and said distal resistor stratum, said at least one intermediate resistor stratum comprising at least a third resistive material having a characteristic resistivity intermediate between said first characteristic resistivity and said second characteristic resistivity.
3. The electron emitting construct of claim 2 wherein said intermediate resistor stratum comprises an amorphous silicon carbonitride film.
4. The electron emitting construct of claim 1 wherein said proximal resistor stratum comprises SiOCN.
5. The electron emitting construct of claim 1 wherein said proximal resistor stratum comprises a silicon carbide wafer.
6. The electron emitting construct of claim 1 wherein distal resistor stratum comprises a silicon carbide wafer.
7. The electron emitting construct of claim 1 wherein said distal resistor stratum comprises Si.
8. The electron emitting construct of claim 1, said stratified resistive layer comprising at least one resistive stratum comprising a resistive material, and at least one of a first barrier stratum interposed between said resistive material and said cathode or a second barrier stratum interposed between said resistive material and said field emission type electron sources.
9. The electron emitting construct of claim 8 wherein at least one of said first barrier stratum and said second barrier stratum comprises a material selected from an unreactive material selected from the group consisting of: carbon rich siliconcarbide, nitrogen rich silicon carbonitride, amorphous carbon and combinations thereof.
10. The electron emitting construct of claim 1 further comprising a gate electrode support structure is configured to support said gate electrode at a cathode-gate spacing such that a surface path between said cathode and said gate electrode is greater than said cathode-gate spacing.
11. The electron emitting construct of claim 10 wherein said gate electrode support structure comprises a stratified interlayer comprising at least one stratum of a first material and at least one stratum of a second material wherein said first material is more readily etched than said second material.
12. The electron emitting construct of claim 11, characterized by at least one limitation selected from: said stratified interlayer comprising at least one stratum of a low density material and at least a one stratum of a high density material; said stratified interlayer comprising at least one stratum of silicon dioxide; said stratified interlayer comprising at least one stratum of high density silicon dioxide and at least one stratum of low density silicon dioxide; said stratified interlayer comprising at least one stratum of silicon dioxide and at least one stratum of silicon oxynitride.
13. The electron emitting construct of claim 1 comprising a gate electrode support structure comprising a plurality of support columns arranged in an array having a regular column-spacing between said support columns wherein said column-spacing is greater than source-spacing between said electron sources.
14. The electron emitting construct of claim 13 wherein said support columns are configured such that the column-source spacing between at least one said support column and at least one neighboring electron source is greater than a source-spacing between said electron sources.
15. The electron emitting construct of claim 1 further comprising a plurality of first focus structures arranged in an array, each of said first focus structures comprising a first focus electrode, wherein the first focus structure surrounds a unit cell comprising a subset of said field emission type electron sources, said unit cell defining an emitter area.
16. The electron emitting construct of claim 15, further comprising an array of second focus structures comprising a second focus electrode.
17. An image capture device comprising the electron emitting construct of claim 1 and said electron receiving construct, wherein said electron receiving construct comprises a faceplate, an anode and an inward facing photoconductor and said plurality of field emission type electron sources are configured to direct said electron beam towards said photoconductor.
18. An x-ray emitting device comprising the electron emitting construct of claim 1 and said electron receiving construct, wherein said electron receiving construct comprises an x-ray target anode and said plurality of field emission type electron sources are configured to direct said electron beam towards said x-ray target.
19. An x-ray imaging device comprising: an x-ray emitting device comprising a first electron emitting construct of claim 1 configured to direct a first electron beam towards said x-ray target; and an image capture device comprising a second electron emitting construct of claim 1 configured to direct a second electron beam towards an inward facing photoconductor.
20. An electron emitting construct operable to direct electrons to an electron receiving construct separated therefrom by at least one spacer situated such that an unobstructed inner gap is present between said electron receiving construct and said electron emitting construct, said electron emitting construct comprising: a backplate; a substrate; a cathode; a gate electrode; a plurality of field emission type electron sources arranged in an array, said field emission type electron sources configured to emit an electron beam towards said electron receiving construct; a stratified resistive layer situated between the array of field emission type electron sources and the cathode; wherein said stratified resistive layer comprises at least a proximal resistor stratum closest to said field emission type electron sources, and a distal resistor stratum further from said field emission type electron sources, said proximal resistor stratum comprising a first resistive material having a first characteristic resistivity, and said distal resistor stratum comprising a second resistive material having a second characteristic resistivity, said first characteristic resistivity being greater than said second characteristic resistivity, said stratified resistive layer further comprises at least one intermediate resistor stratum between said proximal resistor stratum and said distal resistor stratum, said at least one intermediate resistor stratum comprising at least a third resistive material having a characteristic resistivity intermediate between said first characteristic resistivity and said second characteristic resistivity.
Description
BRIEF DESCRIPTION OF THE FIGURES
(1) For a better understanding of the embodiments and to show how it may be carried into effect, reference will now be made, purely by way of example, to the accompanying drawings.
(2) With specific reference now to the drawings in detail, it is stressed that the particulars shown are by way of example and for purposes of illustrative discussion of selected embodiments only, and are presented in the cause of providing what is believed to be the most useful and readily understood description of the principles and conceptual aspects. In this regard, no attempt is made to show structural details in more detail than is necessary for a fundamental understanding; the description taken with the drawings making apparent to those skilled in the art how the several selected embodiments may be put into practice. In the accompanying drawings:
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DETAILED DESCRIPTION OF THE INVENTION
(32) Reference is now made to
(33) The electron emitting construct 110 may comprise a backplate 5, a substrate 6, a cathode electrode 7, an array of field emission type electron sources 9 and a gate electrode 10. The electron receiving construct 120 may comprise faceplate 1, an anode 2 and an inward facing photoconductor 3. The electron emitting construct 110 may further comprise a plurality of first focus structures 11 arranged in an array, each of said first focus structures 11 comprising a first focus electrode 12. In certain embodiments, the electron emitting construct 110 may further comprise a plurality of second focus structures 13 comprising a second focus electrode 14 (see
(34) The image capture device may further comprise a resistive layer 8 situated between the cathode 7 and the field emission type electron sources 9, in order to regulate the current into the field emission type electron sources 9.
(35) The field emission type electron source 9 may be activated to emit an electron beam 20 that is directed towards the photoconductor 3. The field emission type electron source 9 is situated between the anode 2 and the cathode 7 such that the electron beam emitted by the field emission type electron source 9 is accelerated towards the anode. The photoconductor 3 may be situated between the emission-type electron source 9 and the anode 2, such that the emitted electrons strike the photoconductor 3.
(36) It is particularly noted that a grid electrode, which is generally situated in a prior art image capture device between the electron emitting construct 110 and the electron receiving construct 120, is not typically present in the image capture device of the disclosure. A grid electrode may be a thin material with an array of small openings having a grid-, mesh- or sieve-like structure, positioned between the anode and cathode. The grid electrode may be referred to as a mesh electrode, a control grid or a trimming electrode. In the prior art system shown in
(37) The Substrate of the Electron Emission Construct
(38) With reference to
(39) The Field Emission Type Electron Source
(40) With reference to
(41) The electron sources 59 may be situated within emitter areas 75 as groups of co-activated units. Each emitter area 75 is connectable to a row driver and a column driver (not shown), which controls the coordination of the activation of the driving circuit and the gate electrode 60 of the electron sources 59.
(42) The field emission type electron source 9 may be, e.g., a Spindt type electron source, a carbon nanotube (CNT) type electron source, a metal-insulator-metal (MIM) type electron source or a metal-insulator-semiconductor (MIS) type electron source. In a preferred embodiment, the electron source 9 may be a Spindt type electron source.
(43) Anode and Cathode
(44) With reference to
(45) Focus Structures
(46) With reference to
(47) With reference to
(48) In certain embodiments, the image capture device of the disclosure may further comprise, in the electron emitter construct 110, an array of second focus structures 13 comprising a second focus electrode 14. Each second focus structure 13 may be adjacent and inward-facing in relation to each of the first focus structures 11 (with first focus electrodes 12), such that an electron emitting construct 110 comprises, in aggregate, a double focus structure facing the electron receiving construct 120. The second focus electrode 14 may be configured to further accelerate the electrons emitted from the corresponding emitter area 25 through the application of a second focus voltage, thus further focusing the emitted electron beam. It will be appreciated that the electron emitting construct 110 may comprise additional focus structures, resulting in an aggregate focus structure that is tripled, quadrupled, or the like.
(49) The focus structures with the focus electrodes (e.g., first focus structure 11 with first focus structure 12 and/or second focus structure 13 with second focus structure 14) may further function as a drain for misdirected electrons. In certain embodiments, the first focus electrode 12 may be positioned to cover a signal line of the driving circuit for the field emission type electron source 9, thus reducing radiation noise in the signal lines by protecting the signal lines from irradiation by misdirected electrons.
(50) It is particularly noted that a focus structure such as described herein may be used in the electron emitting construct of an image capture device or of an x-ray emitting device as suits requirements.
(51) Pixel Pitch and Device Thickness
(52) As described above, and with reference to
(53) Pixel pitch is a specification of a pixel-based image capture device that is known in the art. Pixel pitch may be expressed, e.g., as the distance between adjacent pixels. See, e.g., distance b in
(54) Another specification used in flat panel image capture devices is device thickness. The thickness of the image capture device may be expressed as, e.g., the distance between a field emission type electron source 9 and the orthogonal position on the anode 2 (shown as distance a in
(55) A discussed above, the image capture device of the disclosure is designed to improve electron utilization efficiency of the image capture device, i.e., to increase the portion of electrons being emitted from the field emission type electron source 9 that strike the predetermined location on the photoconductor 3. As such, in the present disclosure, each emitter area 25 of the image capture device (i.e., the cell comprising a plurality of field emission type electron sources 9 surrounded by a first focus structure 11) may require a lower density of electrons being emitted from the electron sources in order to achieve the same density of electrons striking the photoconductor 3, when compared to prior art image capture devices. Further, each emitter area 25 may thus require fewer field emission type electron sources and, thus, the pixel size, as well as the pixel pitch, of the image capture device of the disclosure may be made smaller. The pixel of the image capture device of the disclosure may be a square pixel with the pixel pitch of, e.g., between 10 micrometers and 1000 micrometers, between 50 micrometers and 200 micrometers, about 50 micrometers, about 75 micrometers, about 100 micrometers, about 125 micrometers, about 150 micrometers or about 200 micrometers. Preferably, the pixel of the image capture device of the disclosure may be a square pixel with the pixel pitch of about micrometers 100 micrometers.
(56) Typically, a thinner image capture device may be desired. However, thinner devices are more difficult to assemble, and the presence of a grid electrode exacerbates the difficulty in assembly. It is a particular advantage of the present disclosure that, because a grid electrode may not be used, the image capture device may be made thinner, or the same thinness may be produced at less cost, when compared to prior art image capture devices that comprise a grid electrode.
(57) Another specification of a flat panel image capture device is the ratio between pixel pitch and device thickness. In the image capture device of the disclosure, the device thickness, e.g., the distance between the cathode 7 and the anode 2, is from 0.5 to 4.0 times the pixel pitch. Expressed in an alternative fashion, the ratio between device thickness and pixel pitch (i.e., device thickness in micrometers/pixel pitch in micrometers) is between 0.5 and 4.0. Given the above ratio, if the pixel pitch is 100 micrometers, the gap between the cathode 7 and the anode 2 would be between 50 and 400 micrometers. In certain embodiments, the device thickness, e.g., the distance between the cathode 7 and the anode 2, is from 0.5 to 2.0 times the pixel pitch, from 0.5 to 1.5 times the pixel pitch, from 1 to 3 times the pixel pitch, from 1 to 4 times the pixel pitch, about 0.5 times the pixel pitch, about 0.75 times the pixel pitch, about 1 times the pixel pitch, about 1.5 times the pixel pitch, about 1.75 times the pixel pitch, about 2 times the pixel pitch, about 2.25 times the pixel pitch, about 2.5 times the pixel pitch, about 2.75 times the pixel pitch, about 3 times the pixel pitch, about 3.25 times the pixel pitch, about 3.5 times the pixel pitch, about 3.75 times the pixel pitch or about 4 times the pixel pitch. The parameters of the field emission type electron source 9, the dimensions of the focus structures 11 (and 13), the voltage loaded to the focus electrodes 12 (and 14), and the height of the spacer 4, and other parameters of the device may be adjusted as needed.
(58) The Electron Receiving Construct
(59) With reference to
(60) The faceplate 1 may be constructed of a material and/or in a configuration that transmits incident electromagnetic radiation radiating from the front of the faceplate 1. The faceplate 1 may be capable of transmitting high energy electromagnetic waves such as X-rays or gamma-ways and visible light. Alternatively, the faceplate 1 may allow transmission of high energy electromagnetic waves such as X-rays or gamma-ways but prevent the transmission of visible light.
(61) As a further alternative, the faceplate 1 may comprise a scintillator. The scintillator may be capable of converting high energy electromagnetic waves such as X-rays or gamma-ways into light in the visible spectrum. The scintillator also may have high X-ray (or gamma-ray) stopping power, preventing or reducing X-rays (or gamma-rays) to be transmitted through it. Various scintillator materials are known in the art. The scintillator may comprise, for example, crystalline Cesium Iodide (CsI). The CsI may be doped, for example, with Sodium or Thallium. The CsI-based scintillator may be a high resolution type or a high light output type.
(62) With reference to
(63) With reference to
(64) A FOP is an optical instrument that is a collection of a large number of optical fibers bundled together. The optical fibers are typically several microns in diameter. An FOP is capable of transferring light and image with high efficiency and low distortion, Various FOPs are known in the art.
(65) The multiple layers of the faceplate may be permanently attached to each other with, e.g., a glue or bonding element. Alternatively, they may be attached with a temporary means, for example, a clamp, a clip or the like, to facilitate the exchange of alternative types of one or more of the layers.
(66) The anode electrode 2 may be constructed of materials and/or in a configuration that transmits incident electromagnetic radiation radiating from the front of the faceplate 1, or the electromagnetic radiation emitted from the scintillator 15, such that the incident electromagnetic radiation reaches the photoconductor 3.
(67) Materials used for the photoconductor 3 are known in the art, e.g., amorphous Selenium (a-Se), HgI.sub.2, PHI.sub.2, CdZnTe, or PbO. In a preferred embodiment, the photoconductor 3 comprises amorphous Selenium. The thickness of the photoconductor 3 may be, for example, about 5 microns, about 10 microns, about 12.5 microns, about 15 microns, about 17.5 microns, about 20 microns, about 25 microns, about 30 microns, about 50 microns, about 0.1 millimeters, about 0.25 millimeters, about 0.5 millimeter, about 1 millimeter, about 1.5 millimeters, about 2 millimeters, about 2.5 millimeters, about 3 millimeters, about 3.5 millimeters, about 4 millimeters, about 4.5 millimeters, or about 5 millimeters.
(68) With reference to
(69) The electromagnetic radiation may be of any frequency. In certain embodiments, the electromagnetic radiation may be in the X-ray frequency range. X-rays may me characterized by an energy of, e.g., about 60 keV, about 65 keV, about 70 keV, about 75 keV, about 80 keV, about 85 keV, about 95 keV, about 100 keV, or between 70 and 80 keV. Alternatively, the electromagnetic radiation may be in the HEX-ray frequency range. HEX-rays may be characterized by an energy of, e.g., above 100 keV, above 200 keV, or above 300 keV. Alternatively, the electromagnetic radiation may be in the gamma-ray frequency range. Alternatively, the electromagnetic radiation may be in the visible light frequency range.
(70) An Embodiment of the Image Capture Device
(71)
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Functional Parameters
(73) The image capture device may have a signal to noise ratio (S/N or SNR) of, for example, between 60 to 80 decibels (dB), between 70 and 90 dB, between 90 and 130 dB, between 80 and 100 dB, between 100 and 130 dB, between 50 and 70 dB, between 30 and 40 dB, between 35 and 45 dB, between 40 and 50 dB, between 55 and 65 dB, between 60 and 70 dB, between 65 and 75 dB, between 70 and 80 dB, about 30 dB, about 35 dB, about 40 dB, about 45 dB, about 50 dB, about 55 dB, about 60 dB, about 65 dB, about 70 dB, about 75 dB, about 80 dB, about 85 dB, about 90 dB, about 100 dB, about 110 dB, about 120 dB, or about 130 dB. Signal-to-noise ratio is typically defined as the power ratio between a signal (meaningful information) and the background noise (unwanted signal) and expressed as, e.g., S/N=P.sub.S/P.sub.N, where P.sub.S is the power of the signal and P.sub.N is the power of the noise. If the signal and the noise are measured across the same impedance, then the S/N may be obtained by calculating the square of the amplitude ratio, i.e., S/N=P.sub.S/P.sub.N, =(A.sub.S/A.sub.N).sup.2, where A.sub.S is the amplitude of the signal and A.sub.N is the power of the noise. As such, the signal to noise ratio may be expressed as S/N (in dB)=10 log.sub.10(P.sub.S/P.sub.N) or S/N (in dB)=20 log.sub.10(A.sub.S/A.sub.N). Where the signal is measured as voltage, S/N may be calculated based on the formula of, for example S/N (in dB)=20 log.sub.10(V.sub.S/V.sub.N), where V.sub.S may be the voltage of the signal and V.sub.N may be the voltage of the noise. The S/N may be calculated from images accumulated and/or averaged over, for example, 1 to 15 frames, 2 frames, 3 frames, 4 frames, 5 frames, 6 frames, 7 frames, frames, 8 frames, 9 frames, 10 frames, 11 frames, 12 frames, 13 frames, 14 frames, 15 frames, 16 frames, 17 frames, 18 frames, 19 frames, 20 frames, or more than 20 frames.
(74) The image capture device may have a spatial resolution of, for example, about 30% at 1 line pair/millimeter (lp/mm), about 35% at 1 lp/mm, about 40% at 1 lp/mm, about 45% at 1 lp/mm, about 50% at 1 lp/mm, about 55% at 1 lp/mm, about 60% at 1 lp/mm, about 65% at 1 lp/mm, about 70% at 1 lp/mm, about 75% at 1 lp/mm, about 80% at 1 lp/mm, or more than 50% at 1 lp/mm.
(75) The image capture device may configured to capture images at a frame rate of, for example, about 15 fps, about 30 fps, about 45 fps, about 50 fps, about 60 fps, about 75 fps, about 80 fps, about 90 fps, up to 50 fps, up to 60 fps, up to 90 fps, between 50 and 60 fps, or between 60 and 90 fps.
(76) The image capture device may have a temporal performance of a lag time of, for example, less than 1 frame at 15 frames per second (fps), less than 1 frame at 30 fps, less than 1 frame at 45 fps, less than 1 frame at 50 fps, less than 1 frame at 60 fps, less than 1 frame at 75 fps, or less than 1 frame at 90 fps.
(77) X-Ray Emitting Device
(78) Reference is now made to
(79) Electron Emitting Construct
(80) The various options described for the electron emitting construct 110 and its components as described with reference to
(81) The electron emitting construct 210 may comprise a backplate 55, a substrate 56, a cathode electrode 57, resistive layer 58, an array of field emission type electron sources 59 and a gate electrode 60. The electron emitting construct 210 may further comprise a plurality of first focus structures 61 arranged in an array, each of said first focus structures 61 comprising a first focus electrode 62. In certain embodiments, the electron emitting construct 210 may further comprise a plurality of second focus structures 63 comprising a second focus electrode 64 (see
(82) The field emission type electron source 59 may be activated to emit an electron beam 20 that is directed towards the x-ray emitter 220. The field emission type electron source 59 is situated between the anode 52 and the cathode 57 such that the electron beam 70 emitted by the field emission type electron source 59 is accelerated towards the anode 52.
(83) The electron sources 59 may be situated within an emitter area 75 as a group of co-activatable units.
(84) It is particularly noted that in a prior art image capture devices a grid electrode has been generally situated between the electron emitting construct 210 and the x-ray emitting construct 220. A grid electrode may be a thin material with an array of small openings having a grid-, mesh- or sieve-like structure, positioned between the anode and cathode. The grid electrode may be referred to as a mesh electrode, a control grid or a trimming electrode.
(85) In contradistinction to the prior art, the grid electrode is not typically present in the image capture device of the disclosure. With reference to
(86) The Substrate of the Electron Emission Construct
(87) With reference to
(88) It is particularly noted that, alternatively or additionally, where required, the focus structure of the x-ray emitting device may be independent or disconnected from the cathode plate.
(89) The Field Emission Type Electron Source
(90) With reference to
(91) The electron sources 59 may be situated within emitter areas 75 as groups of co-activated units. Each emitter area 75 is connectable to a row driver and a column driver (not shown), which controls the coordination of the activation of the driving circuit and the gate electrode 60 of the electron sources 59.
(92) The field emission type electron source 59 may be, e.g., a Spindt type electron source, a carbon nanotube (CNT) type electron source, a metal-insulator-metal (MIM) type electron source or a metal-insulator-semiconductor (MIS) type electron source. In a preferred embodiment, the electron source 59 may be a Spindt type electron source.
(93) Anode and Cathode
(94) With reference to
(95) Focus Structures
(96) With reference to
(97) With reference to
(98) Referring now to
(99) The focus structures with the focus electrodes (e.g., first focus structure 61 with first focus structure 62 and/or second focus structure 63 with second focus structure 64) may further function as a drain for misdirected electrons. In certain embodiments, the first focus electrode 62 may be positioned to cover a signal line of the driving circuit for the field emission type electron source 59, thus reducing radiation noise in the signal lines by protecting the signal lines from irradiation by misdirected electrons.
(100) X-Ray Emitter
(101) With reference to back to
(102) Referring now to
(103) Coordinated Activation of Electron Emitter Areas
(104) As discussed above with reference to
(105) For example, the image capture device 1000 may scan the photoconductor 3 to detect the location of electron holes therein, which information is then processed to form an image. In addition, the image capture device 1000 may limit the scanning to a predetermined subset of emitter areas 25 within the electron emitting construct. Such a limitation may be useful in limiting scanning time or in limiting the area of detection to reduce noise by avoiding the detection of scattered electromagnetic waves.
(106) Coordinated Activation of X-Ray Emission
(107) As discussed above with reference to
(108) For example, a series of emitter areas 75A-F may be sequentially activated, resulting in a virtual scan that is equivalent to a mechanically moving x-ray source (
(109) Referring now to
(110) As with individual emitter areas 75, x-rays from projection modules 76 may be emitted in various spatial and temporal patterns.
(111) For example:
(112) With reference to
(113) With reference to
(114) X-Ray Radiography System
(115)
(116) With reference to
(117) With reference to
(118) With reference to
(119) With reference for
(120) X-Ray Emitting Device for Emitting X-Rays at Different Energies
(121) In the x-ray emitting device of the disclosure, individual emitter areas may be configured to emit x-rays at a defined energy (keV). All of the emitter areas may be configured to emit x-rays of the same energy. Alternatively, the emitter areas may be configured to emit x-rays with different energies. For example, the x-ray emitting device may have a regular arrangement of emitter areas configured to emit x-rays at low, medium and high keV's, each group of emitter areas configured to emit x-rays at a particular energy being an energy channel. Each energy channel may be activated at sequentially different times, so that the low keV source gives off its x-rays at time=0. Following this, the medium KeV x-rays are given off (at, e.g., time=16 milliseconds), followed by the high KeV x-rays 16 ms later (at time=32 milliseconds). Thus within 50 milliseconds, three different KeV images are made and these can be combined algorithmically to distinguish between different types of tissues.
Examples
(122) Simulation of the Effect of Focus Structures
(123)
(124) It is desirable that the beam landing width is not more than the pixel pitch, so that the electron beam emitted from one emitter area does not overlap with the electron beam emitted from an adjacent emitter area. Given the widening of the beam landing width with gap distance, the pixel pitch that can be achieved within a certain gap distance is limited. The focus structures/electrodes serve to restrict the widening of the beam landing width with gap distance, thus enabling smaller pixel pitch with a larger gap (e.g., between anode and cathode).
(125) With reference to
(126) TABLE-US-00001 TABLE 1 Beam Landing Width (in micrometers) with single focus 1st Focus Voltage Gap 20 40 60 (micrometers) volts volts volts 50 53 62.8 81.8 80 58.7 95.1 103.4 100 59.8 115.1 123.2 150 77.3 159.3 170.8
(127) Further simulated experiments show the role of the first focus structure in affecting electron beam landing width. Table 2 shows the 5% beam width with a cathode-anode gap of 3 millimeters (mm), 4 mm or 5 mm; a focus voltage of 0 volts (V), 100 V or 200 V, and an anode voltage of 10000 V, 20000 V, 30000 V, 40000 V or 50000 V.
(128) TABLE-US-00002 TABLE 2 5% beam landing width (in micrometers) with single electrode Focus Cathode- Voltage Anode Voltage (Volt) Anode Gap (Volt) 10000 20000 30000 40000 50000 gap 3 mm Ef 0 310.2 214.3 184.1 178.8 175.6 100 213.7 144.8 130.0 123.5 123.3 200 302.6 164.1 118.5 107.2 101.8 gap 4 mm Ef 0 318.8 287.3 237.2 218.8 214.0 100 305.5 188.2 160.9 152.2 145.4 200 425.1 242.9 172.3 137.1 127.9 gap 5 mm Ef 0 285.7 386.1 291.2 257.6 254.5 100 410.4 237.7 197.6 177.6 171.0 200 494.1 340.5 234.0 181.0 153.1
(129)
(130) With reference to
(131) TABLE-US-00003 TABLE 3 Beam Landing Width (in micrometers) with double focus 2nd Focus Voltage Gap 200 400 600 800 1000 (micrometers) volts volts volts volts volts 100 85.9 80.4 200 113.5 85.5 300 162.9 119.1 99.4 400 193.3 148.7 118.5 104.7 (First focus voltage = 30 volts)
(132) Reference is now made to
(133) It is noted that the gate electrode support structure 85 is provided to support the gate electrode 10 at a required cathode-gate spacing CG. The cathode-gate spacing CG may be selected such that the electric field between the cathode and the gate electrode is suitable for emission of electrons from the field emission type electron source 9 with a required acceleration. For example the cathode-gate spacing may be approximately 200 nanometers or so. Alternatively, the cathode-gate spacing may be between 200 and 500 nanometers or more, or between 100 nanometers and 200 nanometers or less as required.
(134) It is noted that the gate electrode support may further prevent current leakage or discharge between the gate electrode 10 and the cathode 70. Direct discharge between the cathode 70 and the gate electrode 10 may be prevented or at least limited through the introduction of a resistive interlayer 85A configured to have regular gaps or apertures at the electron sources 9.
(135) Nevertheless, current leakage, or creeping, may still occur, particularly along the surface path 86A adjacent to the electron source aperture. Accordingly various embodiments of the interlayer may be configured to increase the creeping distance so as to increase the resistance path along the surface.
(136) Referring now to
(137) Referring now to
(138) The stratified interlayer 850 includes at least one stratum 852A, 852B (collectively 852) of a readily etchable material and at least a one stratum of a second less readily etchable material 854A, 854B (collectively 854). Accordingly, when the electron source aperture is etched out of the stratified interlayer 850, the etched surface of the readily etchable material 852 forms concave sections 862 of the surface path 860 whereas the etched surface of the less readily etchable material 854 forms convex sections 864 of the surface path 860, thereby forming the undulating surface path 860 as required.
(139) Various materials may be selected for their corrosive or etchability properties. For example the readily etchable strata 852 may be constructed from a low density material, such as low density silicon dioxide or the like, and the less readily etchable strata 854 may be constructed from a higher density material such as higher density silicon dioxide, silicon oxynitride, silicon nitride or the like. Other combinations of readily etchable materials and less readily etchable materials will occur to those skilled in the art. The selection may vary according to the corrosiveness of the etching agents.
(140) Referring now to
(141) The gate electrode support columns 185 may also be arranged in an array with a regular inter-column spacing ICS. The inter-column spacing ICS may be larger than the regular electron source spacing ESS, thereby reducing the number leakage paths available for creeping current. Where required, the support columns 185 may be provided in place of missing electron sources at regular intervals.
(142) Referring now to
(143) A first cross section A-A is shown along a row of four electron sources 190 upon a resistive layer 180 and a cathode 170. The first cross section A-A illustrates how the gate electrode 110 may be supported by its own structural strength with no interlayer at all between the gate electrode 110 and the resistive layer 180. The second cross section B-B illustrates how the gate electrode 110 is periodically supported by support columns 185. Accordingly, the gate electrode 110 may be constructed from materials for example chromium or the like selected for their required mechanical properties, such as tensile strength and density.
(144) It is further noted that the column profile may include concave sides 186. This profile may allow the distance X between each said support column 185 and its nearest neighboring electron sources to be greater than said electron source spacing ESS, thereby further reducing discharge and current leakage.
(145) Reference is now made to
(146) Referring now to
(147) The stratified resistive layer 2800 includes a proximal resistor stratum 2820, closest to the electron source 9, a distal resistor stratum 2860 further from the electron source, and an intermediate resistor stratum 2840 sandwiched between said proximal resistor stratum 2820 and said distal resistor stratum 2860. The materials of each stratum may be selected so as to control resistivity of the resistive layer with depth. Accordingly, the proximal resistor stratum 2820 may be formed from a highly resistive material selected for its high characteristic resistivity, the distal resistor stratum 2860 may be formed from a lower resistive material selected for its low characteristic resistivity, and the intermediate resistor stratum may be formed from another resistive material having a characteristic resistivity intermediate between that of the highly resistive material and the lower resistive material.
(148) Various materials may be used for the resistance layers such as, amongst others, silicon oxygen carbonitride (SiOCN), which may be used for the proximal resistor stratum, possibly to a depth of about ten nanometers of so. Where required, amorphose silicon carbonitride (a-SiCN) film may be used for the intermediate resistor stratum, say for a further 200 nanometers, and a silicon carbide (SiC) or silicon (Si) layer may be used for the distal resistor stratum. It is particularly noted that the distal resistor stratum may be constructed from a single crystal silicon carbide wafer perhaps 100 microns or so in thickness.
(149) It is noted that, although a triple layered resistance structure is described above, other stratified resistance layers may alternatively be used as suit requirements, such as a double layer having only a proximal resistor stratum and a distal resistor stratum with no intermediate resistor stratum. Still other embodiments include materials having continuous resistance gradients with resistivity increasing with depth.
(150) The barrier stratum 2810, 2830 may comprise layers of unreactive or inert material provided to prevent the materials of the resistive stratum 2800, such as silicon, silicon carbide, silicon carbonitride or the like, reacting with the metal of the cathode or the electron source during heating treatment in the cathode or during the assembly.
(151) Accordingly, the first barrier stratum 2810 may consist of a layer of unreactive material which is interposed between the resistive material of the distal resistor stratum 2860 and the cathode 2870, and the second barrier stratum 2830 may consist of a layer of unreactive material which is interposed between the resistive material of the proximal resistor stratum 2820 and the electron source 9. Variously the unreactive material may be selected from materials such as carbon rich siliconcarbide, nitrogen rich silicon carbonitride, amorphous carbon and the like as well as combinations thereof as required.
(152) In various embodiments, the unreactive material may be selected from carbon rich siliconcarbide compositions having various proportions of Silicon and carbon such as over 50% carbon, between 50% and 60% carbon, between 60% and 70% carbon, between 70% and 80% carbon, between 30% and 40% carbon, between 40% and 50% carbon, between 45% and 75% carbon or the like. It is particularly noted that carbon rich siliconcarbide (Si.sub.xC.sub.y) may be selected in which y is greater than x.
(153) Alternatively or additionally, the unreactive material may be selected from nitrogen rich siliconcarbonitride compositions having various proportions of Silicon, carbon and nitrogen for example including over 25% nitrogen, between 25% and 35% nitrogen, between 35% and 45% nitrogen, between 45% and 55% nitrogen, above 50% nitrogen or the like. It is particularly noted that carbon rich siliconcarbonitride (Si.sub.xC.sub.yN.sub.z) may be selected in which z is greater than y.
(154) The scope of the disclosed embodiments may be defined by the appended claims and includes both combinations and sub combinations of the various features described hereinabove as well as variations and modifications thereof, which would occur to persons skilled in the art upon reading the foregoing description.
(155) Technical and scientific terms used herein should have the same meaning as commonly understood by one of ordinary skill in the art to which the disclosure pertains. Nevertheless, it is expected that during the life of a patent maturing from this application many relevant systems and methods will be developed.
(156) As used herein the term about refers to at least 10%.
(157) The terms comprises, comprising, includes, including, having and their conjugates mean including but not limited to and indicate that the components listed are included, but not generally to the exclusion of other components. Such terms encompass the terms consisting of and consisting essentially of.
(158) The phrase consisting essentially of means that the composition or method may include additional ingredients and/or steps, but only if the additional ingredients and/or steps do not materially alter the basic and novel characteristics of the claimed composition or method.
(159) As used herein, the singular form a, an and the may include plural references unless the context clearly dictates otherwise. For example, the term a compound or at least one compound may include a plurality of compounds, including mixtures thereof.
(160) The word exemplary is used herein to mean serving as an example, instance or illustration. Any embodiment described as exemplary is not necessarily to be construed as preferred or advantageous over other embodiments or to exclude the incorporation of features from other embodiments.
(161) The word optionally is used herein to mean is provided in some embodiments and not provided in other embodiments. Any particular embodiment of the disclosure may include a plurality of optional features unless such features conflict.
(162) Whenever a numerical range is indicated herein, it is meant to include any cited numeral (fractional or integral) within the indicated range. The phrases ranging/ranges between a first indicate number and a second indicate number and ranging/ranges from a first indicate number to a second indicate number are used herein interchangeably and are meant to include the first and second indicated numbers and all the fractional and integral numerals therebetween. It should be understood, therefore, that the description in range format is merely for convenience and brevity and should not be construed as an inflexible limitation on the scope of the disclosure. Accordingly, the description of a range should be considered to have specifically disclosed all the possible subranges as well as individual numerical values within that range. For example, description of a range such as from 1 to 6 should be considered to have specifically disclosed subranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6 etc., as well as individual numbers within that range, for example, 1, 2, 3, 4, 5, and 6 as well as non-integral intermediate values. This applies regardless of the breadth of the range.
(163) It is appreciated that certain features of the disclosure, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the disclosure, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable subcombination or as suitable in any other described embodiment of the disclosure. Certain features described in the context of various embodiments are not to be considered essential features of those embodiments, unless the embodiment is inoperative without those elements.
(164) Although the disclosure has been described in conjunction with specific embodiments thereof, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art. Accordingly, it is intended to embrace all such alternatives, modifications and variations that fall within the spirit and broad scope of the appended claims.
(165) All publications, patents and patent applications mentioned in this specification are herein incorporated in their entirety by reference into the specification, to the same extent as if each individual publication, patent or patent application was specifically and individually indicated to be incorporated herein by reference. In addition, citation or identification of any reference in this application shall not be construed as an admission that such reference is available as prior art to the present disclosure. To the extent that section headings are used, they should not be construed as necessarily limiting.