Control methods and switching mode power supplies with improved dynamic response and reduced switching loss

Abstract

A control method is used in a switching mode power supply to improve dynamic load response and switching loss. A PWM signal is provided to control a power switch and has a switching frequency. A cross voltage of a transformer in the switching mode power supply is detected to provide a de-magnetization time. The switching frequency is controlled in response to a sleep signal and a compensation voltage, which is generated based on an output voltage of the switching mode power supply. The sleep signal is provided in response to the de-magnetization time and a current sense signal, a representative of a winding current of the transformer. The switching frequency is not less than a first minimum value if the sleep signal is deasserted, and not less than a second minimum value if the sleep signal is asserted. The second minimum value is less than the first minimum value.

Claims

1. A control method for a switching mode power supply with a transformer and a power switch, comprising: providing a PWM signal to control the power switch, wherein the PWM signal has a switching frequency; detecting a cross voltage of the transformer to provide a de-magnetization time; controlling the switching frequency in response to a compensation voltage and a sleep signal, wherein the compensation voltage is generated based on an output voltage of the switching mode power supply; providing the sleep signal in response to the de-magnetization time and a current sense signal, wherein the current sense signal is a representative of a winding current of the transformer; making the switching frequency not less than a first minimum value if the sleep signal is deasserted; and making the switching frequency not less than a second minimum value if the sleep signal is asserted, wherein the second minimum value is less than the first minimum value.

2. The control method as claimed in claim 1, comprising: converting the current sense signal into a first current; using the first current to perform a first action to a capacitor during the de-magnetization time; using a second current to continuously perform a second action to the capacitor wherein the second action is opposite to the first action; and generating the sleep signal in response to a first capacitor voltage of the capacitor.

3. The control method as claimed in claim 2, comprising: delaying the first capacitor voltage to provide a second capacitor voltage; and comparing the second capacitor voltage with a threshold voltage to generate the sleep signal.

4. The control method as claimed in claim 1, comprising: detecting the cross voltage to provide a voltage sample representing the output voltage; and comparing the voltage sample with a reference voltage to provide the compensation voltage.

5. The control method as claimed in claim 4, wherein the voltage sample is updated during the de-magnetization time.

6. A power controller for a switching mode power supply with a transformer and a power switch, comprising: a PWM controller for providing to the power switch a PWM signal in response to a compensation voltage, wherein the PWM signal has a switching frequency; a de-magnetization detector for providing a de-magnetization time by detecting a cross voltage of the transformer; a frequency controller for controlling the switching frequency in response to the compensation voltage and a sleep signal; and a light-load detector, for providing the sleep signal in response to the de-magnetization time and a current sense signal, wherein the current sense signal is a representative of a winding current through the transformer; wherein the frequency controller makes the switching frequency not less than a first minimum value if the sleep signal is deasserted, and makes the switching frequency a second minimum value less than the first value if the sleep signal is asserted.

7. The power controller as claimed in claim 6, wherein the light-load detector comprises: a voltage-to-current converter for converting the current sense signal into a first current used to perform a first action to a first capacitor during the de-magnetization time; and a first current source for providing a second current to continuously perform a second action to the first capacitor; wherein the second action is opposite to the first action.

8. The power controller as claimed in claim 7, wherein the light-load detector comprises: a delay circuit connected to the first capacitor, for delaying a first capacitor voltage on the first capacitor to provide a second capacitor voltage.

9. The power controller as claimed in claim 8, wherein the delay circuit includes a switched-capacitor circuit.

10. The power controller as claimed in claim 8, wherein the light-load detector comprises: a comparator for comparing the second capacitor voltage with a threshold voltage to generate the sleep signal.

11. The power controller as claimed in claim 6, wherein the frequency controller concludes an OFF time of the PWM signal.

12. A switching mode power supply, comprising: a transformer with a primary winding, a secondary winding and an auxiliary winding, inductively coupled to one another; a power switch for controlling a winding current through the primary winding; a rectifier connected to the secondary winding for providing an output voltage; a power controller comprising: a PWM controller for providing to the power switch a PWM signal with a switching frequency; an error amplifier for detecting the output voltage via the auxiliary winding to generate a compensation voltage; de-magnetization detector for providing a de-magnetization time by sensing a cross voltage of the auxiliary winding; a frequency controller for controlling the switching frequency in response to the compensation voltage and a sleep signal; and a light-load detector, for providing the sleep signal in response to the de-magnetization time and a current sense signal, wherein the current sense signal is a representative of the winding current; wherein the frequency controller makes the switching frequency not less than a first minimum value if the sleep signal is deasserted, and makes the switching frequency not less than a second minimum value less than the first minimum value if the sleep signal is asserted.

13. The switching mode power supply as claimed in claim 12, wherein the compensation voltage determines a peak of the current sense signal.

14. The switching mode power supply as claimed in claim 12, wherein the error amplifier comprises: a sample-and-hold circuit for detecting the output voltage via the auxiliary winding to hold a voltage sample; and a transconductor for comparing the voltage sample with a reference voltage to generate the compensation voltage.

15. The switching mode power supply as claimed in claim 12, wherein the light-load detector comprises: a voltage-to-current converter for converting the current sense signal into a first current used to perform a first action to a first capacitor during the de-magnetization time; and a first current source for providing a second current to continuously perform a second action to the first capacitor; wherein the second action is opposite to the first action.

16. The switching mode power supply as claimed in claim 15, wherein the light-load detector comprises: a delay circuit connected to the first capacitor, for delaying a first capacitor voltage on the first capacitor to provide a second capacitor voltage.

17. The switching mode power supply as claimed in claim 15, wherein the delay circuit includes a switched-capacitor circuit.

18. The switching mode power supply as claimed in claim 12, wherein the frequency controller concludes an OFF time of the PWM signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following drawings. In the drawings, like reference numerals refer to like parts throughout the various figures unless otherwise specified. These drawings are not necessarily drawn to scale. Likewise, the relative sizes of elements illustrated by the drawings may differ from the relative sizes depicted.

(2) The invention can be more fully understood by the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

(3) FIG. 1 demonstrates a conventional switching mode power supply with PSC;

(4) FIG. 2 shows dynamic load testing to the switch mode power supply of FIG. 1 and the results;

(5) FIG. 3 demonstrates a switching mode power supply according to embodiments of the invention;

(6) FIG. 4 illustrates the power controller in FIG. 3;

(7) FIG. 5 demonstrates some waveforms for signals in FIG. 4;

(8) FIG. 6 demonstrates two transfer curves CRV.sub.NOR and CRV.sub.SLEEP, each showing a relationship between compensation voltage V.sub.COMP and switching frequency f.sub.SW;

(9) FIG. 7 demonstrates the light-load detector in FIG. 4;

(10) FIG. 8 shows waveforms of some signals of the switching mode power supply in FIG. 3 when a load changes from a heavy-load condition into a no-load condition and stays at the no-load condition for a very long time;

(11) FIG. 9 demonstrates a test result of the switching mode power supply in FIG. 3 under dynamic load testing; and

(12) FIG. 10 shows another light-load detector.

DETAILED DESCRIPTION

(13) FIG. 3 demonstrates a switching mode power supply 30 according to embodiments of the invention. A transformer comprises primary winding PRM, auxiliary winding AUX and secondary winding SEC, all inductively coupled to one another. A diode and output capacitor C.sub.OUT at the secondary side forms a rectifier to rectify the AC signal across secondary winding SEC, and to generate output voltage V.sub.OUT.

(14) Power controller 32 provides PWM signal S.sub.DRV to manipulate power switch 20 at a primary side. Power controller 32 has compensation node COM connected to compensation capacitor C.sub.COM. Current sense resistor R.sub.CS, power switch 20, and primary wilding PRM are connected in series between input power line IN and input ground line GND. Current sense resistor R.sub.CS feeds to power controller 32 current sense voltage V.sub.CS, which is substantially equivalent to current I.sub.CS and could be a representative of winding current I.sub.PRM flowing through power switch 20 and primary winding PRM of the transformer.

(15) FIG. 4 illustrates power controller 32 of FIG. 3, and FIG. 5 demonstrates some waveforms for signals in FIG. 4.

(16) Sample-and-hold circuit 62 and transconductor 64 act together as an error amplifier to detect output voltage V.sub.OUT and generate compensation voltage V.sub.COMP.

(17) Sample-and-hold circuit 62 is connected to feedback node FB, detecting output voltage V.sub.OUT at the secondary side via the signal path passing through resistors 14 and 16, auxiliary wilding AUX, and secondary winding SEC, during the demagnetizing of the transformer. For example, sample-and-hold circuit 62 samples feedback voltage V.sub.FB at feedback node FB at moment t.sub.S/H to hold and/or update voltage sample V.sub.S/H, which represents or corresponds to output voltage V.sub.OUT.

(18) Transconductor 64 compares voltage sample V.sub.S/H with a reference voltage V.sub.REF, and its output accordingly charges or discharges compensation capacitor C.sub.COM to generate compensation voltage V.sub.COMP. If voltage sample V.sub.S/H drifts away from reference voltage V.sub.REF, it implies output voltage V.sub.OUT no more equals to target voltage V.sub.TAR, so compensation voltage V.sub.COMP, in response, varies to increase or decrease the power conversion of switching mode power supply 30. Generally speaking, the less load 18 the lower compensation voltage V.sub.COMP.

(19) In FIG. 4, compensation voltage V.sub.COMP controls PWM controller 66 to influence an ON time T.sub.ON of PWM signal S.sub.DRV. As shown in FIG. 5, an On time T.sub.ON is a time period when PWM signal S.sub.DRV is in logic 1 level and turns ON power switch 20. During an ON time T.sub.ON, current sense signal V.sub.CS increases in a linear manner. When current sense signal V.sub.CS exceeds a level-shifted version of compensation voltage V.sub.COMP outputted by level shifter 68, comparator 70 resets SR flip flop 72, making PWM signal S.sub.DRV in logic 0, concluding an ON time T.sub.ON, and starting an OFF time T.sub.OFF. So power switch 20 is turned OFF and current sense signal V.sub.CS drops abruptly back to 0V. Compensation voltage V.sub.COMP equally determines peak V.sub.CS-PEAK of current sense signal V.sub.CS, and the length of an ON time. It could be observed that a higher compensation voltage V.sub.COMP causes a higher peak V.sub.CS-PEAK and a longer ON time T.sub.ON.

(20) De-magnetization detector 65 detects voltage drop V.sub.AUX of auxiliary winding AUX via feedback node FB, resistors 14 and 16, to provide de-magnetization time T.sub.DMG. In one embodiment, de-magnetization detector 65 compares feedback voltage V.sub.FB with voltage sample V.sub.S/H to generate de-magnetization signal S.sub.DMG, which determines de-magnetization time T.sub.DMG as shown in FIG. 5. During de-magnetization time T.sub.DMG, because the transformer is releasing energy, secondary winding SEC outputs winding current I.sub.SEC to charge output capacitor C.sub.OUT or to power load 18. De-magnetization time T.sub.DMG is about the time period when winding current I.sub.SEC is positive, as shown in FIG. 5.

(21) Light-load detector 76 provides sleep signal S.sub.SLEEP to frequency controller 74 in response to de-magnetization time T.sub.DMG and current sense signal V.sub.CS. Light-load detector 76 could acknowledge the total charge output from secondary winding SEC during a switching cycle based on de-magnetization time T.sub.DMG and current sense signal V.sub.CS. In other words, light-load detector 76 could know the average output current forwarded from secondary winding SEC to load 18, and this average output current should be equal to current load I.sub.LOAD. If light-load detector 76 holds that current load I.sub.LOAD is steadily below a certain level, it asserts sleep signal S.sub.SLEEP. If not, light-load detector 76 deasserts sleep signal S.sub.SLEEP. The detail of light-load detector 76 will be explained later.

(22) Frequency controller 74, in response to compensation voltage V.sub.COMP and sleep signal S.sub.SLEEP, determines switching frequency f.sub.SW of PWM signal S.sub.DRV, which is the reciprocal of switching time T.sub.SW consisting of an ON time T.sub.ON and an OFF time T.sub.OFF. Frequency controller 74 determines the moment to set SR flip flop 72, making PWM signal S.sub.DRV in logic 1, concluding an OFF time T.sub.OFF, and starting an ON time T.sub.ON. The higher compensation voltage V.sub.COMP could cause a shorter switching time T.sub.SW and a higher switching frequency f.sub.SW. According to embodiments of the invention, frequency controller 74 could provide two transfer curves CRV.sub.NOR and CRV.sub.SLEEP, each showing a relationship between compensation voltage V.sub.COMP and switching frequency f.sub.SW, as shown in FIG. 6. When sleep signal S.sub.SLEEP is deasserted, it is transfer curve CRV.sub.NOR frequency controller 74 provides; when sleep signal S.sub.SLEEP is asserted, it is transfer curve CRV.sub.SLEEP though. Transfer curve CRV.sub.NOR in FIG. 6 shows a minimum value f.sub.MIN-NOR, which switching frequency f.sub.SW cannot be less than when sleep signal S.sub.SLEEP is deasserted. Similarly, transfer curve CRV.sub.SLEEP shows another minimum value f.sub.MIN-SLEEP which is less than minimum value f.sub.MIN-NOR. Frequency controller 74 makes switching frequency f.sub.SW not less than minimum value f.sub.MIN-NOR if sleep signal S.sub.SLEEP is deasserted, and not less than minimum value f.sub.MIN-SLEEP if sleep signal S.sub.SLEEP is asserted.

(23) FIG. 7 demonstrates light-load detector 76 in FIG. 4, which includes constant current source 80, switch 82, sampler 84, voltage-to-current converter 86, delay circuit 92, and comparator 94. Sampler 84 samples current sense signal V.sub.CS to provide voltage sample V.sub.CS SAM. According to embodiments of the invention, voltage sample V.sub.CS-SAM could be peak V.sub.CS-PEAK but this invention is not limited to. According to other embodiments of the invention, voltage sample V.sub.CS-SAM is middle V.sub.CS-MED which is the current sense signal V.sub.CS at the middle moment of an ON time T.sub.ON. Voltage-to-current converter 86 converts voltage sample V.sub.CS SAM into current I.sub.DN to discharge capacitor 90 during de-magnetization time T.sub.DMG indicated by de-magnetization signal S.sub.DMG. Constant current source 80 provides constant current I.sub.SET-REF to continuously charge capacitor 90. What current I.sub.DN does is discharging capacitor 90, and is opposite to what constant current I.sub.SET REF does, which is charging capacitor 90. Change dV.sub.LIGHT in capacitor voltage V.sub.LIGHT after the elapse of one switching cycle T.sub.SW can be expresses by the following equation.

(24) $\begin{array}{c}{\mathrm{dV}}_{\mathrm{LIGHT}}={\mathrm{dQ}}_{90}/C_{90}\\ =\left(I_{\mathrm{SET}-\mathrm{REF}}{T}_{\mathrm{SW}}-I_{\mathrm{DN}}{T}_{\mathrm{DMG}}\right)/C_{90}\\ =\left(I_{\mathrm{SET}-\mathrm{REF}}{T}_{\mathrm{SW}}-K_1{I}_{\mathrm{CS}-\mathrm{PEAK}}{T}_{\mathrm{DMG}}\right)/C_{90}\\ =\left(I_{\mathrm{SET}-\mathrm{REF}}{T}_{\mathrm{SW}}-K_2{I}_{\mathrm{SEC}-\mathrm{PEAK}}{T}_{\mathrm{DMG}}\right)/C_{90}\\ =\left(I_{\mathrm{SET}-\mathrm{REF}}{T}_{\mathrm{SW}}-K_2{I}_{\mathrm{LOAD}}{T}_{\mathrm{SW}}\right)/C_{90}\\ =K_3\left(I_{\mathrm{SET}}-I_{\mathrm{LOAD}}\right)T_{\mathrm{SW}}/C_{90},\end{array}$
where dQ.sub.90 is the variation of charge stored in capacitor 90, C.sub.90 the capacitance of capacitor 90, K.sub.1, K.sub.2 and K.sub.3 all constant, I.sub.SEC PEAK the winding current peak of secondary winding SEC, and I.sub.SET a predetermined current corresponding to constant current I.sub.SET-REF. Derivable from the equation above, if current load I.sub.LOAD is less than predetermined current I.sub.SET, change dV.sub.LIGHT is positive, meaning capacitor voltage V.sub.LIGHT increases switching cycle by switching cycle. In the opposite, if current load I.sub.LOAD exceeds predetermined current I.sub.SET, capacitor voltage V.sub.LIGHT decreases switching cycle by switching cycle. From one perspective, constant current source 80, switch 82, sampler 84 and voltage-to-current converter 86 work together at the primary side to detect current load I.sub.LOAD at the secondary side and compare it with predetermined current I.sub.SET.

(25) Delay circuit 92 determines signal delay T.sub.DELAY, and could be as simple as a resistor-capacitor circuit in some embodiments of the invention. In FIG. 7, delay circuit 92 has capacitor 96 and switched-capacitor circuit 98, where switched-capacitor circuit 98, acting as a frequency-controlled resistor, has two switches controlled by inverted and non-inverted versions of PWM signal S.sub.DRV respectively. Delay circuit 92 provides signal delay T.sub.DELAY to capacitor voltage V.sub.LIGHT, and accordingly generates capacitor voltage V.sub.D LIGHT.

(26) Comparator 94 compares capacitor voltage V.sub.D-LIGHT with threshold voltage V.sub.TH to output sleep signal S.sub.SLEEP. If capacitor voltage V.sub.D-LIGHT exceeds threshold voltage V.sub.TH, sleep signal S.sub.SLEEP is asserted, and if not, sleep signal S.sub.SLEEP is deasserted.

(27) FIG. 8 shows waveforms of some signals of switching mode power supply 30 when load 18 changes from a heavy-load condition into a no-load condition and stays at the no-load condition for a very long time. It is supposed that, in the beginning of FIG. 8, load 18 is heavy, current load I.sub.LOAD high, switching frequency f.sub.SW high, capacitor voltages V.sub.LIGHT and V.sub.D LIGHT staying at a minimum value, and sleep signal S.sub.SLEEP deasserted. At moment t.sub.1, load 18, changing into a no-load condition, suddenly disappears, and current load I.sub.LOAD becomes 0 A. In response to the change in load 18, compensation voltage V.sub.COMP drops quickly and deeply, and in view of transfer curve CRV.sub.NOR, switching frequency f.sub.SW drops to minimum value f.sub.MIN NOR soon after moment t.sub.1. At the same time, since current load I.sub.LOAD is 0 A, much less than predetermined current I.sub.SET so capacitor voltage V.sub.LIGHT ramps up sharply to reach its maximum. Due to the existence of delay circuit 92, capacitor voltage V.sub.D-LIGHT nevertheless ramps up in a slower manner, and passes across threshold voltage V.sub.TH at moment t.sub.2, which is signal delay T.sub.DELAY later than moment t.sub.1. So, at moment t.sub.2, sleep signal S.sub.SLEEP switches to become asserted, and frequency controller 74 turns to provide transfer curve CRV.sub.SLEEP. Based on transfer curve CRV.sub.SLEEP and the current value of compensation voltage V.sub.COMP, switching frequency f.sub.SW becomes minimum value f.sub.MIN-SLEEP, which is less than minimum value f.sub.MIN-NOR. FIG. 8 shows, if load 18 stays in a no-load condition for a very long time, switching frequency f.sub.SW is expected to be minimum value f.sub.MIN-SLEEP eventually, in favor of the reduction of switching loss. It looks like a long stay in a no-load condition makes switching mode power supply 30 sound asleep to save power.

(28) FIG. 9 demonstrates a test result of switching mode power supply 30 in FIG. 3 under dynamic load testing. As shown in FIG. 9, during dynamic load testing, each time period when load 18 stays in a no-load condition is denoted as no-load time T.sub.NO-LOAD, and signal delay T.sub.DELAY is chosen or designed to be longer than no-load time T.sub.NO LOAD. Before it goes up across threshold voltage V.sub.TH, capacitor voltage V.sub.D-LIGHT in FIG. 9 starts being pulled down when load 18 switches to be in a heavy-load condition. Under the dynamic load testing in FIG. 9, capacitor voltage V.sub.D-LIGHT accordingly can never reach threshold voltage V.sub.TH and sleep signal S.sub.SLEEP is deaserted all the time. During each no-load time T.sub.NO-LOAD of FIG. 9, frequency controller 74 always provides transfer curve CRV.sub.NOR, which makes switching frequency f.sub.SW not less than minimum value f.sub.MIN-NOR, higher than minimum value f.sub.MIN-SLEEP. Minimum value f.sub.MIN-NOR, in comparison with minimum value f.sub.MIN-SLEEP, benefits switching mode power supply 30 in quicker response to the change in load 18, because the period of time when power controller 32 is blind to output voltage V.sub.OUT is shorter. Switching mode power supply 30 could avoid severe undershoot during dynamic load testing.

(29) FIG. 7 is only an example of light-load detector 76 and this invention is not limited to. FIG. 10 shows another light-load detector 76a, capable of replacing light-load detector 76 according to embodiments of the invention. Detail of FIG. 10 is omitted here because its function and operation can be derived and understood based on the explanation regarding to light-load detector 76.

(30) While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.