Abstract
A method of pulse width modulating a spatial light modulator comprises determining a modulation sequence and applying the modulation sequence to the spatial light modulator in a time order method. The modulation sequence comprises a plurality of minor modulation segments. Each minor modulation segment comprises an always-on modulation segment in an always-on state. The plurality of minor modulation segments are temporally spaced such that the always-on modulation segments are spaced at predetermined intervals. Each minor modulation segment comprises at least one thermometer bit.
Claims
1. A method of pulse width modulating a spatial light modulator, the method comprising; determining a modulation sequence, said modulation sequence comprising a plurality of minor modulation segments, wherein: each minor modulation segment comprises an always-on modulation segment in an always-on state, said plurality of minor modulation segments are temporally spaced such that said always-on modulation segments are spaced at predetermined intervals, and each minor modulation segment further comprises at least one thermometer bit; and applying said modulation sequence to said spatial light modulator in a time order method, wherein said always-on modulation segment of each minor modulation segment is preceded by one or more thermometer bit segments, and one thermometer bit segment is placed in an on state in each of said plurality of minor modulation segments before a second thermometer bit segment is placed in an on state in any minor modulation segment with a first thermometer bit already in an on state.
2. The modulation method of claim 1, wherein said one or more thermometer bit segments of each minor modulation segment are activated in reverse time order with thermometer bit segments representing lower bit values activated later in the minor modulation segment and thermometer bit segments representing higher bit values activated earlier in the minor modulation segment.
3. The modulation method of claim 2, wherein the order in which said one or more thermometer bit segments in each of said minor modulation segments form a pattern, said pattern comprising: a first minor modulation segment in a first half of the modulation sequence; a second minor modulation segment at a same relative temporal position in a second half of the modulation sequence; a third minor modulation segment in said first half of the modulation sequence located temporally substantially midway between the first and second minor modulation segments; a fourth minor modulation segment in said second half of the modulation sequence in the same relative temporal position as the third minor modulation segment; and optionally one or more additional minor modulation segments arranged in like manner until all minor modulation segments are formed into said pattern.
4. The modulation method of claim 1, wherein said always-on modulation segment of each minor modulation segment is followed by a lesser significant bit modulation segment.
5. The modulation method of claim 4, wherein an on state duration of said lesser significant bit modulation is determined by a write to black terminated write pointer.
6. The modulation method of claim 1, wherein durations of said predetermined intervals between said always-on modulation segments are substantially equal.
7. The modulation method of claim 1, wherein durations of said predetermined intervals between said always-on modulation segments comprise a plurality of time slots.
8. The modulation method of claim 1, wherein image input data defining a desired phase state for each pixel is mapped to a modulation sequence code identifying a modulation configuration required to achieve that desired phase state.
9. The modulation method of claim 8, wherein said determined modulation sequence maps a numeric image code to a unique combination of thermometer segments, subthermometer segments, and lesser bit segments.
10. A method of pulse width modulating a spatial light modulator, the method comprising; determining a modulation sequence, said modulation sequence comprising at least one major or minor modulation segment, wherein: said modulation sequence comprises time slots of thermometer bit segments or lesser significant bit segments to which thermometer bits or lesser significant bits are assigned respectively according to a predetermined temporal order, and one or more of the time slots assigned to be occupied by thermometer bits in an off state are respectively populated by segments of subthermometer bits according to a predetermined set of rules; and applying said modulation sequence to said spatial light modulator, wherein said modulation sequence comprises at least two major or minor modulation segments, and said subthermometer bits are allocated such that no major or minor modulation segment receives a second subthermometer bit in an on state until all major or minor modulation segments intended to have a subthermometer bit have received a subthermometer bit in an on state.
11. The modulation method of claim 10, wherein said thermometer bit segments are activated in reverse time order, with said thermometer bit segments representing lower bit values activated later in the modulation sequence.
12. The modulation method of claim 11, wherein said segments of subthermometer bits are separate from thermometer bits in an on state by at least one off state segment.
13. The modulation method of claim 12, wherein said segments of subthermometer bits precede said thermometer bits in an on state in time.
14. The modulation method of claim 10, wherein said subthermometer bits are activated such that when a first subthermometer bit is placed in an on state and then subsequently a second subthermometer bit is placed in an on state, said first thermometer bit remains in an on state, and wherein when a third subthermometer bit is placed in an on state said first and second subthermometer bits remain in an on state, continuing until all subthermometer bits are placed in on states.
15. The modulation method of claim 10, wherein said predetermined set of rules for placing a subthermometer bit in time slots for an off state thermometer bit comprises separating a first subthermometer bit from a first thermometer bit by at least one time slot, and then separating a second subthermometer bit from a second thermometer bit by at least one time slot.
16. The modulation method of claim 10, wherein said subthermometer bits are distributed such that a first subthermometer bit is placed in a first half of said modulation sequence and a second subthermometer bit is placed in a second half of said modulation sequence, continuing in alternation until all subthermometer bits have been placed.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) FIG. 1 is a schematic diagram of a Reconfigurable Optical Add Drop Multiplexer;
(2) FIG. 2A is a diagram of a single pixel of a liquid crystal on silicon display;
(3) FIG. 2B is a perspective view of the layers of a liquid crystal on silicon display;
(4) FIG. 3A is a drawing of the phase-voltage response of a parallel aligned phase modulated nematic liquid crystal cell;
(5) FIG. 3B is a drawing of the temporal response of a parallel aligned phase modulated nematic liquid crystal cell to a voltage square wave.
(6) FIG. 4 is a block diagram of a pixel circuit for a liquid crystal on silicon display;
(7) FIG. 5 is a voltage and control diagram of a multi pixel liquid crystal display in accordance with the present invention;
(8) FIG. 6A is a data and logic diagram of a multi pixel liquid crystal display in accordance with the present invention;
(9) FIG. 6B is a block diagram of a microdisplay logic and data controller for a multi pixel liquid crystal display in accordance with the present invention;
(10) FIG. 6C is a block diagram of a liquid crystal display in accordance with the present invention;
(11) FIG. 7A depicts a Ronchi interferometer comprising a phase modulator;
(12) FIG. 7B depicts a Ronchi phase grating;
(13) FIGS. 8A-8C depict the development of a lookup table to linearize the relationship between phase shift and gray scale levels;
(14) FIG. 9A depicts a major modulation segment according to the present invention;
(15) FIG. 9B presents an expanded view of a portion of the major modulation segment of FIG. 9A.
(16) FIG. 9C presents an expanded view of one time slot of the major modulation segment of FIG. 9A wherein a terminated write pointer is presented.
(17) FIG. 9D presents an abbreviated mapping from image code to activation of lesser bit segments and the first two thermometer bits.
(18) FIGS. 9E and 9F present a summary of mapping from image code to on state for thermometer bits and lsb bits limited to the first and last values for each thermometer bit.
(19) FIG. 10A presents a subtherm template to be applied to the major modulation segment of FIG. 9A.
(20) FIG. 10B presents the order in which the subtherms of the template of FIG. 10A are turned on.
(21) FIG. 10C depicts an example of the application of the subtherm template of FIG. 10A to the major modulation segment of FIG. 9A.
(22) FIGS. 10D-10G depict subsets of the major modulation segment of FIG. 9A wherein the subtherm template of FIG. 10A is applied at different time slots.
(23) FIG. 11A presents a subtherm template to be applied to the major modulation segment of FIG. 9A.
(24) FIG. 11B presents the order in which the subtherms of the template of FIG. 10A are turned on.
(25) FIG. 11C depicts an example of the application of the subtherm template of FIG. 11A to the major modulation segment of FIG. 9A.
(26) FIG. 12A depicts a chart of the order in which a first phase modulation sequence is applied to a row of a phase modulation display.
(27) FIG. 12B describes time intervals required to implement the phase modulation sequence of FIG. 12A.
(28) FIGS. 12C and 12D depict a method of implementing the minor modulation segments of the phase modulation sequence of FIG. 12A.
(29) FIGS. 12E-12H depict a first 10 time units of the operation of a modulation sequence after FIG. 12A on the rows of a display;
(30) FIG. 13A depicts a chart of the order in which a second phase modulation sequence is applied to a row of a phase modulation display.
(31) FIG. 13B describes time intervals required to implement the phase modulation sequence of FIG. 13A.
(32) FIGS. 13C-13E depict a first 10 time units of the operation of a phase modulation sequence after FIG. 13A on the rows of a display;
(33) FIG. 14A depicts a chart of the order in which a third phase modulation sequence is applied to a row of a phase modulation display.
(34) FIG. 14B describes time intervals required to implement the phase modulation sequence of FIG. 14A.
(35) FIGS. 14C-14E depict a first 10 time units of the operation of a modulation sequence after FIG. 14A on the rows of a display;
(36) FIGS. 15A and 15B depict two implementations of an always on segment on a timeline;
(37) FIG. 16 depicts a relative phase curve illustrating the phase difference between the variable and reference gratings of a Ronchi phase mask;
(38) FIG. 17 depicts a phase versus voltage curve extending beyond the second minima for a liquid crystal parallel aligned spatial light modulator.
(39) FIG. 18 depicts a phase versus voltage curve to the first minima.
(40) FIG. 19 depicts voltage relationships between the common plane and pixel mirrors for two orthogonal phase states at both DC balance states.
(41) FIG. 20 depicts one apparatus for integrating a second set of DACs.
DETAILED DESCRIPTION OF THE INVENTION
(42) It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed. It should be noted that, as used in the specification and the appended claims, the singular forms a, an and the include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to a material may include mixtures of materials; reference to a display may include multiple displays, and the like. References cited herein are hereby incorporated by reference in their entirety, except to the extent that they conflict with teachings explicitly set forth in this specification.
(43) In the following description applicant makes use of the term write pointer. The term virtual write pointers is also used for a pattern of row write actions accomplished in a time ordered sequence. Each member of the pattern of virtual write pointers is serviced by a physical write pointer in turn according to the predetermined order of execution. Because the pattern is always repeated precisely in both spacing and in the order of execution of the row write actions the spacings may be considered a template or pattern. The total pattern of row write pointers may be termed a modulation sequence.
(44) A modulation sequence comprises at least one of a major modulation segment or a minor modulation segment or of both. It represents the totality of the modulation intended for a color of a display for a single frame of data. A terminated write pointer is a special class of write pointer that is writes a single image data value to the pixels of a specific row in conjunction with the writing of image modulation data to a different row. A terminated row is normally set to the dark state. In some instance terminated write pointer may be understood from context to mean row write action by a terminated write pointer. The concept is fully described in U.S. Pat. No. 7,852,307, the contents whereof are incorporated into the present application by reference. In summary, a terminated write pointer is generated by an instruction transferred from the microdisplay controller to the microdisplay in a single cycle of a larger collection of cycles to write image modulation data to a different row. A terminated write pointer writes a single data value, normally dark state, to all pixels on the row to be terminated. In this application a terminated write pointer may write either dark state to all pixels of a row or bright state to all pixels of a row. This provides an ability to reduce the duration of a pulse width modulation for a lesser bit to a duration shorter than the time required to write the entire display once from top to bottom.
(45) In this application dark state data corresponds to a pixel data state that induces a lower retardance state on the liquid crystal cell and bright state data corresponds to a pixel data state that induces a higher retardance state on the liquid crystal cell. The convention is arbitrary.
(46) A row write action in this application takes place when a (virtual) write pointer points or directs image modulation data for a row to that row. The physical write pointer is implemented through a row decoder circuit as is explained in this application. Data refers to image modulation data unless otherwise stated. Input image data and output image data will be differentiated when necessary.
(47) Writing to a row shall mean writing image modulation data to each of the pixels of that row. Writing data to a pixel shall mean writing image modulation data to a memory storage cell corresponding to or located at that pixel. Image modulation data normally mean the modulation value stored in the memory cell, specifically on (active or bright state) or off (dark state).
(48) The use of the term time slot or time segment in discussions of this application is a convention well known in the art. The time slots may be of substantially equal duration and may be determined by the time required to writing a plane of data to all rows of the display device. The time required may be determined by the limiting bandwidth between the display controller at its interface to external memory, between the display controller and its display, or within the controller based on computational requirements. Time slots in a sequence may be designated as tsi where i is an integer denoting the time ordered position in a sequence.
(49) The duration of a time slot in the present application is determined by the time to write image data all pixels of each active row of the display, or, in other words, the time required to write a plane of data. Applicant has developed digital microdisplay products and controller system wherein the time required to write all pixels on active rows in a full high definition resolution (1920 by 1080) display is approximately 75 microseconds (sec). This is equivalent to 222 bit planes during one input data frame at 60 FPS (16.667 milliseconds).
(50) The writing of modulation data means just that. Each pixel may be in a different gray scale state to other pixels surrounding it which means that the combination of one and off thermometer bits, lesser significant bits and subtherms used to create that gray level will be different. The term subtherm would be described later.
(51) In some instances the time slots may not be of substantially equal duration but rather may be of varying duration. Such variations may be used to perform such functions as gamma correction or to compensate for non-linearity in the performance of the liquid crystal device.
(52) Modulation segment means a pulse width modulation segment of a fixed duration. Bit plane may be used in place of modulation segment. Modulation segments begin when a write pointer directs image modulation data to a row and end when a next write pointer directs image modulation data to that row. The minimum duration of a modulation segment is the time required to write the entire display from top to bottom and then return to write it again. The pulse width modulation value represented within a time slot may be shorter than the duration of the time slot through the application of a terminated write pointer as previously described. The term image modulation segment may be used for clarity.
(53) A major modulation segment means a plurality of modulation segments adjacent or nearly adjacent in time. A major modulation segment is normally associated with a single color subframe. The major modulation segment may comprise less than the full range of modulation segments available to create gray scale for a given color, in which case a plurality of major modulation segments, and therefore a plurality of color subframes for that given color, is required to generate the full range of gray scale. In the case of a monochrome phase aligned or amplitude aligned display the terminology may remain the same. The phrase major modulation sequence has the same meaning as major modulation segment unless otherwise indicated.
(54) A minor modulation segment is similar to a major modulation segment in that it is comprised of a plurality of modulation segments adjacent or nearly adjacent in time. In the present application minor modulation segment comprises a small number of modulation segments, typically four or less, although this is not a fundamental limit.
(55) An always on segment is a segment within a minor modulation segment wherein said segment is deployed such that it is always in an on state and is not turned on or off in response to image data. An always on segment may be approximate in value to a thermometer bit.
(56) An lsb segment is a segment containing one of the lesser binary weighted bits. Binary weighted is a nominal term and the actual weighting can be adjusted to accommodate liquid crystal response characteristics.
(57) A thermometer bit is a non-binary weighted bit which is, in one embodiment, approximate in value to the sum of the binary weighted lsb segments. A major modulation segment comprises a plurality of thermometer bits. Value in this case may represent a sum of the on times for the lsb segments or it may represent the sum of the intensities of the lsb segments. Either or a mix of the two is possible. The term thermometer bit is a term of art in the field of digital-to-analog converters (DACs). It is used to describe a DAC which accepts a digital input and yields a voltage out wherein the voltage out is related to the input digital input. The analogy is to a common mercury thermometer where the column of mercury increases in height as temperature increases, segment at a time. One specific type of DAC is the segmented DAC which uses thermometer bits for higher order bits and binary weighted bits for the lesser bits, a feature analogous to the application of that concept to pulse width modulation. The term carries over into the present application in reference to non-binary weighted modulation segments wherein a first thermometer bit at a designated location is turned on or active to achieve a first luminance level. When a second thermometer bit is turned on the first thermometer bit remains on and a second luminance level is reached. This continues until all thermometer bits are turned on. Said first thermometer bit may be considered to have a lowest value and said last thermometer bit may be considered to have a highest value.
(58) The highest value results from the condition that all other thermometer bits are also on. In the present application when a thermometer bit is stated to be a higher value or a higher luminance value it is because all previously turned on thermometer bits remain on and the luminance of said thermometer bit is added to the luminance of said previously turned on thermometer bits.
(59) A subtherm segment (abbreviated sth in this application) is a modulation segment that occupies a time slot allocated to a thermometer bit that is not in an active or on state. The subtherm may occupy the entire time slot or may be terminated by a terminated write pointer as previous mentioned. The purpose of the subtherm segments is to increase the number of gray scale steps available at lower modulation values. The subtherm segments are not fixed like the thermometer segments are, but rather precede the thermometer bits by a specific pattern of time slots. In one embodiment the subtherm pattern may be different at different points on the modulation curve. The term subtherm is derived from sub thermometer because it fits into a time slot that may be occupied by a thermometer bit but which does not have the same impact on gray scale because of its positioning.
(60) In the present application the term populated by is used to explain in which time slot a particular modulation segment is located in. In the case of the lesser bit segments and thermometer bits the assigned time slots never change. Certainly time slots normally assigned to particular thermometer bits may be populated instead by subtherms. The phrase occupied by is of identical meaning. The active verbs populate and occupy have the same meaning.
(61) An image code is a positive integer uniquely associated with a particular set of modulation segments. Use of an image code in place of a longer description of the modulation is desirable to keep notations short and succinct. In the case of a classic pulse width modulated display such as a plasma display panel (PDP) the image code can be configured to represent a gray scale level. In the present invention the image code is an integer that describes a particular state of a set of thermometer bits, subtherms, and lsbs. Image code is distinct from image data in that image data represents the desired output while image code refers to a particular modulation configuration of on and off states in a modulation sequence (comprising one or more modulation segments) that realizes a particular luminance level.
(62) In summary, a set of rules to guide the distributing of thermometer bits and binary weighted lesser significant bits among the major modulation segments must take into account the need to minimize visual artifacts such as flicker and lateral field effects. Although the rules and related guidance address major modulation segments the same procedures may be applied to minor modulation segments. Following this set of rules will establish a set of modulation segment that can be tested. Ultimately a visual test of reference material of known qualities is required but these steps have been tested and found to yield good results.
(63) First, determine the number of major modulation segments required for each color for those embodiments involving a plurality of colors and set a time order for the major modulation segments in an overall modulation scheme. In most phase applications only one color or range of colors is used, such as is the case for telecommunications applications. In those embodiments the same considerations apply as would be the case for a monochrome display.
(64) Second, allocate the binary weighted lesser significant bits for a color to the major modulation segments for that color. Guiding principles include dividing the lesser significant bits such that the overall temporal duration of lesser significant bits is as equal as possible and allocating as few as possible to each major modulation segment.
(65) Third, allocate the thermometer bits to the major modulation segments according to the following principles. A first step is to place the thermometer bits in the major modulation segments such that a first thermometer bit is located in a first major modulation segments and a second thermometer bit is located in a second major modulation segments.
(66) If there are only two major modulation segments then clearly the third thermometer bit may be placed in either segment provided the fourth thermometer bit is placed in the remaining major modulation segment. This insures that the on state times in the major modulation segments will grow evenly, thus minimizing the possibility of flicker.
(67) If there are three major modulation segments, then the first thermometer bit can be placed in the first major modulation segment, the second thermometer bit can be placed in the third major modulation segment, and the third thermometer bit can be placed in the second major modulation segment. It is also possible to allocate the thermometer bits as first thermometer bit to first major modulation segment, second to second and third to third. This is approach may generate a transitory flicker phenomena depending on major changes to gray scale levers between data frames.
(68) If there are four major modulation segments, then the first thermometer bit can be placed in the first major modulation segment, the second thermometer bit can be placed in the third major modulation segment, the third thermometer bit can be place in the second major modulation segment, and the fourth thermometer bit can be place in the fourth major modulation segment. Alternative the third thermometer bit can be placed in the fourth major modulation segment and the fourth thermometer bit can be placed in the second major modulation segment.
(69) If there are five major modulation segments, then the first thermometer bit can be placed in the first major modulation segment, the second thermometer bit can be placed in the third major modulation segment, the third thermometer bit can be placed in the fifth major modulation segment, the fourth thermometer bit can be placed in either the fourth or the second major modulation segment and the fifth thermometer bit can be placed in the remaining major modulation segment.
(70) The guiding principle is that the thermometer bits are to be distributed so that two general conditions are satisfied. First, as the number of thermometer bits set to an on state increases the on state time duration of any one of the major modulation segments does not differ by more than one thermometer bit time slot possibly combined with one lesser bit segment from the on state time duration of any of the other major modulation segments. Second, the thermometer bits should be placed in temporally non-adjacent major modulation segments to the extent temporally non-adjacent major modulation segments are available provided that the first generation condition of this paragraph takes precedence. Since the on state or off state status of the binary weighted lesser significant bits is unpredictable those bit are ignored in the application of the guiding principle.
(71) FIG. 9A presents an overview of a first embodiment of a major modulation segment incorporating one element of the present invention. Major modulation segment 450 comprises an ordered series of time slots 1 (ts1) 451 through ts32 482 with ts1 451 occurring first, ts2 452 occurring second, and so forth until ts32 482 occurs last for a total of 32 time slots. Thm0 through thm26 are thermometer bits assigned to specific time slots in the modulation segment. Ts1 451 through ts26 476 with thm1 through thm26 ordered in reverse order such that thm1 occurs last and thm26 occurs first. Lesser significant bits lsb0 through lsb3 are assigned to ts27 477 through ts30 480, with lsb0 assigned to ts27 477 with lsb1, lsb2 and lsb3 following consecutively in time slots ts28 478, ts29 479 and ts30 480. Those skilled in the art will recognize that the order in which the lesser bits are displayed may be altered based on pragmatic decisions. Thm0 at ts31 481 follows lsb30 at ts30 480. A write to black (wtb) action is position in the last time slot ts32 482 wherein all pixels of the array are set to a dark state.
(72) The positioning of thm0 at ts31 481 and the positioning of the wtb segment at ts32 482 insures that the state of the liquid crystal cell at the beginning of the next modulation segment is uniform, which experimentally has been shown to result in an improved image state by reducing image data cross coupling between color subframes. Data cross coupling occurs when image modulation data for one color is still present on the display when the next color is shown.
(73) One important consideration is the order in which the thermometer bits are turned on with increasing gray scale. In this application the convention is that each thermometer bit is turned on in numerical order. That means that thm0 is turned on first, thm1 is turned on second and so forth until thm26 is turned on last. As previously noted once a thermometer bit is turned on it is never turned off as gray scale increases further. The second convention is that the lsb segments are turned on according to the modulation value they are intended to represent. The relative values for lsb0, lsb1, lsb2 and lsb3 are 1, 2, 4, and 8 respectively, as is the common practice in the field of pulse width modulated displays.
(74) FIG. 9B presents an expanded view of time slots ts25 477 to ts32 482 of major modulation segment 450 of FIG. 9A. The horizontal axis represents time increasing from left to right. The vertical axis represents the rows of the display with the top of the display at the top of FIG. 9B and the bottom of the display at the bottom of FIG. 9B. The lines between the depicted time segments are sloped because of the time it takes to write each row of the display. The dashed lines within ts27 477, ts28 478, ts29 479 and ts30 480 represent terminated write pointers used to create modulations of shorter duration than the time required to write the display with a first set of image modulation data and then to write the display with a next (second) set of image modulation data.
(75) FIG. 9C presents a more detailed depiction of the application of terminated write pointers. Time slot ts29 479 is occupied by lsb2. Time slot ts29 479 is initiated when a first write pointer 484 writes the entire display from top to bottom and ends when a second write pointer 486 writes new data to the entire display from top to bottom. Terminated write pointer (twp) 485 writes dark state data to every row of the display during ts29 479. Vertical marker c is provided to demonstrate that twp 485 is written using the previously described method of U.S. Pat. No. 7,852,307. Vertical marker c intercepts first write pointer 484 at point approximately of the way down the display. At that point the data transferred from the microdisplay controller to the microdisplay includes a twp instruction (not shown) that initiates twp 485. Time slot ts29 479 may be considered to be divided into interval 487 representing the section before twp 485 is applied and interval 488 representing the section after twp 485 is applied. Thus the first part of ts29 479 has active image modulation data present during interval 487 and dark state data during interval 488. In this instance the lesser bit represents a modulation value of 4 in the full lesser bit range of 0 to 15 as previously explained. Vertical marker d intercept marks the initiation of the writing of write pointer 486 and intercepts twp 485, illustrating that a terminated write pointer starts within one write pointer and ends during the succeeding write pointer.
(76) One consideration in the use of terminated write pointers is the need to consider whether a terminated write pointer is available at the time required. Although it is conceptually possible to be able to have more than one terminated write pointer to be associated with a given row write action, current hardware implementations do not allow for more than one twp action for each row write action. In the example of FIG. 9B there is clearly no temporal overlap between any of the terminated write pointer is lesser bit segments lsb0, lsb1, lsb2 and lsb3 it is also clear that if the order were reversed as lsb3, lsb2, lsb1 and lsb0 there would be some overlap where the last twp actions would overlap with the start of the next twp action.
(77) FIG. 9D presents a partial mapping from a combination of thermometer bits and lsb modulation segments according to FIG. 9A. In a pulse width modulated display using both thermometer bits for higher order modulation segments and binary weighted lsb modulation segments the normal convention is for the image code to start at 0 for both higher order modulation segments and binary weighted lsb modulation segments and to step through the lsb modulation segments in order from 0 to 15 (in this case), after which the first thermometer bit segment is turned on and the process of stepping through the lsb modulation segments is repeated. This continues until the entire set of thermometer bits and lsb modulation segments have been stepped through. FIG. 9D presents the results of using this approach for the first 39 image codes (0 through 38). Segments that are active are marked with an x. Starting with image code 0, no segments of any type are active. For images 1 through 15, the various lsb modulation segments are active. At image code 16 the first thermometer bit thm0 is turned on and all lsb modulation segments are off. For image 17 through 31 thm0 remains on and the lsb modulation segments are stepped though as before. For image code 32 the second thermometer bit thm2 is turned on and them 1 remains on. The lsb modulation segments are operated as before. The process continues beyond the limits of the table of FIG. 9D until all thermometer bit segments have been operated and the lsb segments have been operated for each thermometer bit. This creates a total of 448 image codes, each corresponding uniquely to a combination of thermometer bits and lsb modulation segments. 27 thermometer bits represent 28 combinations (0 to 27) and the 4 lesser bit segments correspond to 16 modulation values (0 to 15).
(78) FIGS. 9E and 9F present an abbreviated mapping of thermometer bits and lsbs to image codes. In this example the image code may correspond to a gray level desired. A mapping may be derived through a calibration process in which a table of measured gray levels is developed for each image code. In a later process a reverse mapping may be made to select an image code from the mapping that corresponds to a desired luminance level. An example of a calibration process is provided in this application.
(79) FIG. 10A depicts a template 519 for time slots of a major modulation segment in accordance with the present invention. The modulation segment 519 comprises three different types of modulation elements. Thermometer bits (thmx) represent thermometer bits wherein order in which the thermometer bits are presented in the time ordered sequence are in reverse temporal order. That is, the thermometer bits representing lower modulation values are depicted later in the sequence. Additionally the thermometer bits are operated such that when a thermometer bit for a modulation value is turned on all lower thermometer bits remain on. Thus if thermometer bit thmx is on then thermometer bits thmx1 down to thm0 are all also on. In the present application the lowest modulation value thermometer bit is represented as thm0. Thm0 may be on or off. If thm0 is off then all other thermometer bits are off. Thermometer bit thm0 is separated from the other thermometer bits by the lesser bit segments and is placed as the last active segment in the major modulation segment for the reasons stated in the text regarding FIG. 9A.
(80) The second type of modulation element is the subtherm (sub-thermometer). As previously noted, a subtherm occupies a time slot for a given gray level that would be occupied by a thermometer bit if the gray level were higher. Subtherms are operated in a manner similar to thermometer bits. When a first subtherm (sth0) is turned on, it is the last subtherm in temporal order. When a second subtherm (sth1) is turned on, that subtherm is next to last in order and the first subtherm (sth0) remains on. When a third subtherm (sth2) is turned on, that subtherm is third to last and the first and second subtherms (sth0 and sth1) remain on.
(81) There is a strict temporal relationship between the position of the subtherm modulation elements and the highest modulation value thermometer bit that is on, for all subtherms other than sth0. There will be at least one off state time slot between the first subtherm (sth0, last in temporal order) and the time slot for the higher modulation value on state thermometer bit. In the present example shown in FIG. 10A, there are two blank time slots tsi+3 523 and tsi+4 524 between the time slot tsi+2 522 for the first subtherm sth0 and the time slot tsi+5 525 for the highest thermometer bit thmx.
(82) If thermometer bit thm1 is not on then the subtherm sequence is placed such that time slot tsi+5 525 is occupied by the element of the lsb sequence earliest in time.
(83) The third type of modulation element is a lesser significant bit (lsb), indicated by lsbx where the range of values for x in the present example is 0 to 3. Because the lsb segments are binary weighting the four segments can generate are range of modulation values from 0 to 15. The lsb segments may be generated by using the terminated write pointer methodology described in FIG. 9C above since the time required to write the array normally exceed the desire duration of lesser bits in most modulation segments.
(84) FIG. 10A presents template 519 for application of subtherms in a major modulation segment comprising seven succeeding time slots, depicted from left to right as tsi 520 to tsi+6 526. Time slot tsi 520 through tsi+2 522 are populated by subtherms sth2, sth1, and sth0 in that order. A condition of template 519 in the present example is that the first time slot holding an active thermometer bit following sth0 be exactly the third following time slot. Thus the time slot holding the highest on state thermometer bit thmx is tsi+5 525. If the highest on state thermometer bit was thmx1 at tsi+6 526 then subtherms sth2 through sth0 would be placed in time slots tsi+1 521 through tsi+3 523.
(85) The logic behind the placement of the subtherms according to the template 519 is that it establishes a consistent temporal relationship between the time slot for the last subtherm in time order (i.e., the first subtherm sth0) and the time slot for the first thermometer bit in time order. The liquid crystal cell responds slowly to the subtherms that are on but the resets quickly to off state during the two time slots that are off before responding to the on state thermometer bits. The fixed temporal relationships make the liquid crystal cell response more consistent and can ease the task of developing an effective modulation scheme for a particular liquid crystal cell configuration.
(86) Those of skill in the art will appreciate that the present invention is not limited to normally white materials and can in fact be applied to normally black liquid crystal materials by an adjustment of the time considerations.
(87) The benefit of placing the subtherms in the manner described is that the subtherms have a small effect on the brightness associated with the thermometer bits and lsbs but not a great effect because of the relatively slow rise time. The inventors of the present invention have verified experimentally that this small effect can be used to create a large number of small perturbations in the liquid crystal response along the entire modulation response curve that can be used to improve on gray scale accuracy when calibrated using an appropriate calibration system, as is explained elsewhere in the present application. A second added benefit is that it does not require an increase in the data bandwidth between the microdisplay controller and the microdisplay to achieve this improvement. Information regarding calibration is presented in the present application.
(88) FIG. 10B presents the order in which subtherms sth0, sth1 and sth2 are turned on. This can be considered to ascending gray scale terms since turning on sth0 and sth1 together clearly represents an increase in modulation time for the subtherm set is modulating light with the same conclusion for the case where st0, sth1 and sth2 are all on. The x in the box indicates that the subtherm in question is on.
(89) FIG. 10C presents a first example for application of the template 519 to major modulation segment 450 from FIG. 9A. The highest modulation value thermometer bit in an on state is thm2 in time slot ts25 475. (On state thermometer bits are indicated by the diagonal hash fill. Thermometer bit time slots not hash filled are considered to be off.) Time slot ts25 475 also occurs earliest in the sequence of on state thermometer bits. Thermometer bits thm4 and thm3 in time slots ts23 473 and ts34 474 are in an off state as required by template 519 of FIG. 10A. Subtherms stm2, stm1 and stm0 are positioned in time slots ts20 470, ts21 471 and ts22 472 respectively. (The dotted fill of the subtherm time slots is to call attention to the position of the subtherms and does not signify that the subtherms are in either an on state or an off state. The lsb segments are operated as described for FIG. 9B and FIG. 9C.) The subtherms may be operated in any one of the four states previously presented in FIG. 10B. The first thermometer bit thm0 is positioned at the end of major modulation segment 450 and is in an on state. A write to black wtb action follows thm0 in time slot ts482. Lesser bits lsb0, lsb1, lsb2 and lsb3 are positions in ts27 477, ts28 478, ts29 479 and ts30 480 respectively. The lesser bits may be either on or off depending on the modulation value (0 to 15 in this case.)
(90) In the discussion of FIG. 9D a previous approach to the creation of image codes for thermometer bits is presented. The addition of subtherms requires extension of that methodology. In the present application the technique to be used is to place the subtherms between the thermometer bits between the thermometer bits and the lsb segments in the order in which the various elements are turned on. A method of accomplishing this is partially illustrated in FIGS. 10D, 10E, 10F and 10G.
(91) FIGS. 10D through 10G present definition tables for image codes 0 through 155 for major modulation segment 450 of FIG. 9A with the subtherm template of FIG. 10A applied. The tables are limited to thermometer bits thm0 and thm1 for the sake of brevity with the understanding that the table could be expanded to cover all thermometer bits. At image code 0 all lsbs, subtherms and thermometer bits are off. For image codes 0 through 15 the lsbs are turned on and off in a manner well known in the art to create a 4-bit modulation. At image code 16 subtherm sth0 is turned on and the lsb pattern is repeated for image codes 16 through 31. Beginning at image code 32 subtherm sth1 is activated, subtherm sth0 remains active and the lsb pattern is repeated for image codes 32 through 47. At modulation code 48 subtherm sth2 is activated and subtherms sth0 and sth1 remain active, and the lsb pattern is repeated for image codes 48 through 63. At image code 64 all lsb segments and subtherm segments are turned off and thm0 is turned on. The entire sequence during which the subtherms are operated according to the table presented in FIG. 10B and the lsbs are operated according to image codes 0 through 15 is then repeated for image codes 64 through 127. At image code 128 all lsbs and subtherms are turned to off, thermometer bit thm1 is turned on and thermometer bit thm0 remains on. The process is then repeated as before.
(92) FIG. 11A represents an alternative subtherm template 501 that can be applied to major modulation segment 450 of FIG. 9A. In this template the three subtherms sth2, sth1 and sth0 are positions in time segments tsi+1 531, tsi+2 533 and tsi+5 535 which are separated by intervening off state thermometer bit thmx+5 and thmx+3 positioned in time slots tsi+1 532 and tsi+3 534 respectively. Subtherm sth0 is separated from thermometer bit thmx positioned at time slot tsi+6 537 by off state thermometer bit thmx+1 at time slot tsi+5 536.
(93) In this case the introduction of separation between subtherms in the sequence is useful to reduce the impact of the subtherms on the range of luminance values created by the subtherms. The logic behind this ordering is that a normally white liquid crystal that tends to drive to black faster than it drives to white can be induced to add small perturbations to the basic modulation curve that are smaller in luminance value than those created by the subtherm pattern of FIG. 10A because of the discontinuity in the pattern. It is obvious that a mix of these two techniques is also possible. The reduction in the duration of the off state gap between subtherm sth0 and the first on state thermometer bit thmx from two time slots to one time slot is a consequence of the reduced influence of the subtherms when positioned according to template 501 on the liquid crystal cell.
(94) FIG. 11B presents the order in which subtherms sth0, sth1 and sth2 are turned on. This can be considered to ascending gray scale terms since turning on sth0 and sth1 together clearly represents an increase in modulation time for the subtherm set is modulating light with the same conclusion for the case where st0, sth1 and sth2 are all on. The x in the box indicates that the subtherm in question is on.
(95) FIG. 11C presents a first example 502 for application of the template 501 to major modulation segment 450 from FIG. 9A. The highest modulation value thermometer bit in an on state is thm11 at time slot ts16 466. (On state thermometer bits are indicated by the diagonal hash fill. Thermometer bit time slots not hash filled are considered to be off.) Time slot ts16 466 also occurs earliest in the sequence of on state thermometer bits. Subtherms sth2, sth1 and sth0 are positioned in time slots ts10 460, ts12 462 and ts14 464 respectively. (The dot fill of the subtherm time slots is to call attention to the position of the subtherms and does not indicate on state or off state. The lsb segments are operated as described for FIG. 9B and FIG. 9C.) Thermometer bits thm16 and thm14 in time slots ts11 461 and ts13 463 are in an off state as required by template 501 of FIG. 11A. Subtherm sth0 is separated from the highest on state thermometer bit thm11 at time slot ts16 466 by a single off state thermometer bit thm12 positioned at time slot ts15 465. The subtherms may be operated in any one of the four states previously presented in FIG. 11B. As indicated, thermometer bits thm0 to thm11 are all in an on state. A write to black wtb action follows thm0 in time slot ts482. Lesser bits lsb0, lsb1, lsb2 and lsb3 are positioned in ts27 477, ts28 478, ts29 479 and ts30 480 respectively. The lesser bits may be either on or off depending on the modulation value (0 to 15 in this case.)
(96) FIG. 12A presents a time ordered view of modulation sequence 600 comprised of minor modulation segments 640-651. Each minor modulation segment is comprised of three modulation segmentsa first thermometer segment (thm or therm), an always on segment and a third segment which comprises one of an lsb segment (lsb), a subtherm segment (sth or subtherm) or a thermometer segment (thm or therm). The therms, subtherms and lsbs are operated in a manner similar to that disclosed in FIGS. 11A-11C. The subtherms, however, operate in a dedicated position in the minor modulation segments and therefore never run out of a position as the image code value increases as described in FIGS. 11A-11C and associated text. Specifically, the image code steps through all lsb values in order before incrementing the subtherm by 1, and then steps through all the lsb values again. Once the image code includes all subtherms and all lsbs have been stepped through again the lsbs and subtherms are reset to the beginning and the next therm is activated.
(97) Minor modulation segment 640 comprises modulation segments thm4 601, aon0 602, and lsb0 603. Off state interval 660 follows segment lsb0 603. All off state intervals are represented by a dashed line connecting each minor modulation segment to the succeeding minor modulation segment. Minor modulation segment 641 comprises modulation segments thm8 604, aon1 605 and sth0 606, which is followed by off state interval 661. Minor modulation segment 642 comprised modulation segments thm12 607, aon2 608 and thm0, which is followed by off state interval 662. Minor modulation segments 643, 644 and 645 operate in a similar manner with the last segment comprising an lsb, and sth and a thm in that order. The following table summarizes the full sequence.
(98) TABLE-US-00003 3.sup.rd Off-state Group Reference 1.sup.st segment 2.sup.nd segment segment interval 1 640 Thm4 601 Aon0 602 Lsb0 603 660 641 Thm8 604 Aon1 605 Sth0 606 661 642 Thm12 607 Aon2 608 Thm0 609 662 2 643 Thm6 610 Aon3 611 Lsb2 612 663 644 Thm10 613 Aon4 614 Sth2 615 664 645 Thm14 616 Aon5 617 Thm2 618 665 3 646 Thm5 619 Aon6 620 Lsb1 621 666 647 Thm9 622 Aon7 623 Sth1 624 667 648 Thm13 625 Aon8 626 Thm1 627 668 4 649 Thm7 628 Aon9 629 Lsb3 630 669 650 Thm11 631 Aon10 632 Sth3 633 670 651 Thm15 634 Aon11 635 Thm3 636 Not shown
(99) Referring to FIG. 12A, modulation sequence 600 is portrayed in a left half and a right half which comprise the even number (individual) segments and the odd number (individual) segments respectively. In the above table the data are presented in four groups of three. Groups 1 and 2 represent the left half and Groups 3 and 4 represent the right half. The temporal order in which thermometer segments and subtherm segments are populated is consistent with the practice disclosed in FIGS. 11A-11C. The temporal distribution of the thermometer segments and subtherm segments is based on several principles. A first principle that the number of thermometer bits in a given minor modulation segment differs from the number in another minor modulation segments by no more than one. A second guiding principle is that all segments of a specific type appear in a regular pattern. Lsb segments appear in minor modulation segments 640, 643, 645 and 649 which are at the end of the first minor modulation segments of Groups 1, 2, 3 and 4 respectively. Subtherm segments appear in the last segment of minor modulation segments 641, 644, 647 and 650 which are the second minor modulation segments in Groups 1, 2, 3 and 4. Thermometer segments appear in the last segment of minor modulation segments 642, 645, 648, and 651, which are the third minor modulation segments in Groups 1, 2, 3 and 4. The use of Groups in this example is for convenience of description only.
(100) The general order of distribution for the thermometer bits is to place the thermometer bits in ascending order in different Groups according to a predetermined pattern. Thm0 609 appears in Group 1, thm1 627 appears in Group 3, thm2 618 appears in Group 2 and thm3 636 appears in Group 4. Thermometer segments thm4 601, thm5 619, thm6 610 and thm7 628 follow a similar pattern as do thermometer segments thm8 604, thm9 622, thm10 613 and thm11 631 and as do thermometer segments thm12 607, thm13 625, thm14 616 and thm15 634.
(101) This distribution insures that the intensity of modulation in each of the groups of three minor modulation segments grows in a relatively uniform manner.
(102) FIG. 12B depicts the duration of each modulation segment in each of the minor modulation segments as well as the duration of each minor modulation segment and the cumulative time interval count. The unit of time is unittime which is defined as the time required to write the 24 rows that are written when the 24 write pointers direct image data to those rows. This convention is used because the actual time will vary based on the number of write pointers and the effective clock frequency of the interface between the microdisplay and the microdisplay controller as previously described in conjunction with FIGS. 6A-6C and associated text.
(103) As an example, a digital display system (not shown) similar to that of FIGS. 6A-6C comprises a data path that is 64 bits wide, a display controller operative to deliver image data to a digital display on both leading and falling edges of a data transfer clock, and a digital display system with a resolution of 1920 columns by 1080 rows operative to receive image data and deliver it to specific rows based on address information included in said image data. Data is transferred from the digital display controller to the digital display system at a clock rate of 302 MHz. A row write action corresponding to a single write pointer takes 30 (1920/64) transfer events to transfer the image data from the digital display controller to the digital display, which is 15 full clock cycles. The modulation sequence of FIGS. 12A and 12B comprises 24 write pointers and extends over 1170 rows, which is the last cumulative modulation intervals shown in FIG. 12B. Writing 24 write pointers in a time-sharing manner requires 24 row write actions at 302 MHz which is 24*15/302,000,000 or 2.384 sec. It is an example of the unittime. Multiplying this unittime by the 1170 rows in the modulation sequence (each write pointer must visit every row to be modulated) yields 2.789 milliseconds to write all data to all rows. An explanation of the implications of a modulation sequence containing more steps than there are rows on the display is explained below.
(104) FIGS. 12C and 12D present apparatus and method for implementing the minor modulation segments of FIG. 12A with a limited number of write pointers. In FIG. 12C minor modulation segment 691 comprises thermometer segment thm j 671, always on segment aon k 672, and modulation segment seg 1 673 followed by off state interval m 674. Modulation segment seg 1 673 is one of a thermometer segment, an lsb segment or a subtherm segment. Thermometer segment thm j 671 is initiated by write pointer 675 which directs image data to the pixels of the row to which write pointer 675 directs the data. Thermometer segment thm j 671 ends when terminated write pointer 676 directs on state data (write to white, or wtw) image data to the pixels of that same row to start always on segment aon k 672. This sets all pixels of that row to an on state which normally corresponds to maximum retardance for a parallel aligned phase modulator. Always on segment aon k is terminated when write pointer 677 writes image data to the pixels of that row to start modulation segment seg 1 673. Modulation segment seg 1 is terminated by terminated write pointer 678 which sets all pixel of that row to an off state (write to black or wtb), thereby starting off state interval m 674. An off state normally corresponds to minimum retardance for a parallel aligned phase modulator. Off state interval m 674 is terminated by write pointer 679 which initiates a thermometer segment (not shown) of the next minor modulation segment. (Not shown). This is a very efficient method of writing a minor modulation segment comprising three segments followed by an off state interval while requiring only two write pointers and using two terminated write pointers.
(105) FIG. 12D presents a second minor modulation segment 692 comprising thermometer segment thm i 680, thermometer segment thm j 681, always on segment aon k 682, and modulation segment 1 683 followed by and off state interval m 684. Thermometer segment thm i 680 is initiated by write pointer 685 which directs image data to the pixels of a given row. Thermometer segment thm i 680 is terminated when write pointer 686 directs image data to thermometer segment thm j 681. Thermometer segment thm j 681 is terminated when terminated write pointer 687 directs on state data (write to white, or wtw) to the pixels of that same row to start always on segment aon k 682. This sets all pixels of that row to an on state which normally corresponds to maximum retardance for a parallel aligned phase modulator. Always on segment aon k is terminated when write pointer 688 writes image data to the pixels of that row to start modulation segment seg 1 683. Modulation segment seg 1 683 is terminated by terminated write pointer 798 which sets all pixel of that row to an off state (write to black or wtb), thereby starting interval m 684. An off start normally corresponds to minimum retardance for a parallel aligned phase modulator. Off state interval m 684 is terminated by write pointer 690 which initiates a thermometer segment (not shown) of the next minor modulation segment. (Not shown).
(106) FIGS. 12E-12H depict the row position for a set of write pointers during the first 11 unit-time time segments of a major modulation sequence after FIG. 12A marked as 0 through 10 across the top of the table. The left hand column indicates the row at which the write pointer located in the column for unittime 0 is positioned. Subsequent write pointers are positioned one row lower than the same write pointer in the previous column. Only the write pointers are shown and no terminated write pointers are included for clarity. Write pointer 0 is written first, and then write point 1. The writing of write pointers continues until write pointer 23 is written and then the writing proceeds to the next unittime column.
(107) The temporal weighting of the lsb segments, subtherms and thermometer bits is described hereafter. Modulation sequence 600 comprises three types of modulation segments, each with a different temporal weighting. The four lsb segments operate in a classic binary weighted fashion. As is well known in the art four binary weighted lsb segments represent a value of 16 (0 to 15). In the example shown in FIG. 12B, the four lsb segments occupy a total of 1.875 unittime time segments when all are on. The four subtherms each are of a time weighting of 2 unittime time units and operate as thermometer bits in that once a subtherm segment is turned on it stays on when the next subtherm segment is turned on as shown in FIG. 11B. When all four subtherm segments are on and all four lsb segments are on the total time weighting of the subtherm segments and the lsb segments is approximately 10 unittime time units. Since the time weighting of the subtherm segments is also 2 unittime time units, each represents an equivalent weighting of 16 least significant bit segments. The 18 thermometer bits (thm0 through thm17) are each weighted approximately 10 unittime time units. Because the sum of the subtherm segments and lsb segments is approximately 10 unittime time units and each subtherm represents 16 least significant bit segment, the total number of lsbs in each thermometer segment is 80.
(108) The range of image codes that can be represented is based the number of thermometer segment states, subtherm segment states and lsb states. Since there are four lsb segments, the number of states is 16 (0 to 15). The number of subtherm segment states for the four subtherms is 5, one for all off and one additional as each subtherm segment is turned on. The number of thermometer segment states is 17, one for all off and one additional as each of the 16 thermometer bits is turned on. The product of these numbers is 16*5*17=1360, which is the number of independent modulation states (image codes) available.
(109) One consideration is what happens when the number of steps in the modulation is greater than the number of rows on the display. FIG. 12H depicts, by a dashed line, the limit of the 1080 rows. Since the write pointers extend beyond that point the controller must provide means for building in a dummy timing. This practice is well known in the art.
(110) FIG. 13A presents a time ordered view of modulation sequence 700 comprised of minor modulation segments 740-751. Each minor modulation segment is comprised of three modulation segmenta first thermometer segment (thm or therm), an always on segment and a third segment which comprises one of an lsb segment (lsb) or a thermometer segment (thm or therm). The therms and lsbs are operated in a manner similar to that disclosed in FIGS. 9A-9F. Specifically, the image code steps through all lsb values in order before incrementing the thermometer segment by 1, and then steps through all the lsb values again. In this implementation the lsb segments alternate with the thermometer segments. A table summarizing this is presented below.
(111) TABLE-US-00004 3.sup.rd Off-state Group Reference 1.sup.st segment 2.sup.nd segment segment interval 1 740 Thm6 701 Aon0 702 Lsb0 703 760 741 Thm12 704 Aon1 705 Thm1 706 761 742 Thm8 707 Aon2 708 Lsb2 709 762 743 Thm14 710 Aon3 711 Thm3 712 763 744 Thm10 713 Aon4 714 Lsb4 715 764 745 Thm16 716 Aon5 717 Thm5 718 765 2 746 Thm7 719 Aon6 720 Lsb1 721 766 747 Thm13 722 Aon7 723 Thm0 724 767 748 Thm9 725 Aon8 726 Lsb3 727 768 749 Thm15 728 Aon9 729 Thm2 730 769 750 Thm11 731 Aon10 732 Lsb5 733 770 751 Thm17 734 Aon11 735 Thm4 736 Not shown
(112) Referring to FIG. 13A, modulation sequence 700 is portrayed in a left half and a right half which comprise the even number (individual) segments and the odd number (individual) segments respectively. In the above table the data are presented in two groups of six. Group 1 represents the left half and Group 2 represents the right half. The temporal order in which thermometer segments and subtherm segments are populated is consistent with the practice disclosed in FIGS. 11A-11C. The temporal distribution of the thermometer segments is based on several principles. A first principle that the number of thermometer bits in a given minor modulation segment differs from the number in another minor modulation segments by no more than one. A second guiding principle is that all segments of a specific type appear in a regular pattern. Lsb segments appear after an always on segment in even numbered minor modulation segments 740, 742, 744, 746, 748 and 750 and the six lowest number thermometer segments (thm0-thm5) appear in odd numbered minor modulation segments 741, 743, 745, 747, 749 and 751 after the always on segment. The higher number thermometer segments (thm6-thm17) appear in the modulation segments before the always on segment in each minor modulation segment. Even numbered thermometer segments appear in Group 1 and odd numbered thermometer bits appear in Group 2. Thm6 701 appears in the first minor modulation segment 740 of Group 1 and thm7 occupies the same position in Group 2. Thm8 707 occupies the third minor modulation segment 742 of Group 1 and thm9 725 occupies the same position in Group 2. Thm10 occupies the fifth minor modulation segment 744 in Group 1 and thm11 731 occupies the same position in Group 2. Thm12 704 occupies the second minor modulation segment 741 in Group 1 and thm13 722 occupies the same position in Group 2. Thm14 710 occupies the fourth minor modulation segment 743 in Group 1 and thm15 728 occupies the same position in Group 2. Thm16 716 occupies the sixth minor modulation segment 745 in Group 1 and thm17 734 occupies the same position in Group 2. The use of groups is for clarity of explanation. Groups do not form a necessary part of this present invention.
(113) This distribution insures that the intensity of modulation in each of the groups of three minor modulation segments grows in a relatively uniform manner.
(114) FIG. 13B depicts the duration of each modulation segment in each of the minor modulation segments as well as the duration of each minor modulation segment and the cumulative time interval count. The unit of time is unittime which is the time required to write the 24 rows that are written when the 24 write pointers direct image data to those rows. This convention is used because the actual time will vary based on the number of write pointers and the effective clock frequency of the interface between the microdisplay and the microdisplay controller as previously described in conjunction with FIGS. 6A-6C and associated text.
(115) As an example, a digital display system (not shown) similar to that of FIGS. 6A-6C comprises a data path that is 64 bits wide, a display controller operative to deliver image data to a digital display on both leading and falling edges of a data transfer clock, and a digital display system with a resolution of 1920 columns by 1080 rows operative to receive image data and deliver it to specific rows based on address information included in said image data. Data is transferred from the digital display controller to the digital display system at a clock rate of 302 MHz. A row write action corresponding to a single write pointer takes 30 (1920/64) transfer events to transfer the image data from the digital display controller to the digital display, which is 15 full clock cycles. The modulation sequence of FIGS. 13A and 13B comprises 24 write pointers and extends over 1164 rows, which is the last cumulative modulation intervals shown in FIG. 13B. Writing 24 write pointers requires 24 row write actions at 302 MHz which is 24*15/302,000,000 or 2.384 sec. Multiplying this by the 1164 rows in the modulation sequence (each write pointer must visit every row to be modulated) yields 2.775 milliseconds to write all data to all rows.
(116) Apparatus and method for implementing the minor modulation segments for this example is presented in FIGS. 12C and 12D and associated text.
(117) FIGS. 13C-13E depict the row position for a set of write pointers during the first 11 unittime time segments of a major modulation sequence after FIG. 13A marked as 0 through 10 across the top of the table. The left hand column indicates the row at which the write pointer located in the column for unittime 0 is positioned. Subsequent write pointers are positioned one row lower than the same write pointer in the previous column. Only the write pointers are shown and no terminated write pointers are included for clarity. Write pointer 0 is written first, and then write point 1. The writing of write pointers continues until write pointer 23 is written and then the writing proceeds to the next unittime column.
(118) The temporal weighting of the lsb segments and thermometer bits is described hereafter. Modulation sequence 700 comprises two types of modulation segments. The six lsb segments operate in a classic binary weighted fashion with a total binary weighting when all segments are on of approximately 31.5 unittime time units. As is well known in the art six binary weighted lsb segments have 64 possible states (0 to 63). The least significant bit (lsb0) is represent by 0.5 unittime time units as shown in FIG. 13B. The 18 thermometer bits (thm0 through thm17) are each weighted approximately 32 unittime time units. The number of thermometer segment states is 19, one for all off and one additional as each of the 18 thermometer bits is turned on. The product of these numbers is 64*19=1216, which is the number of independent modulation states (image codes) available.
(119) The cumulative number of modulation intervals from FIG. 13B is 1164, which exceeds the number of rows available on the display. FIG. 13E depicts, by a dashed line, the limit of the 1080 rows. Since the write pointers extend beyond that point the controller must provide means for building in dummy timing.
(120) FIG. 14A presents a time ordered view of modulation sequence 800 comprised of minor modulation segments 840-847. Each minor modulation segment is comprised of four modulation segmentsa first thermometer segment (thm or therm), a second thermometer segment, an always on segment and a fourth segment which comprises one of an lsb segment (lsb), or a subtherm segment (sth or subtherm) or a thermometer segment (thm or therm). The therms, subtherms and lsbs are operated in a manner similar to that disclosed in FIGS. 12A-12H. The subtherms operate in a dedicated position in the minor modulation segments and therefore never run out of a position as the image code value increases as described in FIGS. 11A-11C and associated text. Specifically, the image code steps through all lsb values in order before incrementing the subtherm by 1, and then steps through all the lsb values again. Once the image code includes all subtherms and all lsbs have been stepped through again the lsbs and subtherms are reset to the beginning and the next thermometer segment is activated.
(121) Minor modulation segment 840 comprises modulation segments thm8 801, thm0 802, aon0 803, and lsb0 804. Off state interval 833 follows segment lsb0 804. Minor modulation segment 641 comprises modulation segments thm12 805, thm4 806, aon1 807 and sth0 808, which is followed by off state interval 834. Minor modulation segment 842 comprises modulation segments thm10 809, thm2 810, aon2 811 and lsb2 812, which is followed by off state interval 835. Minor modulation segments 843, 844 845, 846 and 847 operate in a similar manner with the last segment comprising an lsb and a subtherm sth in that order. The following table summarizes the full sequence.
(122) TABLE-US-00005 Group Reference 1.sup.st segment 2.sup.nd segment 3.sup.rd segment 4.sup.th segment Off-state interval 1 840 Thm8 801 Thm0 802 Aon0 803 Lsb0 804 833 841 Thm12 805 Thm4 805 Aon1 806 Sth0 808 834 2 842 Thm10 809 Thm2 810 Aon2 811 Lsb2 812 835 843 Thm14 813 Thm6 814 Aon3 815 Sth2 816 836 3 844 Thm9 817 Thm1 818 Aon4 819 Lsb1 820 837 845 Thm13 821 Thm5 822 Aon5 823 Sth1 824 838 4 846 Thm11 825 Thm3 826 Aon6 827 Lsb3 828 839 847 Thm15 829 Thm7 830 Aon7 831 Sth3 832 Not shown
(123) Referring to FIG. 14A, modulation sequence 800 is portrayed in a left half and a right half which comprise the even number (individual) segments and the odd number (individual) segments respectively. In the above table the data are presented in four groups of three. Groups 1 and 2 represent the left half and Groups 3 and 4 represent the right half. The temporal order in which thermometer segments and subtherm segments are populated is consistent with the practice disclosed in FIGS. 11A-11C. The temporal distribution of the thermometer segments and subtherm segments is based on several principles. A first principle that the number of thermometer bits in a given minor modulation segment differs from the number in another minor modulation segments by no more than one. A second guiding principle is that all segments of a specific type appear in a regular pattern. A third guiding principle is that the thermometer segments (2nd segment) closest in time to the always on segment are all turned on before any thermometer segments (1st segment) earlier in time from the always on segment are turned on. Lsb segments appear in minor modulation segments 840, 842, 844 and 846 at the end of said minor modulation segment of Groups 1, 2 3 and 4 respectively. Subtherm segments appear in the last segment of minor modulation segments 841, 843, 845 and 847 which are the second minor modulation segments in Groups 1, 2, 3 and 4 respectively.
(124) The general order of distribution for the thermometer bits is to place the thermometer bits in ascending order in different groups of two according to a predetermined pattern. Thermometer segment thm0 802 appears in minor modulation segment 840 of Group 1 and thermometer segment thm1 818 appears in at the same position in Group 3. Thermometer segment thm2 810 appears in minor modulation segment 842 of Group 2 and thermometer segment thm3 826 appears at the same position in Group 4. Thermometer segments thm4 806, thm5 822, thm6 814 and thm7 830 follow a similar pattern as do thermometer segments thm8 801, thm9 817, thm10 809 and thm11 825 and as do thermometer segments thm12 805, thm13 821, thm14 813 and thm15 829.
(125) The general order for subtherm segments is that described For FIG. 11B with associated text. Subtherm sth0 is turned on first, then subtherm segments sth1, sth2 and sth3 in that order. Subtherm segment sth3, for example, may be on only if subtherm segments sth0, sth1 and sth2 are on. All subtherm segments are positioned at the end of the second minor modulation segment of each group and alternate with the lsb segments in that position.
(126) This distribution insures that the duration of modulation in each of the groups of two minor modulation segments grows in a relatively uniform manner.
(127) FIG. 14B depicts the duration of each modulation segment in each of the minor modulation segments as well as the duration of each minor modulation segment and the cumulative time interval count. The unit of time is unittime which is the time required to write the 24 rows that are written when the 24 write pointers direct image data to those rows. This convention is used because the actual time will vary based on the number of write pointers and the effective clock frequency of the interface between the microdisplay and the microdisplay controller as previously described in conjunction with FIGS. 6A-6C and associated text.
(128) As an example, a digital display system (not shown) similar to that of FIGS. 6A-6C comprises a data path that is 64 bits wide, a display controller operative to deliver image data to a digital display on both leading and falling edges of a data transfer clock, and a digital display system with a resolution of 1920 columns by 1080 rows operative to receive image data and deliver it to specific rows based on address information included in said image data. Data is transferred from the digital display controller to the digital display system at a clock rate of 302 MHz. A row write action corresponding to a single write pointer takes 30 (1920/64) transfer events to transfer the image data from the digital display controller to the digital display, which is 15 full clock cycles. The modulation sequence of FIGS. 14A and 14B comprises 24 write pointers and extends over 1132 rows, which is the last cumulative modulation intervals shown in FIG. 14B. Writing 24 write pointers requires 24 row write actions at 302 MHz which is 24*15/302,000,000 or 2.384 sec. Multiplying this by the 1132 rows in the modulation sequence (each write pointer must visit every row to be modulated) yields 2.298 milliseconds to write all data to all rows.
(129) FIGS. 14C-14E depict the row position for a set of write pointers during the first 11 unittime time segments of a major modulation sequence after FIG. 14A marked as 0 through 10 across the top of the table. The left hand column indicates the row at which the write pointer located in the column for unittime 0 is positioned. Subsequent write pointers are positioned one row lower than the same write pointer in the previous column. Only the write pointers are shown and no terminated write pointers are included for clarity. Write pointer 0 is written first, and then write point 1. The writing of write pointers continues until write pointer 23 is written and then the writing proceeds to the next unittime column.
(130) The addition of a second thermometer bit in the sequence raises the number of write pointers required to write one minor modulation segment by one as shown in FIG. 12D. In the present example the total number of write pointers not including terminated write pointers is 24, therefore requiring the number of minor modulation segments to be reduced from 12 to 8. The limitation on the number of write pointers in the examples of this application is not a fundamental limitation, and higher or lower numbers of write pointers is envisioned within the scope of the present application.
(131) The temporal weighting of the lsb segments and thermometer bits is described hereafter. Modulation sequence 900 comprises two types of modulation segments. The four lsb segments operate in a classic binary weighted fashion with a total binary weighting when all segments are on of approximately 2 unittime time units. As is well known in the art four binary weighted lsb segments have 16 possible states (0 to 15). The least significant bit (lsb0) is represent by 0.166 unittime time units as shown in FIG. 14B. The number of subtherm segment states for the four subtherms is 5, one for all off and one additional as each subtherm segment is turned on. The 16 thermometer bits (thm0 through thm15) are each weighted approximately 10 unittime time units. The number of thermometer segment states is 15, one for all off and one additional as each of the 18 thermometer bits is turned on. The product of these numbers is 16*5*15=1200, which is the number of independent modulation states (image codes) available.
(132) The cumulative number of modulation intervals from FIG. 14B is 1132, which exceeds the number of rows available on the display. FIG. 14E depicts, by a dashed line, the limit of the 1080 rows. Since the write pointers extend beyond that point the controller must provide means for building in dummy timing.
(133) The temporal weighting of the lsb segments, subtherms and thermometer bits is described hereafter. Modulation sequence 800 comprises three types of modulation segments, each with a different temporal weighting. The four lsb segments operate in a classic binary weighted fashion. As is well known in the art four binary weighted lsb segments represent a value of 16 (0 to 15). The four lsb segments occupy a total of 2 unittime time segments when all are on. The four subtherms each are of a time weighting of 2 unittime time units and operate as thermometer bits in that once a subtherm segment is turned on it stays on when the next subtherm segment is turned on as shown in FIG. 14B. When all four subtherm segments are on and all four lsb segments are on the total time weighting of the subtherm segments and the lsb segments is approximately 10 unittime time units. Since the time weighting of the subtherm segments is also 2 unittime time units, each represents an equivalent weighting of 16 least significant bit segments. The 16 thermometer bits (thm0 through thm15) are each weighted approximately 10 unittime time units. Because the sum of the subtherm segments and lsb segments is approximately 10 unittime time units and each subtherm represents 16 least significant bit segments the total number of lsbs in each thermometer segment is 80.
(134) The range of image codes that can be represented is based the number of thermometer segment states, subtherm segment states and lsb states. Since there are four lsb segments the number of states is 16 (0 to 15). The number of subtherm segment states for the four subtherms is 5, one for all off and one additional as each subtherm segment is turned on. The number of thermometer segment states is 15, one for all off and one additional as each of the 14 thermometer bits is turned on. The product of these numbers is 16*5*15=1200, which is the number of independent modulation states (image codes) available.
(135) FIG. 15A depicts timeline 901 wherein a series of always on segments 902, 903, 904 and 905, each associated with a series of minor modulation segments (not shown) are depicted. Each is separated from the next by a time interval 906. In the example of FIGS. 12A and 12B the time interval is approximately 97 unittime time units. From the text for FIG. 12B the data transfer clock rate is 302 MHz. The number of full clock cycles required to transfer data for 1920 pixels of a row is 15 so the time required to transfer one row write cycle is 15/302,000,000 seconds or 49.67 nanoseconds (nsec). This is equivalent to a frequency of 20.1333 MHz for row write actions. This frequency component is unlikely to be passed by passed by the liquid crystal cell to result in a high frequency component in a modulated waveform. The period between always on segments is 97 unittime time units which from the same example is 97*2.384 sec or 231.25 sec. The frequency associated with this period is about 4.324 kHz which is a frequency component that may be passed by the liquid crystal cell and result in a high frequency component in the modulated waveform.
(136) A method for mitigating this effect is depicted in FIG. 15B. Timeline 911 and always on segments 912, 913, 914 and 915 are presented. A first time interval 916 separates always on segments 912 and 913. A second time interval 917 separates always on segments 913 and 914. A third time interval 918 separate always on segments 914 and 915. Times segments 916, 917 and 918 are similar but not identical in duration. In one embodiment the sum of the durations of time intervals 917 and 918 are approximately equal to twice the duration of time interval 916.
(137) In the following example adapted from FIGS. 12A and 12B and associated text, the duration of time interval 916 is 97 time units. The durations of time intervals 917 and 918 are 92 and 102 respectively. A quick calculation reveals that the underlying frequency components of intervals 916, 917 and 918 are 4.324 kHz, 4.559 kHz and 4.112 kHz respectively. Although these may still bleed through into the modulated waveform the frequencies are sufficiently dispersed that the peak of the bleed through is substantially lower. Many variations on this are recognized.
(138) FIG. 16 depicts a relative phase curve 940. In one example relative phase curve represents the phase difference between reference phase state N.sub.ref 194 and variable phase state N.sub.v 196 of Ronchi phase grating 154 of FIG. 7B. Point 942 on phase curve 940 represents the position of reference phase state N.sub.ref 194. One problem that arises in capturing data when stepping variable phase state N.sub.v 196 is that the performance of the test rig may lead to problems. First, when operating variable phase state N.sub.v 196 at a value similar to reference phase state N.sub.ref 194 it is possible that the detected phase state is on the wrong side of point 942. In the case of pulse width modulation this has been determined experimentally to be an issue. Second, when there is some noise in the sensor (e.g., photometer 170 of FIG. 7A) this ambiguity may be exacerbated. One method to remove this ambiguity is to change the phase value of N.sub.ref 194. A first method for doing this is to place reference phase state N.sub.ref 194 at point 942 and variable phase state N.sub.v 196 at point 941 so that the relative phase shift is radians. After this is verified to be correct then the positions of reference phase state N.sub.ref 194 and variable phase state N.sub.v 196 can be swapped so that reference phase state N.sub.ref 194 at point 941 and variable phase state N.sub.v 196 at point 942. This can be verified against the previous measurements. Then variable phase state N.sub.v 196 can be stepped through the area around point 942. An alternative would be to place reference phase state N.sub.ref 194 at point 943 and variable phase state N.sub.v 196 at point 942 which would also be a relative phase shift of radians. In this way data for variable phase state N.sub.v 196 can be explored about point 942 without the previously mentioned ambiguity.
(139) Pulse width modulation as described herein does require consideration of the operating voltages of the liquid crystal cell. Experimental evidence has shown that one set of operating voltages may off advantages over a different set of operating voltages even though the same range of phase modulation is offered by both sets of voltages.
(140) For the microdisplay system previously described in FIGS. 4 through 6C there has been empirically noted that when voltages V.sub.0 374 and V.sub.1 372 are closer together sometimes the response time of the liquid crystal material in the LC cell is slower. Therefore there is some response time advantage in operating with a wider voltage spread between V.sub.0 374 and V.sub.1 372. Note that the design of the pixel cell 305 shown in FIG. 4 requires that the lower of the voltages relative to ground be connected to V.sub.0 374 and the higher to V.sub.1 372. An adverse consequence of operating with a wider voltage spread between V.sub.0 374 and V.sub.1 372 is that a stronger lateral field between adjacent pixels 305 will develop than is the case when the voltage spread is narrower. The lateral field effect is somewhat mitigated by the magnitude of the voltage between the pixel mirror of either state and the voltage of the common plane (ITO) electrode. Lateral field effects are particularly important for phase modulation devices. It is most often referred to as cross-talk because the data states of adjacent pixels are affecting each other.
(141) To analyze this in better detail, the inventors have established a figure of merit calculation wherein the difference between V.sub.0 374 and V.sub.1 372 is divided by the average of V.sub.0 374 and V.sub.1 372. This ratio can be used to compare different operating settings when lateral field effect is a concern provided the two settings are for identical or nearly identical liquid crystal cells. In general a lower lateral field figure of merit (FOM.sub.LAT) is indicative of a lower level of cross-talk than a higher FOM.sub.LAT.
(142) The figure of merit equation is:
(143)
(144) FIG. 17 depicts a modeled amplitude (annotated as reflectance) versus voltage curve 950 for a parallel aligned phase only spatial light modulator with greater than 360 of phase modulation available wherein the polarization state of incoming light is at 45 to the alignment axis of the liquid crystal cell, as previously described. In measure phase modulation it is often convenient to rely upon amplitude measurements because of the difficulty in measuring phase angle differences directly. In contrast to the practice for displays for human usage, the preferred type of measurement is radiometric rather than photopic photometry. This technique is well understood in the art. Sources recognize that operating beyond first minima 955 is sometimes desirable although the context varies with some sources proposing to operate over a range of 4. (See, for example, Broadband suppression of the zero diffraction order of an SLM using its extended phase modulation range, Jesacher et al, Optics Express, Vol. 22, No. 14, pages 17590-17599.) In other contexts the modulation range may be 720 or greater.
(145) The region between point 951 (1.3 volts) and point 952 (2.1 volts) near first minima 955 is a typical operating range for an amplitude aligned spatial light modulator. A more typical phase operating range is the range between first maxima point 951 (1.3 volts) and second maxima point 957 (2.96 volts.) This provides a full 360 of phase modulation. A less typical operating range is for the region between second maxima 957 and third maxima 954. The disadvantage of choosing this range is that for many LCOS architectures this requires that the voltage operating range of the LCOS backplane be expanded to accommodate the need to encompass two voltage operating ranges arrayed symmetrically about the common plane voltage. As is shown in FIG. 19 the operating voltage range of the microdisplay backplane need only accommodate a range of voltages limited to the spread between the highest voltage and the lowest voltage in one of the two voltage DC balance states. The spread between the pixel voltages and the common plane voltage is a consequence of providing the common plane voltage independently of the silicon backplane. By inspection it is clear that the slope of phase change versus voltage is lower in that a given voltage range gives less change in phase, especially in the region between minima 956 and third maxima 954.
(146) An additional effect of operating with a greater voltage difference between the common plane and the individuals is at least the opportunity for a faster response time. This phenomenon is well known although it is important to verify this experimentally in particular cases because of the individual properties of specific liquid crystal mixtures and cell configurations.
(147) The results of calculation of a FOMLAT for each of the first and second operating ranges mentioned above are presented in the following table.
(148) TABLE-US-00006 Range V.sub.0 V.sub.1 FOM First 1.3 2.96 0.779 Second 2.96 5.2 0.549
(149) Comparison of the two results of the two Figures of Merit reveals that the second range has a lower value and therefore is the preferred range of the two.
(150) Thus it appears in this case that operating solely between second maxima 957 and third maxima 954 results in a spatial light modulator with faster switching speed and less cross-talk than a spatial light modulator operating between first maxima 951 and second maxima 957.
(151) Another consideration is the application of parallel aligned phase spatial light modulators to holographic data storage (HDS) systems. The goal of an HDS system is to store large amounts of binary data on a holographic medium in page format where important considerations include throughput, data reliability and cost efficiency. Such systems compete with archival data storage systems such as tape data systems manufactured by Storage Technology Corp., now a part of Oracle Corp, as well as other manufacturers.
(152) There are a number of things within an HDS system that impact on the speed of operation. A summary of these is presented in Section 2 of Holographic Data Storage: Science Fiction or Science Fact, Ken Anderson et al, Akonia Holographics LLC, presented at Optical Data Storage 2014. One factor noted in Section 2.1 Spatial Light Modulators is that the number of pixels per page is a critical parameter for transfer rate. All other things being equal, the write transfer rate is proportional to the number of pixels written in each page of data. The paper also states that the number of pixels on the spatial light modulator increases the number of pixels on each page of data.
(153) A second consideration for an HDS system is the storage capacity of its holographic medium. Some aspects of this are controlled by the design of the medium itself. Other parts relate to the manner in which the holograph data is written to the holographic medium. One important method to increase data density is the use of multiplexing. There are various types of multiplexing that can all coexist in a single system writing data to a single holographic medium. One of these is referred to as Phase Quadrature Holographic Multiplexing (PQHM). (See paragraph 4.2 of said Akonia paper.) Two holograms can be written using the same reference beam at the same reference beam angle provided the two holograms are written with a 90 phase difference. This technique is reported to avoid cross-talk whether the hologram is created using a two phase state approach (0 and 180) or a four phase state approach (0, 90, 180 and 270). This embodiment discloses an apparatus of implementing the two phase state approach in quadrature utilizing the microdisplay system described in FIGS. 4 through 6C.
(154) FIG. 18 presents an electro-optic curve of the type associated with a reflective homogeneously aligned untwisted nematic liquid crystal cell as previously described. In a typical phase modulation configuration the pretilt angles of the liquid crystal cell are aligned to the angle of the polarized light upon which the liquid crystal cell is intended to act. Reviewing previously disclosed information, in a spatial light modulator configuration this type of cell is considered to be a normally white mode. This means that maximum retardance occurs when the cell is operated with a low voltage difference between the common plane voltage and the pixel voltage and that minimum retardance occurs when the cell is operated with a higher voltage difference between the common plane voltage and the pixel voltage. Devices configured in this manner are well known in the art and are available commercially from a number of sources.
(155) A liquid crystal cell of this type may be configured to have sufficient operating range to modulate a full wave (2 radians or 360) of light at the designed wavelength. In an HDS system the typical design wavelength is around 405 nanometers (nm) with a range of 5 nm. This relatively narrow range of wavelengths can be accommodated with a point design liquid crystal cell. This may permit the use of a liquid crystal material with lower rotational viscosity and therefore with faster response speed. Alternatively a higher rotational viscosity liquid crystal material may be used if the smoothing characteristic is needed to minimize phase fluctuations.
(156) Phase retardation points 960 0, 961 90, 962 180, 963 270 and 964 360 are indicated on FIG. 18. These correspond to a set of drive voltage differences between the common plane and the pixel voltage. While the retardation at points 960 0 and 964 360 technically have the same effect the two values are generated by different voltages, which may be of importance in the operation of the liquid crystal cell. By inspection it is clear that the voltage spacing between the different phase states is not linear. Those with experience in the art will recognize that the retardance of a thicker liquid crystal cell may be substantially linear over a significant range with respect to voltage. In this embodiment either situation may apply.
(157) Reviewing of the phase states indicated on FIG. 18, it is obvious by inspection that a first pair of retardance states is 960 0 and 962 180 and a second pair of retardance states is 961 90 and 963 270. These two pairs of states are in fact orthogonal as is required for PQHM storage to operate without crosstalk. It is also clear from inspection that the voltage differences required to generate 90 and 270 are greater than that required to generate 0 and 180 respectively.
(158) FIG. 19 presents an overview of the required voltages in graphic form. The left half of FIG. 19 represents a first set of voltages in field normal format and the right half presents the inverse of the same voltages in field invert format. This naming convention is arbitrary. Field normal and field invert together are the set of voltages required to operate the spatial light modulator in a DC balanced fashion as is well known in the art. The solid lines represent a first set of voltages (set a) with a first common plane offset while the dashed lines represent a second set of voltages (set b) with a second common plane offset wherein the second voltage offset state is greater than the first common plane offset. The voltages are analogous to the voltages in the electro-optic curve of FIG. 18. In the table the letters L and H refer to low and high respectively. The letters a and b distinguish between the two voltage sets. Although V0 and V1 are the same in both voltage sets it is obvious that Vo and V1 in a first set may be different to V0 and V1 in a second set due to non-linearity of the electro-optic curve or for some other reason. The table below explains the relationship to FIG. 18.
(159) TABLE-US-00007 Phase State and Drive Voltage Matrix DC Balance State Field Normal Field Invert Common Pixel LC Common Pixel LC Phase Plane Volt- Drive Plane Volt- Drive Angle Voltage age Voltage Voltage age Voltage 960 0 V.sub.ITO_L_b V.sub.1 V.sub.B_b V.sub.ITO_H_b V.sub.0 V.sub.B_b 961 90 V.sub.ITO_L_a V.sub.1 V.sub.B_a V.sub.ITO_H_a V.sub.0 V.sub.B_a 962 180 V.sub.ITO_L_b V.sub.0 V.sub.W_b V.sub.ITO_H_b V.sub.1 V.sub.W_b 963 270 V.sub.ITO_L_a V.sub.0 V.sub.W_a V.sub.ITO_H_a V.sub.1 V.sub.W_a
(160) In a two phase state application switching between drive voltages as described above, the liquid crystal cell is not required to have a full wave of retardance to provide all the required retardance values. In fact only 270 (3/2 radians) is mandatory although a thicker cell may offer advantages, such as greater linearity of phase angle with respect to voltage.
(161) Another important consideration is the means for creating the sets of voltages required for this method of modulation. FIG. 5 depicts one embodiment for generating the required voltages. Voltage controller 384 and common plane (ITO) controller 399 are both directed by processing unit 388 over voltage control bus 390. In one embodiment voltage control signals set from processing unit 388 to voltage controller 384 over voltage control bus 390 may include voltage set commands to DACs (not shown) within voltage controller 384. Said DACs may include those used to generate VITO_L, VITO_H, V0 and V1, as may be required by the shape of the electro-optic curve.
(162) In some instances the configuration of the voltage controller may now permit the changing of the required voltages from the first set to the second set by use of voltage set commands to DACs in the voltage controller. In that case a second set of DACs is required. FIG. 20 depicts one apparatus for integrating a second set of DACs. Voltage and logic controller 970 comprises voltage controller 971, processing unit 974, memory unit 975, ITO (common plane) multiplexor 972 and pixel voltage multiplexor 973. From FIG. 5, transparent common electrode 392 overlays the entire array of pixel cells 305. In a preferred embodiment, pixel cells 305 are formed on a silicon substrate or base material, and are overlaid with an array of pixel mirrors 354 (from FIG. 4), each single pixel mirror 354 forming a part of one of the pixel cells 305. Each pixel cell 305 comprises the circuit elements disclosed in FIG. 4. A substantially uniform layer of liquid crystal material is located in between the array of pixel mirrors 354 and the transparent common electrode 392. Transparent common electrode 392 is preferably formed by a transparent conductive material such as Indium Tin-Oxide (ITO) coated onto a glass substrate (not shown) as previously disclosed in FIG. 3, items 240 and 242. Memory 975 is a computer readable medium including programmed data and commands. The memory is capable of directing processing unit 974 to implement various voltage modulation and other control schemes. Processing unit 974 receives data and commands from memory unit 975, via memory bus 976, provides internal voltage control signals, via voltage control bus 978, to voltage controller 971, and provides data signals (i.e. image data into the pixel array) via data control bus 977. Voltage controller 384, memory unit 975, processing unit 974, common plane (ITO) multiplexor 972 and pixel voltage multiplexor 973 may be separate units or alternative may form part of a larger circuit assembly in a larger integrated circuit or circuit board assembly. Memory unit 386 may comprise both operating RAM and nonvolatile memory such as an SPI (Serial Peripheral Interface) memory. (Not shown)
(163) Voltage controller 971 generates voltages for an a group (not shown) comprising common plane (ITO) voltages \T.sub.ITO.sub._.sub.H.sub._.sub.a, 980 and V.sub.ITO.sub._.sub.L.sub._.sub.a 981 and pixel voltages V.sub.1.sub._.sub.a 984 and V.sub.0.sub._.sub.a 985 and voltages for a b group (not shown) comprising common plane voltages V.sub.ITO.sub._.sub.H.sub._.sub.b 982 and V.sub.ITO.sub._.sub.L.sub._.sub.b 983 and pixel voltages V.sub.1.sub._.sub.b 986 and V.sub.0.sub._.sub.b 987. Commands from processor unit 974 delivered over control bus 978 direct pixel multiplexor 973 and common plane multiplexor 972 to select either the voltages of the a group or the voltages of the b group for output 988 of common plane multiplexor 972 and outputs 989 and 990 of pixel voltage multiplexor 973. In the case of the a group either common plane voltage V.sub.ITO.sub._.sub.H.sub._.sub.a 982 or V.sub.ITO.sub._.sub.L.sub._.sub.a 983 is selected for common plane multiplexor output V.sub.ITO 988, according to DC balance control, and pixel voltages V.sub.1.sub._.sub.a 984 and V.sub.0.sub._.sub.a 985 are selected for pixel voltage multiplexor outputs V.sub.1 989 and V.sub.0 990 respectively. In the case of the b group either common plane voltage V.sub.ITO.sub._.sub.H.sub._.sub.b 982 or V.sub.ITO.sub._.sub.L.sub._.sub.b 983 is selected for common plane multiplexor output V.sub.ITO 988, according to DC balance control, and pixel voltages V.sub.1.sub._.sub.b 986 and V.sub.0.sub._.sub.b 987 are selected for pixel voltage multiplexor outputs V.sub.1 989 and V.sub.0 990 respectively.
(164) DC balance control is implemented through a set of synchronized commands to common plane multiplexor 972 and to array of pixels cells 305 of FIG. 5. When the a group is selected, common plane voltage multiplexer 972 selects between V.sub.ITO.sub._.sub.H.sub._.sub.a 980 and V.sub.ITO.sub._.sub.L.sub._.sub.a 981 to be asserted on common plane multiplexor output V.sub.ITO 988 based on control signals received from processing unit 974. When the b group is selected, common plane voltage multiplexor 972 selects between V.sub.ITO.sub._.sub.H.sub._.sub.b 982 and V.sub.ITO.sub._.sub.L.sub._.sub.b 983 to be asserted on common plane multiplexor output V.sub.ITO 988 based on control signals received from processing unit 974. Processing unit 974 controls the logic state of (logic) voltage supply terminals V.sub.SWA.sub._.sub.P 991, V.sub.SWA.sub._.sub.N 992, V.sub.SWB.sub._.sub.P 993, and V.sub.SWB.sub._.sub.N 994 in synchronization with the switching of V.sub.ITO 988 as previously described. ITO voltage multiplexor 972 delivers V.sub.ITO to transparent common electrode 392 of FIG. 5, by voltage supply terminal (V.sub.ITO) 988. Each of the voltage supply terminals V.sub.1 989, V.sub.0 990, V.sub.SWA.sub._.sub.P 991, V.sub.SWA.sub._.sub.N 992, V.sub.SWB.sub._.sub.P 993, and V.sub.SWB.sub._.sub.N 994 in FIG. 20 are global signals, wherein each global terminal supplies the same voltage to each pixel cell 305 from FIG. 305 throughout the entire pixel array in the operation of a display system comprising voltage and logic 970. V.sub.ITO 988 asserts a single voltage selected by common plane multiplexer 972 as previously described on transparent common electrode 392 of FIG. 5.
(165) The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these implementations will be readily apparent to those skilled in the art, and the generic principles described herein can be applied to other implementations without departing from the spirit or scope of the invention. Thus, it is to be understood that the description and drawings provided herein represent example implementations of the invention and are therefore representative of the subject matter which is broadly contemplated by the invention. It is further understood that the scope of the present invention fully encompasses other implementations and that the scope of the present invention is accordingly limited by nothing other than the appended claims.
