Power-efficient programmable broadband high-pass preamplifier systems

Abstract

A method for pre-amplifying an input voltage signal to a pre-amplified voltage signal. The method includes receiving the input voltage signal; obtaining a high-pass filtered voltage signal by applying a high-pass filter to the input voltage signal; processing the high-pass filtered voltage signal to a current signal that corresponds to the high-pass filtered voltage signal; transmitting the current signal through a differential transmission line; converting the transmitted current signal to a converted voltage signal that corresponds to the high-pass filtered voltage signal; and outputting the converted voltage signal as the pre-amplified voltage signal. An integrated circuit chip implementing the method is also disclosed.

Claims

1. A preamplifier system for pre-amplifying input voltage signals to pre-amplified voltage signals, the system comprising: first circuitry configured to receive an input voltage signal; high-pass filter the input voltage signal to obtain a high-pass filtered voltage signal; and process the high-pass filtered voltage signal to obtain a current signal that corresponds to the high-pass filtered voltage signal; and second circuitry configured to receive the current signal from the first circuitry through a differential transmission line; convert the received current signal to obtain a converted voltage signal that corresponds to the high-pass filtered voltage signal; and output the converted voltage signal as a pre-amplified voltage signal; wherein the system comprises two or more instances of the first circuitry each of which is configured to receive a respective input voltage signal and obtain a respective current signal that corresponds to an associated input voltage signal that has been high-pass filtered, and wherein the second circuitry is configured to receive from each instance of the first circuitry the respective current signal through a corresponding one of two or more differential transmission lines, and convert the respective current signal to an associated pre-amplified voltage signal that corresponds to the associated input voltage signal that has been high-pass filtered.

2. The system of claim 1, wherein the high-pass filter operation is performed by the first circuitry in a programmatic manner.

3. The system claim 1, wherein the first circuitry is configured to control a level of the current signal transmitted over the differential transmission line, and the control operation is performed by the first circuitry in a programmatic manner.

4. The system of claim 1, wherein the first circuitry is configured to receive a sensor signal from a sensor; and form the input voltage signal from the received sensor signal.

5. The system of claim 1, wherein the first circuitry, the differential transmission line and the second circuitry are implemented on a single integrated circuit chip, or on two or more integrated circuit chips that are packaged together in an integrated circuit package unit, or the system is a system on chip.

6. The system of claim 1, comprising a current signal multiplexer configured to multiplex the two or more current signals transmitted through the respective two or more differential transmission lines, and provide a multiplexed current signal to the second circuitry.

7. The system of claim 6, wherein the high-pass filter operation is performed by the first circuitry in a programmatic manner.

8. The system claim 6, wherein the first circuitry is configured to control a level of the current signal transmitted over the differential transmission line, and the control operation is performed by the first circuitry in a programmatic manner.

9. The system of claim 6, wherein the first circuitry is configured to receive a sensor signal from a sensor; and form the input voltage signal from the received sensor signal.

10. A preamplifier system for pre-amplifying input voltage signals to pre-amplified voltage signals, the system comprising: first circuitry configured to receive an input voltage signal; high-pass filter the input voltage signal to obtain a high-pass filtered voltage signal; and process the high-pass filtered voltage signal to obtain a current signal that corresponds to the high-pass filtered voltage signal; and second circuitry configured to receive the current signal from the first circuitry through a differential transmission line; convert the received current signal to obtain a converted voltage signal that corresponds to the high-pass filtered voltage signal; and output the converted voltage signal as a pre-amplified voltage signal; wherein the system comprises two or more instances of the first circuitry each of which is configured to receive a respective input voltage signal and obtain a respective current signal that corresponds to an associated input voltage signal that has been high-pass filtered; and two or more instances of the second circuitry each of which is configured to receive from a corresponding instance of the first circuitry the respective current signal through a corresponding one of two or more differential transmission lines, and convert the respective current signal to an associated pre-amplified voltage signal that corresponds to the associated input voltage signal that has been high-pass filtered.

11. The system of claim 10, wherein the first circuitry, the differential transmission line and the second circuitry are implemented on a single integrated circuit chip, or on two or more integrated circuit chips that are packaged together in an integrated circuit package unit, or the system is a system on chip.

12. The system of claim 10, comprising a voltage signal multiplexer configured to multiplex the two or more pre-amplified voltage signals provided by the respective instances of the second circuitry, and output a multiplexed pre-amplified voltage signal.

13. A method for pre-amplifying an input voltage signal to a pre-amplified voltage signal, the method comprising: receiving the input voltage signal; obtaining a high-pass filtered voltage signal by applying a high-pass filter to the input voltage signal; processing, by transconductance circuitry, the high-pass filtered voltage signal to a current signal that corresponds to the high-pass filtered voltage signal, and outputting the current signal at a differential output of the transconductance circuitry, the differential output being connected to a first end of a differential transmission line; transmitting the current signal through the differential transmission line from the first end to a second, opposing end of the differential transmission line, the second end being connected to a differential input of current-to-voltage converting circuitry; converting, by the current-to-voltage converting circuitry, the transmitted current signal to a converted voltage signal that corresponds to the high-pass filtered voltage signal; and outputting the converted voltage signal as the pre-amplified voltage signal, wherein the input voltage signal, the high-pass filtered voltage signal, the current signal and the pre-amplified voltage signal are differential signals.

14. The method of claim 13, wherein the high-pass filter is applied in a programmatic manner.

15. The method of claim 13, further comprising controlling, in a programmatic manner, a level of the current signal transmitted over the differential transmission line.

16. The method of claim 13, comprising: receiving a sensor signal from a sensor, wherein the sensor signal is a differential signal; and forming the input voltage signal from the received sensor signal.

17. The method of claim 13, comprising: receiving, by a gain stage, the pre-amplified voltage signal from the current-to-voltage converting circuitry; and amplifying, by the gain stage, the received pre-amplified voltage signal.

18. The method of claim 13, comprising: receiving two or more input voltage signals and obtaining two or more current signals that correspond to the respective input voltage signals that have been high-pass filtered; transmitting the two or more current signals through corresponding two or more differential transmission lines; and converting the transmitted current signals to respective two or more pre-amplified voltage signals that correspond to the two or more input voltage signals that have been high-pass filtered.

19. The method of claim 18, comprising multiplexing the two or more current signals transmitted through the respective two or more differential transmission lines to a multiplexed current signal prior to converting the multiplexed current signal to a multiplexed pre-amplified voltage signal.

20. The method of claim 18, comprising multiplexing the two or more pre-amplified voltage signals to a multiplexed pre-amplified voltage signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 shows an example of a preamplifier system that includes a transconductance amplifier and a current-to-voltage converter coupled together through a long trace that has large capacitance.

(2) FIG. 2 shows an example of a combination of high-pass filter and a transconductance amplifier like the ones included in the preamplifier system of FIG. 1.

(3) FIG. 3 shows an example of a current tracking circuit used to control gain of a transconductance amplifier like the one included in the transconductance amplifier of FIG. 2.

(4) FIG. 4 shows an example of a current-to-voltage converter like the one included in the preamplifier system of FIG. 1.

(5) FIG. 5A shows an example of a preamplifier system, like the preamplifier system of FIG. 1, for processing multiple sensor signals.

(6) FIG. 5B shows another example of a preamplifier system, like the preamplifier system of FIG. 1, for processing multiple sensor signals.

(7) Certain illustrative aspects of the disclosed technologies are described herein in connection with the following description and the accompanying figures. These aspects are, however, indicative of but a few of the various ways in which the principles of the disclosed technologies may be employed and the disclosed technologies are intended to include all such aspects and their equivalents. Other advantages and novel features of the disclosed technologies may become apparent from the following detailed description when considered in conjunction with the figures.

DETAILED DESCRIPTION

(8) FIG. 1 shows a preamplifier system 100 configured to (i) form a sensor signal V.sub.01, e.g., by using a sensor stage that includes amplifier 110, (ii) high-pass filter the sensor signal V.sub.01 to a high-pass filtered voltage signal V and transform the latter to a current signal I, (iii) transmit the current signal I through a trace 140 (e.g., a differential transmission line) having parasitic capacitance C.sub.P caused by a trace length in a range from hundreds of microns to thousands of microns, (iv) convert the transmitted current signal I to a voltage signal V.sub.02 prior to delivering it to a gain stage, e.g., to amplifier 170. Here, the long trace 140 is disposed between first stage circuitry 120 and second stage circuitry 150 of the preamplifier system 100. By converting a high-pass filtered voltage signal V into a corresponding current signal I, the current signal I is suitably transported without degradation over a relatively long differential trace 140, and then converted back to a voltage signal V.sub.02, that is input, at a relatively close proximity, considerably less than hundreds of microns in some embodiments, to amplifier 170.

(9) The first stage circuitry 120 includes a high-pass filter and a transconductance amplifier 130 that, in an embodiment, is configured to receive a differential input voltage signal V and to generate an amplified differential current signal I corresponding to the input differential input voltage signal V. The second stage circuitry 150 includes a current-to-voltage converter 160. In some implementations, the amplifier 110, the first stage circuitry 120, the second stage circuitry 150, and the amplifier 170 are disposed on the same IC chip 102. In other embodiments, the amplifier 110 and the first stage circuitry 120 are disposed on a first IC chip, while the second stage circuitry 150 and the amplifier 170 are disposed on a second IC chip. The first and second IC chips are packaged together in a single IC chip package unit in some embodiments, although this need not be the case.

(10) FIG. 1 shows that the sensor signal V.sub.01 is formed by amplifying, by amplifier 110, a voltage across a sensor R.sub.M (e.g., a hard drive head). The amplifier 110 is coupled with the first stage circuitry 120.

(11) Capacitors C.sub.HP1, C.sub.HP2 (e.g., having a value of 4 pF, for example, in an embodiment) are respectively connected between input ports (a.d) of the high pass filter and input ports (b1,b2) of the transconductance amplifier 130. Resistors R.sub.HP1, R.sub.HP2 (e.g., having values of at least 100k, in some embodiments) are respectively connected between the input ports (b1,b2) of the transconductance amplifier 130 and the output ports (e,f) of the transconductance amplifier 130, and form the feedback loops of the transconductance amplifier 130. In some embodiments, the resistance of resistors R.sub.HP1, R.sub.HP2 is variable. Together, the capacitors C.sub.HP1, C.sub.HP2 and the resistors R.sub.HP1, R.sub.HP2 form the high-pass filter. The high-pass filter removes at least the DC component of the sensor signal V.sub.01 and forms a high-pass filtered signal V that is a high-pass filtered voltage signal which is input to transconductance amplifier 130. Note that the high-pass filtered signal V is a voltage signal applied to the inputs (b1,b2) of the transconductance amplifier 130. The transconductance amplifier 130 is used to convert the high-pass filtered signal V to a current signal I, where I=g.sub.mV, and gmthe transconductance of the transconductance amplifier 130is constant across PVT. In some implementations, the transconductance gm of transconductance amplifier 130 is programmable as explained below. The current signal I is output by the transconductance amplifier 130 at its output ports (e,f)

(12) An example of the first stage circuitry 120 is shown in FIG. 2. The first stage circuitry 220 shown in FIG. 2 includes a high-pass filterformed by capacitors C.sub.HP1, C.sub.HP2 and resistors R.sub.HP1, R.sub.RP2and a transconductance amplifier 230. The capacitors C.sub.HP1, C.sub.HP2 of the high-pass filter are respectively connected between the input ports (a,d) of the high pass filter and input ports (b1,b2) of the transconductance amplifier 230. The resistors R.sub.HP1, R.sub.HP2 of the high-pass filter are respectively connected between the input ports (b1,b2) of the transconductance amplifier 230 and the output ports (e,f) of the transconductance amplifier 230, and form feedback loops of the transconductance amplifier 230. In an embodiment, the transconductance amplifier 230 includes field-effect transistors (FETs) M1, M2. For example, the FETs M1 M2 are suitably metal-oxide-semiconductor FETs (MOSFETs) or other type of FET, in an embodiment. Input ports (b1,b2) of the transconductance amplifier 230 are connected to the gates of FETs M1, M2, respectively, to receive a high-pass filtered voltage signal (called V in FIG. 1, which is a version of the sensor signal V.sub.01 without at least its DC component). Output ports (e, f) of the transconductance amplifier 230 are connected to the drains of FETs M1, M2, respectively, to output current signal I. Note that the current signal I corresponds to the high-pass filtered sensor signal V.sub.01.

(13) Further note that a gain of the transconductance amplifier 230 is controlled (e.g., programmatically) by using a tracking circuit 280 (also referred to as a gain controller 280) coupled with the sources of FETs M1, M2. Here, the sources of FETs M1, M2 are connected together at node A. In this manner, as described below in connection with FIG. 3, the gain of the transconductance amplifier 230 is proportional to a current I.sub.tail delivered to the sources of FETs M1, M2, at node A, by the tracking circuit 280.

(14) An implementation of the tracking circuit 280 is shown in FIG. 3. FIG. 3 shows a portion of a tracking circuit 380 that includes a first current mirror 382 and a second current mirror 384. An output of the second current mirror 384 is coupled with the node A to deliver the current I.sub.tail to the sources of FETs M1, M2 of the transconductance amplifier 230.

(15) The first current mirror 382 includes transistors T1, T2, T3, T4, T5, and resistor Zgm. For example, the transistors T1, T2, T3,T4, T5 suitably are FETs, in an embodiment. Transistors T1, T2, T3, T4 are suitably arranged in a Wilson current sourceconfiguration. Moreover, the combination of transistors T1 and T2, and resistor Zgm determine a reference current (also referred to as a tracking current) I.sub.REF. Here, the reference current I.sub.REF can be expressed as

(16) $\begin{array}{cc}{I}_{\mathrm{REF}}=\frac{}{Z_{\mathrm{gm}}^2},& \left(1\right)\end{array}$
where , is a constant number. In this manner, the reference current I.sub.REF is induced in the output branch, which includes transistor T5, of the first current mirror 382. Note that the first current mirror 382 is suitably initiated using a start-up circuit 386.

(17) The second current mirror 384 includes transistor T6 and a set of transistors S1, . . . , SN, each transistor Sj, where j=1 . . . N and N2, being arranged on a respective output branch of the second current mirror 382. For example, the transistors T6, S1, . . . , SN are suitably FETs. Note that the reference branch, which includes transistor T6, of the second current mirror 384 is common with the output branch, which includes transistor T5, of the first current mirror 382, and thus, the reference current of the second current mirror 384 is also the tracking current I.sub.REF, expressed in EQ. 1. In this manner, a P-type current flow through transistor T5 is converted to an N-type current flow through transistor T6.

(18) Moreover, each output branch of the second current mirror 384 is connected with node A through a respective switch K.sub.j, where j=1. . . N. In this manner, the current hail delivered by the second current mirror 384 to node A is suitably adjusted (e.g., programmatically) in increments of I.sub.REF/N, depending on how many of the switches K.sub.1, . . . , K.sub.N are turned ON or OFF along respective output branches of the second current mirror 384. The foregoing (e.g., programmatic) adjustments of current I.sub.tail result in fine tuning of the gain of the transconductance amplifier 230. Such adjustments are performed, e.g., in some implementations, using a processor 385 linked with the switches K.sub.1, . . . , K.sub.N to tune the gain of the transconductance amplifier 230 to compensate for shifts in the gain of either the sensor stage the gain of amplifier 110) or the gain stage (e.g., the gain of amplifier 170). Such tuning is suitably performed either before shipping the preamplifier system 100, or in the field. In some implementations, the processor 385 is disposed on the same IC chip 102 as the first stage circuitry 120. In other implementations, the processor 385 is disposed on another chip in communication with the IC chip 102.

(19) Referring now to FIG. 2, transconductance gm of the transconductance amplifier 230 satisfies, in view of EQ. 1, the following equation:

(20) $\begin{array}{cc}\sqrt{I}=\frac{\sqrt{}}{Z_{\mathrm{gm}}}.& \left(1^{}\right)\end{array}$
As disclosed above, I is the current output by the transconductance amplifier 230, and Z.sub.gm is the resistance corresponding to the transconductance gm. In view of EQ. 1, the transconductance gm of the transconductance amplifier 230 can be expressed in terms of the resistance Z.sub.gm, in the following manner:

(21) $\begin{array}{cc}{g}_{m\left(M_1,M_2\right)}=.Math.\sqrt{I}=\frac{k}{Z_{\mathrm{gm}}}.& \left(2\right)\end{array}$
Here, and k are constant numbers. In view of EQ. 2, the gain of the transconductance amplifier 230 can be expressed in the following manner:

(22) $\begin{array}{cc}\mathrm{Gain}=g_m.Math.Z_R=.Math.\frac{Z_R}{Z_{\mathrm{gm}}}.& \left(3\right)\end{array}$
Here, Z.sub.R is a load resistance and is a constant number. As the resistances Z.sub.R and Z.sub.gm are constant, the gain of the transconductance amplifier 230 is constant across PVT.

(23) Referring now to FIG. 1, the current signal I output by the first stage circuitry 120 at output ports (e,f) of the transconductance amplifier 130 is transported over the long trace 140 to the second stage circuitry 150. The transported current signal I is applied at the input ports (w, x) of the current-to-voltage converter 160. The current-to-voltage converter 160 is used to convert the transported current signal I to a voltage signal V.sub.02. The voltage signal V.sub.02 is output by the current-to-voltage converter 160 at its output ports (y,z).

(24) An example of the current-to-voltage converter 160 is shown in FIG. 4. The current-to-voltage converter 460 shown in FIG. 4 includes bipolar transistors M3, M4 and impedance elements Z.sub.L, Z.sub.R connected to the respective collectors of bipolar transistors M3, M4. In some implementations, the impedance elements Z.sub.L, Z.sub.R are resistors. In other implementations, in order to boost a bandwidth of the current-to-voltage converter 160, the impedance elements Z.sub.L, Z.sub.R include resistors and one or more inductors. Here, the bases of bipolar transistors M3, M4 are connected together to a common mode voltage V.sub.CM. Input ports (w,x) of the current-to-voltage converter 460 are connected to the emitters of bipolar transistors M3, M4, respectively, to receive a current signal I, which corresponds to the sensor signal V.sub.01 without at least its DC component. Output ports (y, z) of the current-to-voltage converter 460 are connected between the respective collectors of bipolar transistors M3, M4 and the respective impedance elements Z.sub.L, Z.sub.R, to output the voltage signal V.sub.02.

(25) Referring again to FIG. 1, the voltage signal V.sub.02 output by the second stage circuitry 150 is delivered to a gain stage that includes amplifier 170. Note that, for circuits illustrated in FIGS. 1-4, the voltage signal V.sub.02 is a high-pass filtered version of the sensor signal V.sub.01, in accordance with a transfer function calculated below.

(26) $\begin{array}{cc}\frac{V_{02}}{V_{01}}=\frac{S{}_0}{1+S{}_0}\frac{1}{1+S{}_3}{g}_{M1}{Z}_L,& \left(4\right)\end{array}$
where

(27) ${}_0=R_{\mathrm{HP}}{C}_{\mathrm{HP}},\mathrm{and}{}_3=\frac{C_P}{g_{M3}}.$
Here, g.sub.M3 is the transconductance g.sub.M of bipolar transistor M3 shown in FIG. 4, g.sub.m1 is the transconductance g.sub.M of FET M1 shown in FIG. 2. Also, the low corner frequency,

(28) $f_{3dB}=\frac{1}{2{}_3},$
of the preamplifier system 100 is smaller than the low corner frequency of a conventional voltage buffer-based preamplifier system by a ratio of the transconductance g.sub.M3 and a transconductance of the input FET of the conventional voltage buffer-based preamplifier system.

(29) The technologies described above in connection with FIGS. 1-4 can result in one or more of the potential advantages presented below. The combination of transconductance amplifier 130 and current-to-voltage converter 160 causes the bandwidth of the preamplifier system 100 to be larger than the bandwidth of a conventional voltage buffer-based preamplifier system, as discussed above in connection with EQ. 4. This is accomplished because the disclosed combination enables (i) lossless transmission of a high-pass filtered current signal over a 100 s- 1000 s of microns long trace, followed by (ii) low input impedance conversion of the transmitted high-pass filtered current signal to a high-pass filtered voltage signal prior to delivery of the high-pass filtered voltage signal to a subsequent gain stage. In contrast, a conventional voltage buffer-based preamplifier system, causes lossy transmission of a high-pass filtered voltage signal over the foregoing trace, prior to delivery of a much attenuated transmitted high-pass filtered voltage signal to a subsequent gain stage.

(30) The current established through FETs M1, M2 of the transconductance amplifier 130 is reused by the bipolar transistors M3, M4 of the current-to-voltage converter 160, which causes high power efficiency of the preamplifier system 100, as no additional current sources are needed.

(31) In contrast to having to carefully control a common mode voltage V.sub.CBM of a high-pass filter of a conventional voltage buffer-based preamplifier system, the common mode voltage V.sub.CM used for the current-to-voltage converter 160/460 is readily set/controlled, in some embodiments. That is so, as the exact common mode voltage V.sub.CM is not critical, because any bias voltage V.sub.CM applied to bases of bipolar transistors M3, M4, that satisfies V.sub.CM=V.sub.base<V.sub.collector, will keep the bipolar transistors M3, M4 functioning properly. Of course, V.sub.CM=V.sub.base should not be set so low as to not leave the bipolar transistors M3, M4 some headroom.

(32) Further, a gain of the transconductance amplifier 130/230 is readily programmed by tuning a tail current I.sub.tail using tracking circuitry 280/380, in some embodiments, as shown in FIGS. 2-3. This is suitably configured as gain trimming part for the whole preamplifier system 100.

(33) Furthermore, large size and value feedforward capacitors typically used as part of a conventional voltage buffer-based preamplifier system are omitted from the preamplifier system 100. In this manner, the susceptible peaking frequency for bandwidth boosting is avoided.

(34) Moreover, the technologies described above in connection with FIGS. 1-4 suitably are used to fabricate pre-amplifier systems to pre-amplify multiple sensor signals, e.g., as part of a multi-head hard drive system.

(35) FIG. 5A shows a first implementation of a pre-amplifier system 500A fabricated on a first single IC chip 502A, and FIG. 5B shows a second implementation of a pre-amplifier system 500B fabricated on a second single IC chip 502B. While illustrated as being a single IC chip 502A, 502B, it is noted that, in some embodiments, electronic components on either terminal of traces 140(a), 140(z) are disposed on separate IC chips that, depending on implementation, may or may not be co-located in the same IC package unit. In these examples, the pre-amplifier system 500A or 500B is configured to (i) form two or more sensor signals V.sub.01(a), . . . , V.sub.01(z), e.g., 2, 4, 8 or other even integer number of sensor signals, using respective two or more amplifiers 110a, . . . , 110(z); (ii) high-pass filter and transform the sensor signals V.sub.01(a), . . . , V.sub.01(z) to respective current signals I(a), I(z), using respective first stage circuitry 120(a), . . . , 120(z), like the first stage circuitry 120 described above in connection with FIG. 1, and the first stage circuitry 220 described above in connection with FIG. 2; and (iii) transmit the respective current signals I(a), . . . , I(z) towards a gain stage 510, (which includes, e.g., amplifier 170), through respective traces 140(a), . . . , 140(z) (e.g., respective differential transmission lines). The have traces 140(a), . . . , 140(z) have respective parasitic capacitances C.sub.P(a), . . . , C.sub.P(z) because they have trace lengths in the range of 100 s to 100 s of microns. Moreover, at least some of the traces 140(a), . . . , 140(z) have different C.sub.P values from other traces, because of their different respective trace lengths, different conductivities or because they are routed through different layers of an integrated semiconductor circuit,

(36) In the example illustrated in FIG. 5A, the pre-amplifier system 500A is configured to (iv) convert the transmitted current signals I(a), . . . , I(z) to respective pre-amplified voltage signals V.sub.02(a), . . . , V.sub.02(z), using respective second stage circuitry 150(a), . . . , 150(z), life the second stage circuitry 150 described above in connection with FIGS. 1 and 4. Here, each of the second stage circuitry 150(a), . . . , 150(z) includes a current-to-voltage converter 160/460 as described above in connection with FIGS. 1 and 4. Subsequently, the pre-amplified voltage signals V.sub.02(a), . . . , V.sub.02(z) are input to a single amplifier 170. In some implementations, the pre-amplified voltage signals V.sub.02(a), . . . , V.sub.02(z) are input to the single amplifier 170 using a voltage signal multiplexer 520. The voltage signal multiplexer 520 is a multiplexer configured to multiplex two or more voltage signals V.sub.02(a), . . . , V.sub.02(z) and to provide a multiplexed voltage signal {V.sub.02(a), . . . , V.sub.02(z)}.

(37) In the example illustrated in FIG. 5B, the pre-amplifier system 500B is configured to deliver the transmitted current signals I(a), . . . , I(z) to a single second stage circuitry 150, like the second stage circuitry 150 described above in connection with FIGS. 1 and 4. Here, the transmitted current signals 1(a), . . . , I(z) are provided to the single second stage circuitry 150 using a current signal multiplexer 530. The current signal multiplexer 530 is a multiplexer configured to multiplex two or more current signals I(a), . . . , I(z) and to provide a multiplexed current signal {I(a), . . . , I(z)}. Further in this example, the pre-amplifier system 500B is configured to (iv) convert the multiplexed current signal {I(a), . . . , I(z)} to a multiplexed pre-amplified voltage signal {V.sub.02(a), . . . , V.sub.02(z)} prior to inputting the multiplexed pre-amplified voltage signal to a single amplifier 170.

(38) In both of the examples illustrated in FIGS. 5A-5B, amplifier 170 amplifies the multiplexed pre-amplified voltage signal {V.sub.02(a), . . . , V.sub.02(z)} and issues an amplified multiplexed signal {V.sub.0(a), . . . , V.sub.0(z)}. Note that in both pre-amplifier system 500A and 500B the different current signals I(a), . . . , I(z) are transmitted over respective differential transmission lines 140(a), . . . , 140(z) that can have significantly different lengths compared to each other, because current transmission is substantially lossless, as explained above in connection with FIG. 1. In contrast, the amplifier 170 is disposed adjacent to the second stage(s) 150 (150(a), . . . , 150(z)), that includes the current to voltage converter(s) 160 (160(a), . . . , 160(z)), so the pre-amplified multiplexed voltage signal {V.sub.02(a), . . . , V.sub.02(z)} is provided to the amplifier 170 with minimal losses, e.g., over a single short length differential transmission line. In addition, each element of the pre-amplified multiplexed voltage signal {V.sub.02(a), . . . , V.sub.02(z)} is subject to the same transmission losses as it is transmitted from the second stage(s) 150 (150(a), . . . , 150(z)) over the same differential transmission line to the amplifier 170.

(39) A few implementations have been described in detail above, and various modifications are possible. While this specification contains many specifics, these should not be construed as limitations on the scope of what may be claimed, but rather as descriptions of features that may be specific to particular implementations. Certain features that are described in this specification in the context of separate implementations can also be configured in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be configured in multiple implementations separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.

(40) Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Moreover, the separation of various system ponents in the implementations described above should not be understood as requiring such separation in all implementations.

(41) Other implementations fall within the scope of the following claims.