CURRENT INTERRUPTION ARRANGEMENT, BATTERY SYSTEM, CONTROLLER AND METHOD FOR INTERRUPTING A CURRENT FLOW BETWEEN A BATTERY AND A LOAD OF THE BATTERY

Abstract

A current interruption arrangement for a battery system. The current interruption arrangement includes at least one current interruption unit for interrupting an electrical current flow between a battery of the battery system and a load of the battery. The current interruption unit has at least one power semiconductor for interrupting and establishing the current flow between the battery and the load of the battery, and at least one surge arrester connected in parallel with the power semiconductor.

Claims

1. A current interruption arrangement (1a; 1b; 1c) for a battery system (100a; 100b; 100c) comprising: at least one current interruption unit (10) for interrupting an electrical current flow between a battery (70) of the battery system (100a; 100b; 100c) and a load (200) of the battery (70), the current interruption unit (10) having at least one power semiconductor (11, 12) for interrupting and establishing the current flow between the battery (70) and the load (200) of the battery (70), and at least one surge arrester (30) connected in parallel with the power semiconductor (11, 12).

2. The current interruption arrangement (1a; 1b; 1c) according to claim 1, wherein the at least one power semiconductor (11, 12) has a dielectric strength greater than a breakdown voltage of the at least one surge arrester (30).

3. The current interruption arrangement (1c) according to claim 1, wherein at least one resistor (40) is connected in series with the at least one surge arrester (30).

4. The current interruption arrangement (1a; 1b; 1c) according to claim 1, wherein the at least one power semiconductor (11, 12) is a bipolar transistor with an insulated gate electrode (IGBT).

5. The current interruption arrangement (1a; 1b; 1c) according to claim 1, wherein the at least one power semiconductor (11, 12) is a power metal oxide semiconductor field-effect transistor (MOSFET).

6. The current interruption arrangement (1b; 1c) according to claim 1, wherein the current interruption unit (10) has a plurality of power semiconductors (11, 12) for interrupting and establishing the current flow between the battery (70) and the load (200), and the plurality of power semiconductors (11, 12) are connected in series.

7. A battery system (100a; 100b; 100c), having a current interruption arrangement (1a; 1b; 1c) according to claim 1.

8. The battery system (100a; 100b; 100c) according to claim 7, wherein the battery is a motor vehicle battery.

9. The battery system (100a; 100b; 100c), according to claim 7, further comprising a controller (50), the controller (50) configured to divide the thermal energy, produced between the at least one power semiconductor (11, 12) and the at least one surge arrester (30) when interrupting the current flow, between the at least one power semiconductor (11, 12) and the at least one surge arrester (30).

10. A method for interrupting an electrical current flow between a battery (70) and a load (200) by a current interruption arrangement (1a; 1b; 1c) according to claim 1, wherein thermal energy produced between the at least one power semiconductor (11, 12) and the at least one surge arrester (30) when interrupting the current flow is divided between the at least one power semiconductor (11, 12) and the at least one surge arrester (30).

11. The method according to claim 10, wherein the at least one power semiconductor (11, 12) for interrupting the current flow is at least occasionally completely turned off and is at least occasionally operated in an active clamping mode.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Further measures which improve the invention emerge from the following description of some exemplary embodiments of the invention which are schematically illustrated in the figures. All features and/or advantages, including design details and spatial arrangements, which emerge from the claims, the description or the drawing can be essential to the invention both per se and in the various combinations.

[0025] In the drawings:

[0026] FIG. 1 schematically shows a battery system according to an embodiment known in the prior art,

[0027] FIG. 2 schematically shows a battery system having a current interruption arrangement according to a first embodiment of the present invention,

[0028] FIG. 3 schematically shows a battery system having a current interruption arrangement according to a second embodiment of the present invention,

[0029] FIG. 4 schematically shows a battery system having a current interruption arrangement according to a third embodiment of the present invention, and

[0030] FIG. 5 schematically shows a graph for illustrating a current profile over time.

DETAILED DESCRIPTION

[0031] Elements having the same function and method of operation are each provided with the same reference symbol in FIGS. 1 to 5.

[0032] FIG. 1 illustrates a battery system 100 known in the prior art. The battery system 100 has a battery 70 and a load 200 of the battery 70. A current flow between the battery 70 and the load 200 can be interrupted or restored by means of a first contactor 10 and a second contactor 20. A safety fuse 60 is arranged in a main current path upstream of the first contactor 10, that is to say between the first contactor 10 and a positive pole of the battery 70.

[0033] FIG. 2 shows a battery system 100a having a current interruption arrangement 1a according to a first embodiment of the present invention. The current interruption arrangement 1a illustrated in FIG. 2 has a first current interruption unit 10 and a second current interruption unit 20. The two current interruption units 10, 20 are designed to interrupt an electrical current flow between a battery 70 of the battery system 100a and a load 200 of the battery 70. The first current interruption unit 10 also has a first power semiconductor 11 in the form of an IGBT. The second current interruption unit 20 has a third power semiconductor 21 in the form of an IGBT and a fourth power semiconductor 22 in the form of an IGBT. The power semiconductors 11, 21, 22 are each designed to interrupt and establish the current flow between the battery 70 and the load 200 of the battery 70. The current interruption arrangement 1a also has a surge arrester 30 which is connected in parallel with the first power semiconductor 11. In this case, the first power semiconductor 11 has a dielectric strength which is greater than the breakdown voltage of the surge arrester 30. FIG. 2 also illustrates a controller 50 which is configured to control and/or regulate the battery system 100a.

[0034] FIG. 3 shows a battery system 100b having a current interruption arrangement 1b according to a second embodiment of the present invention. The current interruption arrangement 1b illustrated in FIG. 3 has a first current interruption unit 10 and a second current interruption unit 20. The two current interruption units 10, 20 are designed to interrupt an electrical current flow between a battery 70 of the battery system 100b and a load 200 of the battery 70. The first current interruption unit 10 also has a first power semiconductor 11 in the form of an IGBT and a second power semiconductor 12 which is in the form of an IGBT and is connected in series with the first power semiconductor 11. The second current interruption unit 20 has a third power semiconductor 21 in the form of an IGBT and a fourth power semiconductor 22 in the form of an IGBT. The power semiconductors 11, 12, 21, 22 are each designed to interrupt and establish the current flow between the battery 70 and the load 200 of the battery 70. The current interruption arrangement 1b also has a surge arrester 30 which is connected in parallel with the first power semiconductor 11 and the second power semiconductor 12. The first power semiconductor 11 and the second power semiconductor 12 each have a dielectric strength which is greater than the breakdown voltage of the surge arrester 30. FIG. 3 also illustrates a controller 50 which is configured to control and/or regulate the battery system 100b.

[0035] FIG. 4 shows a battery system 100c having a current interruption arrangement 1c according to a third embodiment of the present invention. The current interruption arrangement 1c illustrated in FIG. 4 has a first current interruption unit 10 and a second current interruption unit 20. The two current interruption units 10, 20 are designed to interrupt an electrical current flow between a battery 70 of the battery system 100c and a load 200 of the battery 70. The first current interruption unit 10 also has a first power semiconductor 11 in the form of an IGBT and a second power semiconductor 12 which is in the form of an IGBT and is connected in series with the first power semiconductor 11. The second current interruption unit 20 has a third power semiconductor 21 in the form of an IGBT and a fourth power semiconductor 22 in the form of an IGBT. The power semiconductors 11, 12, 21, 22 are each designed to interrupt and establish the current flow between the battery 70 and the load 200 of the battery 70. The current interruption arrangement 1b also has a surge arrester 30 which is connected in parallel with the first power semiconductor 11 and the second power semiconductor 12. According to the embodiment illustrated in FIG. 4, a resistor 40 is also connected in series with the surge arrester 30. The first power semiconductor 11 and the second power semiconductor 12 each have a dielectric strength which is greater than the breakdown voltage of the surge arrester 30. FIG. 4 also illustrates a controller 50 which is configured to control and/or regulate the battery system 100c.

[0036] In the case of a method according to the invention for interrupting an electrical current flow between a battery 70 and a load 200 of the battery by means of one of the current interruption arrangements 1a, 1b, 1c illustrated, thermal energy produced in this case between the at least one power semiconductor 11, 12 and the surge arrester 30 when interrupting the current flow is divided between the at least one power semiconductor 11, 12 and the at least one surge arrester 30. In order to interrupt the current flow, the at least one power semiconductor 11, 12 is occasionally completely turned off and is occasionally operated in an active clamping mode.

[0037] FIG. 5 shows a graph for illustrating a current profile over time when carrying out the method according to the invention. To be exact, FIG. 5 shows an overvoltage reduction U1 at a current interruption unit according to the invention in comparison with an overvoltage reduction U2 at a current interruption unit conventional in the prior art. As can clearly be seen in FIG. 5, an overvoltage can be reduced considerably more rapidly by the current interruption unit according to the invention, thus also producing a considerably smaller current rise.

[0038] The controller 50 illustrated in the figures is configured to carry out the method and is connected to the battery system 100 and/or the current interruption arrangement 1a; 1b; 1c via cables and/or in a wireless manner. In addition to the embodiments illustrated, the invention allows further design principles. The IGBTs illustrated in the figures may thus also be replaced with power MOSFETs, silicon carbide semiconductors, gallium nitride semiconductors or other power semiconductors.