Distributed current balancing control

Abstract

A power converter for providing power to one or more loads, wherein the power converter is configured to be arranged in a parallel configuration with one or more additional power converters. The power converter comprises an inverter for receiving an input voltage and converting this to an output voltage having an associated output current, a module configured to modulate the output voltage using a modulation scheme and first and second feedback circuits.

Claims

1. A system for controlling one or more motors, the system comprising a plurality of power converters, each power converter for providing power to the one or more motors, wherein the power converters are configured in a parallel configuration with each other and each power converters comprises: an inverter for receiving an input voltage and converting this to an output voltage having an associated output current; a module configured to modulate the output voltage using a modulation scheme; a first feedback circuit configured to configured to generate a first signal, wherein the first signal corresponds to a summation of a first reference signal and a first measurement/calculation of the output current scaled by a first gain, wherein the first gain is set so as to reduce circulating currents between the power converter and one or more additional power converters in the parallel configuration due to imbalance of positive and/or negative sequence currents; and a second feedback circuit configured to compare a second reference signal and a second measurement/calculation of the output current to produce an error value, wherein the error value is scaled by a second gain to produce a second signal, wherein the second gain is set so as to reduce circulating currents between the power converter and one or more additional power converters in the parallel configuration due to the imbalance of zero sequence currents, wherein the modulation module is configured to receive the first signal and the second signal and adjust the modulation based on the first signal and the second signal so as to reduce circulating currents as aforesaid, wherein the plurality of power converters are configured to control the one or more motors, wherein the first and second feedback circuits of each power converter are configured as aforesaid so as to reduce circulating currents between the power converters.

2. The system as claimed in claim 1, wherein the input voltage is a DC input voltage and the output voltage is a three-phase output voltage.

3. The system as claimed in claim 1, wherein the modulation scheme includes pulse width modulation, and the first reference signal used in the first feedback circuit is a setpoint for use in the pulse width modulation.

4. The system as claimed in claim 1, wherein the first gain is set such that, for a range of values of the output current, a value of the first gain is chosen that reduces circulating currents between the power converter and one or more additional power converters in the parallel configuration due to imbalance of positive and/or negative sequence currents.

5. The system as claimed in claim 4, wherein the first gain is preset or otherwise predetermined as part of a calibration or pre-processing routine.

6. The system as claimed in claim 5, wherein the gain is preset or predetermined using frequency response analysis.

7. The system as claimed in claim 1, wherein the error value corresponds to a difference between the second reference signal and the second measurement/calculation of the output current.

8. The system as claimed in claim 1, wherein the modulation scheme uses space vector modulation, and the modulation module comprises a processor or circuitry configured to modify one or more vectors used in the space vector modulation based on the second signal.

9. The system as claimed in claim 8, wherein the processor or circuitry of the modulation module is configured to adjust a length or duration of one or more vectors based on the second signal.

10. The system as claimed in claim 9, wherein the processor or circuitry of the modulation module is configured to drive a modulation signal based on a zero state vector, which modulation signal is used to adjust the length or duration of the zero state vector by the processor or circuitry as aforesaid.

11. The system as claimed in claim 1, wherein the modulation module is configured to adjust a modulation duty cycle based on the first signal and/or the second signal so as to reduce circulating currents as aforesaid.

12. The system as claimed in claim 1, wherein the modulation module is configured to adjust a length or duration of one or more vectors of a space vector modulation scheme based on the first signal and/or the second signal to so as to reduce circulating currents as aforesaid.

13. The system as claimed in claim 1, further comprising a structure configured to receive and hold multiple power converters, wherein the structure is configured to interconnect the power converters held and received within the structure such that a variable number of power converters may be interconnected using the structure as desired.

14. The system as claimed in claim 13, wherein the structure is configured such that a single power converter can be connected thereto for providing power to the one or more motors in a standalone configuration, as well as up to N power converters connected thereto for providing power to one or more motors in a parallel configuration, wherein N is an integer greater than 1.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Various embodiments will now be described, by way of example only, and with reference to the accompanying drawings in which:

(2) FIG. 1 illustrates some examples of power converter (in this case motor drive) systems and how they might be connected to loads;

(3) FIG. 2 shows a dual motor drive system with a single load (in this case a motor) powered by two motor drives;

(4) FIG. 3 shows a power converter, which in this case is a motor drive, according to various embodiments;

(5) FIG. 4 shows an embodiment of the present disclosure that is similar to that of FIG. 3, in which like components are indicated with like reference numerals, but wherein a reference signal is provided in the form of a global voltage setpoint;

(6) FIG. 5 shows results of a simulation to illustrate the effects of implementing the first and second feedback circuits described herein; and

(7) FIGS. 6A and 6B show an example set of experimental results demonstrating the effects of implementing the first and second feedback circuits described herein.

DETAILED DESCRIPTION

(8) Herewith will be described various embodiments of a distributed system (or electronic control architecture) for controlling one or more loads. The system comprises a plurality of power converters, which could be referred to as motor drives (e.g., where the one or more loads comprise one or more motors). The power converters may be used to power (e.g., control or actuate) the one or more loads. The power converters may be arranged in a parallel configuration and could be configured to power (e.g., control or actuate) a single load, or a plurality of loads. In the latter case the output of the power converters could be connected to the loads via a switch that is configured to electrically connect each load with a selected one or more of the plurality of power converters. The power converters could be located on an aircraft and may be configured to power (e.g., control or actuate) one or more aircraft components such as a thrust reverser or landing gear actuator. The components may not require power at the same time or concurrently.

(9) An architecture/system for controlling/actuating one or more loads is disclosed in accordance with various embodiments, wherein the architecture/system comprises a plurality of power converters (e.g., motor drives) that are operatively connected to one or more loads. The power converters may be configured to control (e.g., power, actuate or otherwise move) the one or more loads. The loads may be or comprise an actuator and/or motor, although the disclosure is not limited as such and the loads could be any suitable load that can be powered by a plurality of power converters. The various components of the architecture, including the power converters (e.g., motor drives), loads and actuators, may be electronically controlled.

(10) The power converters may be connected in a parallel configuration, such that a plurality of power converters may be used to actuate the same load. In this manner, a plurality of power converters may be provided that are used to actuate a single load (see, e.g., FIG. 2), or a plurality of power converters may be provided that are configured to actuate multiple loads. In the latter case, a switch may be configured to select the power converter(s) from the plurality of power converters and operatively connect the selected power converters to each respective load. The switch may be configured so that only one load is being driven by the plurality of power converters (e.g., a selected one or a subset thereof) at a particular time. The plurality of power converters may be powered by the same power supply and each may include an inverter.

(11) The plurality of power converters (e.g., motor drives) typically need some sort of common or centralised operation (e.g., control), for example to synchronise their operation. The central control may be configured to control, for example, which power converter(s) are to be used (e.g., selected as discussed above) to power a given load or loads at a particular time. The control may achieve this by switching between the power converters (e.g., the inverters thereof), for example powering the load or loads using only a selected one or subset of the power converters at a given time. In various embodiments a modulation technique may be used to do this, for example using the modulation module described herein.

(12) As noted above it is desired to reduce reliance on the central control as much as possible, and the present disclosure aims at improving the current balancing between power converters (e.g., the inventers thereof).

(13) As discussed above, power converters connected in parallel may be subject to current balancing issues. This can be as a consequence of practical operating conditions and in particular circulating currents. Depending on the control architecture used in connection with the power converters, the power converters may receive the same signals from the central control, such as a duty cycle reference, and subsequently should generate the same modulation waveforms.

(14) Despite this the total current may not be evenly shared across the inverters of the power converters, for example due to differences in the propagation time of gate driver circuits, in impedance of the magnetic components, or in the conduction voltage drop of inverter switches. These differences may be caused by unequal operating temperature of the inverters, or tolerances of the components. This will, in turn, result in circulating current flows, leading to a reduction in the total useful current being supplied to the load(s). This has a negative impact on the system as a whole.

(15) The power converters may be controlled centrally using a modulation module, for example using pulse width modulation (“PWM”) and in particular space vector modulation (“SVM”), wherein each power converter includes a modulation module configured to control the timing/synchronisation of the power converters (e.g., motor drives), for example a switching frequency thereof.

(16) FIG. 3 shows a circuit diagram indicating a power converter, which in this case is a motor drive 100, according to various embodiments. As will be appreciated, a control architecture/system in accordance with the disclosure may include a plurality of power converters (e.g., motor drives 100), all of which may have the same or similar features as indicated in FIG. 3. That is, the power converter of FIG. 3 (and those of the present disclosure) may be included as part of the wider control architecture/system. The technology disclosed herein acts to improve current sharing, but it will be appreciated that control elements or modules of the wider control architecture/system will be configured to regulate total load current, manage parallel operation, etc.

(17) It will be appreciated that references to motor drives in accordance with various embodiments could refer to any type of power converter, and the broadest aspects of the present disclosure are not intended to be limited to using motor drives, or providing a load in the form of a motor.

(18) It is envisaged that the power converters (e.g., motor drives) described herein could comprise additional control circuitry, such as current or speed control loops. However, these are not considered essential to the concepts achieved by the presently disclosed technology. For example, various control schemes could be used, including one or more of speed control, current control, etc. so long as a current balancing architecture is provided as described herein.

(19) In this regard, the control architecture/system can be said to be applicable to any suitable scheme known in the art that facilitates the implementation of a plurality of power converters in a parallel configuration. In other words, the present disclosure is not limited to a particular type of parallel architecture.

(20) For example, the technology disclosed herein is not dependent on local controllers (e.g., circuitry) for the power converter to regulate output current or machine speed. That is, the technical effects of the disclosure are not dependent on control circuitry outside of the first and second feedback circuits described below. A reference signal may be received (generated locally or globally) which is used then as an initial “reference signal” for the modulation, for example to be summed with the various other signals, as described in more detail below. The motor drive 100 of FIG. 3 includes an inverter 110 and may comprise output inductors 120. As with a typical arrangement (such as shown in FIG. 2 above) the motor drive 100 may receive DC power via input terminals 50. This may then be converted by the inverter 110 into an output voltage (e.g., three-phase AC voltage) for actuating one or more loads, e.g., via inductors 120 and output terminals 60.

(21) Generally, a modulation (e.g., PWM/SVM) module 130 is configured to generate appropriate signals (e.g., logic and/or switching signals) for the inverter 110 of the motor drive 100 (e.g., gate drivers 135 thereof) to provide a controlled commutation of the output voltages of the power converters (e.g., motor drives 100). The modulation module 130 may be configured to send suitable such signals to the inverter 110 that control the timings associated with the respective motor drive 100 (e.g., the output voltages thereof) in use. The signals may include various modulation control signals, such as a modulation duty cycle, and may be based on one or more voltage reference signals.

(22) The modulation module 130 may receive a first reference signal S (e.g., voltage reference) that is the summation of a reference value i.sub.ref and a measured current i.sub.d-q. In accordance with the disclosure, the measured current i.sub.d-q is scaled by a gain R. This technique is referred to herein as a ‘virtual resistance’. That is, and as will described in more detail below, using this arrangement, the behaviour of a series resistor is emulated inside the motor drive 100.

(23) Generation of the switching signals for the inverter 110 via the modulation (e.g., SVM) module 130 is facilitated by the use of the resulting voltage reference signal S. It will be appreciated that a standard or conventional modulation could typically use a current or voltage reference directly, that is without being scaled by a gain as disclosed herein.

(24) A second reference signal, referred to herein as K.sub.0, is also used by the modulation (e.g., SVM) module 130, wherein the second signal K.sub.0 is based on a measurement/calculation of zero sequence current to adjust the modulation further. The signal K.sub.0 is a summation of a reference current (which can be a reference current i.sub.ref) and a measurement or calculation of zero sequence current i.sub.0, as will be discussed in more detail below. The reference current (i.sub.ref) can be set to be equal to zero Amps (i.sub.ref=0 A), since we wish to regulate the zero sequence current (using the control scheme) to be zero.

(25) Therefore, the modulation/commutation signals sent to each inverter 110 by the respective modulation module 130 may be adapted based on the first and second signals S, K.sub.0. These adaptations of the commutation signals may effectively address the problems described above by forming active current balancing solutions. In particular, the two main approaches (i.e., using the first and second signals S, k.sub.0) have been found to address these issues and will be described in more detail below.

(26) The first approach is provision of a first feedback circuit (e.g., forming a first compensation loop within the motor drive 100) aimed at dealing with (e.g., reducing) the positive and negative circulating currents. This is through what may be referred to as a “virtual resistor” 140, by which it is meant components or circuitry configured to emulate a series resistor within the motor drive 100. The resistance value of the virtual resistor 140 can be referred to as a gain (IL) and can be preset based on the response of the system to positive and negative circulating currents.

(27) More specifically, the current values of the three phases (i.e., the instantaneous inverter 110 output currents) are measured and/or determined. Suitable components or circuitry 70 may be configured to determine the output currents. See, for example, Venkataramanan, “Parallel Operation of Voltage Source Inverters with Minimal Intermodule Reactors”, in proc. of IEEE Industry Applications Conference, 2004, which is incorporated by reference herein in its entirety. The output currents (e.g., phase currents) could be measured and/or determined using a current sensor, although any suitable technique could be used, with optionally a current sensor provided for each of the three phases.

(28) The positive and negative sequence currents are an inherent property of the output currents of the motor drive 100 (and other motor drives in the distributed system), and can be represented using a simplified circuit representation, from which it is possible to derive transfer functions to analyse the impact of the gain R.sub.v variation on the distributed system. That is, the distributed system 100 may use a synchronous reference frame (also called “d-q control”). Using such a control mechanism, the voltage and current can be converted into a reference frame that rotates synchronously with a voltage vector (e.g., by Park Transformation) so that three-phase time-varying signals are transformed into DC signals. While it may be useful to implement the power converter (e.g., motor drive) control in a synchronous reference frame (e.g., d-q domain), the first feedback circuit may be implemented using synchronous or stationary reference frames.

(29) The positive and negative sequence currents may be measured and/or determined, e.g., as described above, and multiplied or scaled by a resistance value or gain R.sub.v (i.e., of the virtual resistor 140), and then summed with a reference value i.sub.ref to provide a modulation signal S that is configured to balance the output currents of each motor drive 100 across the parallel architecture (i.e., substantially reduce any differences in the output currents between the motor drives).

(30) The resistance value or gain R.sub.v of the virtual resistor 140 could be calculated, for example, using frequency response analysis such as via Bode plot analysis so as to provide useful values of R.sub.v to be applied to the measured current values i.sub.thq. The resistance value or gain R.sub.v could be set prior to operation (e.g., preset or otherwise predetermined) or as part of a calibration or pre-processing routine. Any suitable type of analysis could be used to set the value, for example state space analysis, circuit analysis. Within frequency response analysis, a Bode plot may be used to determine the gain, but other methods could be used such as a Nyquist plot, Nichols plot, etc.

(31) Parallel operation of the various motor drives 100 of the distributed system could be controlled using a reference value, e.g., in the form of a current setpoint i.sub.ref, which may be generated locally to the motor drive as shown in FIG. 3 (whilst being common across the motor drives), or received from a central controller (e.g., processor or circuitry) as shown in FIG. 4. This means that the techniques of the present disclosure could be used to provide a decentralised or local current balancing for each motor, with a shared control reference, e.g., in the form of a current setpoint i.sub.ref. As discussed with reference to FIG. 4, the control reference could be provided in the form of a voltage (V.sub.global).

(32) Generally, the reference value may be a voltage setpoint which can be generated via a local control loop (e.g., FIG. 3) or from a global controller (e.g., FIG. 4), which reference value is modified within each motor drive using the first feedback circuit. The modification by each first feedback circuit may be configured to adjust the modulation of the output currents so that they are balanced across the parallel architecture.

(33) That is, by emulating the same resistor in each of the motor drive inverters 110 of the distributed system, differences in the positive and negative sequence currents due to circuit impedances can be alleviated. This occurs even if the virtual impedances are not exactly equal due to the tolerance of the current sensors, for example. The behaviour of the distributed system, in this regard, is intuitive. That is, if a first motor drive tends to provide more current than a second motor drive, the system will adapt the modulation to balance this out, for example by adapting (e.g., reducing) the duty cycle of the first motor drive so that the current output by both the first and second motor drives balances. In other words, the modulation (e.g., duty cycle) may be automatically adapted based on the differences in the positive and negative sequence currents.

(34) In this manner, a first feedback or compensation loop may be formed in each motor drive 100 of the distributed system, which first feedback loop is configured to alleviate differences between the motor drives 100, for example due to differences in circuit impedance, component tolerance, sensor tolerance, etc.

(35) The second approach is made up of a second feedback circuit (e.g., forming a second compensation loop) aimed at compensating for (e.g., reducing) zero sequence circulating currents. This consists in using the current values of the three phases (i.e., the instantaneous inverter 110 output currents referred to above) to measure and/or determine zero sequence local currents and adjust the modulation accordingly so as to balance zero sequence currents between the power converters in the architecture.

(36) For example, in SVM the length (i.e., duration in time) of a zero state vector could be adjusted or modulated based on a second signal k.sub.0, which corresponds to the measured zero sequence current i.sub.0 scaled by a gain R.sub.i0. As is known in the art, a zero-state vector is one of the operating states of SVM. A controller or compensator may be configured to drive the signal k.sub.0, which is received and used by the modulation module 130 to adjust or modulate the duration of the zero state vector in SVM.

(37) The controller or compensator may be referred to as ‘closed loop’, meaning that it is configured to measure the state in the system being regulated (i.e., in this case the zero sequence current i.sub.0). The zero sequence current i.sub.0 is compared to a reference (e.g., reference current i.sub.ref), and then an error is generated corresponding to the difference between the zero sequence current and the reference. This error is then scaled by a control gain R.sub.i0 to form the signal k.sub.0, which is subsequently used by the modulation module 130 to adjust the modulation so that the zero sequence current i.sub.0 is minimised.

(38) Similar techniques are reported in “Control of Circulating Current in Two Parallel Three-Phase Boost Rectifiers” to Zhihong Ye, et al. (IEEE Transactions on Power Electronics, Vol. 17, No. 5, pp. 609-615, September 2002), which is incorporated herein by reference in its entirety.

(39) As noted elsewhere herein, there are different mechanisms that cause zero sequence circulating current. In the embodiment shown in FIG. 3, the gate drivers 135 comprise circuitry, for example there may be an electrical connection (e.g., a cable) interconnecting between the module 130 and the inverter 110 to transmit the modulation signals from the module 130 to the inverter 110. Since these are non-ideal systems, there may be propagation delays, or the gate driver 135 circuitry may have slight differences in the electronics within it. This means, for example, if control signals acting on a first switch in a first motor drive and a first (i.e., equivalent) switch in a second motor drive switch on at the same time, there might be a slight timing difference. This is a mechanism for zero sequence current generation, which would be reduced by the second feedback circuit.

(40) FIG. 4 shows an embodiment of the present disclosure that is similar to that of FIG. 3, in which like components are indicated with like reference numerals, but wherein a (control) reference signal is provided in the form of a global voltage setpoint v.sub.global. This is summed with the signal output from the virtual resistor, rather than the current setpoint i.sub.ref d-q of the embodiment of FIG. 3. For the purposes of the present disclosure, either a current or voltage setpoint could be used to provide the reference signal for the first feedback circuit.

(41) Generally, using the combination of the first and second feedback circuits results in an improved current balancing of the system. The first feedback circuit (“virtual resistor”) is aimed at dealing with (e.g., balancing/reducing) positive and negative sequence currents, whilst the second feedback circuit deals with (e.g., balances/reduces) zero sequence currents. The combination of both feedback circuits contributes to the improvements in current sharing and compensating for the major sources of system imbalance. Using both improves the balancing of the currents that can circulate in the system (see FIG. 5).

(42) That is, the proposed technology combines these two methods in a distributed control architecture, where each element of the feedback circuits operates locally for each respective motor drive. Although the modulation module typically receives a reference, such as from a central controller (e.g., a current or voltage setpoint), the feedback circuits are not reliant on inter-module communications, or complex communications from a central location to help improve the current balancing between the parallel motor drives.

(43) It should be noted that the proposed architecture is scalable to N-paralleled inverters, where N=2, 3, 4 or more, without the need of modifying the control architecture (e.g., local circuitry) of each motor drive. That is, the feedback circuits are common to all motor drives in the control architecture. Moreover, the same architecture can be used for a motor drive operating in a stand-alone mode, and motor drives can be interchanged or scaled without any substantial modification to the central control.

(44) In this regard a structure may be provided and configured to receive and hold multiple power converters (e.g., motor drives 100) as described above, wherein the structure is configured to interconnect the power converters held and received within the structure such that a variable number of power converters may be interconnected using the structure as desired. The distributed architecture/system could include the structure, which could then be configured such that a single power converter can be connected thereto for providing power to one or more loads in a standalone configuration, as well as up to N power converters (and any integer in between) connected thereto for providing power to one or more loads in a parallel configuration. N is an integer greater than 1, and could be at least 3, 4, 5 or 10.

(45) It is important to note in the context of modular and reconfigurable systems, that the disclosed technology can facilitate operation in a stand-alone mode for a single power converter, or in a parallel configuration, and without significant reconfiguration of power converter control architecture. This is because the first and second feedback circuits are provided locally to each power converter.

(46) Embodiments of the proposed control scheme are illustrated in FIGS. 3 and 4, which illustrate two different structures of the overall parallel control configuration, based on either centralised global current or global voltage reference controls. Regardless of the system level parallel control architecture, the local circulating current balancing controls can be implemented in a common, distributed manner.

(47) FIG. 5 shows results of a simulation to illustrate the effects of implementing the first and second feedback circuits described above. In FIG. 5, the performance of two paralleled motor drives that are configured to drive a permanent magnet motor is shown.

(48) Differences in gate driver propagation time, inductor impedances, current sensor gains, and conduction voltage drop within the inverter semiconductors are modelled in order to create circulating currents, e.g., due to tolerances or temperature differences, to emulate real operating conditions.

(49) Initially, no balancing methods are used. At 75 ms, the zero sequence controller (i.e., second feedback circuit) is activated. At 150 ms, the virtual resistor (i.e., first feedback circuit) is activated. The parameters used in the simulation are as follows.

(50) AC inductance at the output of each inverter=70 μH±10%

(51) Current sensors tolerance=±5%

(52) 15 mΩ and 35 mΩ Rds-on SiC MOSFETs resistance on each inverter (devices assumed to operate at different temperatures).

(53) Dead time=500 ns±25 ns.

(54) Switching frequency=20 kHz; current loop sampling frequency=40 kHz.

(55) Current loop cross-over frequency and phase margin=800 Hz, PM=60 deg.

(56) Gain of zero sequence compensator=0.0024 V/V. Virtual resistor=1Ω

(57) Motor phase inductance and resistance=4.5 mH, 0.1Ω. Pole pairs=2.

(58) Motor back electromotive force constant=48 Vline-line peak/krpm.

(59) Machine speed=600 rpm. D-Q current set points are constant.

(60) The plotted signals are as follows: In the first plot, the phase “a” current through inverter “1”, inverter “2”, and the total machine current are shown, namely, i.sub.a1_true, i.sub.a2_true and i.sub.machine_a. This is the “true” current, meaning that the current sensor has no tolerance or error.

(61) In the second plot, the zero sequence current is shown.

(62) In the third plot, the measured d-q motor current signals captured locally by each inverter are shown. As is known in the art, d-q currents are representative of positive and negative sequence currents. In other words, they are different ways of representing the output current of the motor drive, and a convenient way of analysing the system.

(63) As can be seen in FIG. 5, the total motor current is sinusoidal and well regulated, but there is an imbalance in the current being provided by each inverter. This imbalance is reflected in zero sequence current and positive/negative sequence currents. The latter imbalance is reflected both in positive sequence (differences in the DC current level) and in the negative sequence (oscillations at two times the fundamental frequency).

(64) Once the zero sequence regulator (second feedback circuit) is activated after 75 ms, it can be seen from FIG. 5 that the zero sequence currents get tightly regulated to zero amperes. However, the imbalance in the positive and negative sequence currents remain and has not been affected by the zero sequence controller. The virtual resistor (first feedback circuit) is activated after 150 ms, and it can be seen that the currents provided by each inverter become well balanced due to the reduction (and in this ideal simulation, elimination) of the positive and negative sequence currents. This demonstrates the adequate operation of the feedback circuits presented herewith.

(65) Additional testing has been carried out to demonstrate the functionality of the technology described herein. An example set of experimental results demonstrating the operating and impact of the current balancing control scheme proposed by this disclosure is detailed below and shown in FIG. 6.

(66) Test Configuration:

(67) Current control, three motor drives in parallel

(68) Vdc=540V, w*=100 rad/s, DT=0.7 μs

(69) Lout=60 μH

(70) Parallel controls: Ri0=0.3, Rv=0.8Ω

(71) FIGS. 6A and 6B show the experimental results for three motor drives operating in parallel without (FIG. 6A) and with (FIG. 6B) the current balancing feedback circuits described above. The improvement in current sharing between the phases of the motor drives can be clearly seen with the current balancing feedback circuits activated.

(72) Although the present disclosure has been described with reference to various embodiments, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the scope of the invention as set forth in the accompanying claims.