I-V CONVERTING MODULE

Abstract

An I-V converting module includes: a current output sensor, an I-V transforming circuit, a sampling and holding circuit, a source follower, a loop switch, and a bypass circuit. A drain of the source follower is connected to an input/output end of the sampling and holding circuit. A source of the source follower is connected to an input end of the I-V transforming circuit and an output end of the current output sensor, and a gate of the source follower is connected to an output end of the I-V transforming circuit via the loop switch, and to the bypass circuit. When the loop switch is closed and the bypass circuit is disabled, a feedback loop formed by the source follower, the I-V transforming circuit and the loop switch is conducted, and the I-V converting module enters into a sampling setup stage.

Claims

1. An I-V converting module, comprising: a current output sensor, an I-V transforming circuit, a sampling and holding circuit, a source follower, a loop switch, and a bypass circuit; wherein a drain of the source follower is connected to an input/output end of the sampling and holding circuit, a source of the source follower is connected to an input end of the I-V transforming circuit and an output end of the current output sensor, and a gate of the source follower is connected to an output end of the I-V transforming circuit via the loop switch; and wherein the gate of the source follower is further connected to the bypass circuit; wherein when the loop switch is closed and the bypass circuit is disabled, a feedback loop formed by the source follower, the I-V transforming circuit and the loop switch is conducted, and the I-V converting module enters into a sampling setup stage; and wherein when the loop switch is disconnected and the bypass circuit is enabled, the feedback loop is bypassed, and the I-V converting module enters into an I-V converting stage.

2. The I-V converting module according to claim 1, wherein the I-V converting module further comprises a loop capacitor; and wherein the loop capacitor is connected between the gate of the source follower and the input end of the I-V transforming circuit.

3. The I-V converting module according to claim 1, wherein the bypass circuit comprises a bypass switch and a power supply, and the bypass switch is connected between the gate of the source follower and the power supply; and wherein the bypass circuit is disabled when the bypass switch is disconnected.

4. The I-V converting module according to claim 1, wherein the bypass circuit comprises a first bypass switch, a second bypass switch, and a ground plane; wherein the first bypass switch is connected between the gate of the source follower and the ground plane; wherein the second bypass switch is connected between the source and the drain of the source follower; and wherein the bypass circuit is disabled when both of the first bypass switch and the second bypass switch are disconnected.

5. The I-V converting module according to claim 1, wherein the I-V transforming circuit comprises an inverting amplifier and at least one transforming path; wherein the transforming path is connected between an input end of the inverting amplifier and an output end of the inverting amplifier; and wherein the input end of the inverting amplifier and the output end of the inverting amplifier form the input end and the output end of the I-V transforming circuit, respectively.

6. The I-V converting module according to claim 5, wherein, the inverting amplifier comprises an inverter or an operational amplifier.

7. The I-V converting module according to claim 5, wherein the transforming path comprises a resistor and a switch connected in series, or a capacitor and a switch connected in series.

8. The I-V converting module according to claim 1, wherein the source follower comprises an N-type field-effect transistor or an NPN-type triode.

9. The I-V converting module according to claim 1, wherein the loop switch is an electronic switch or a physical switch.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0016] FIG. 1 is a circuit structural diagram of an existing I-V converting module in the background;

[0017] FIG. 2 is a circuit structural diagram of an I-V converting module according to a first embodiment of the present disclosure;

[0018] FIG. 3 is a circuit structural diagram of an I-V transforming circuit of a first example according to the first embodiment;

[0019] FIG. 4 is a circuit structural diagram of an I-V transforming circuit of a second example according to the first embodiment;

[0020] FIG. 5 is a circuit structural diagram of an I-V converting module according to a second embodiment; and

[0021] FIG. 6 is a circuit structural diagram of an I-V converting module according to a third embodiment.

DETAILED DESCRIPTION

[0022] In order to make the objectives, technical solutions and advantages of the present disclosure clearer, some of embodiments of the present disclosure will be further described in details with reference to the drawings. However it should be understood by the person skilled in the art that in some embodiments of this patent application, various technical details are described to make this application easier to be understood. However, the technical solutions sought to be protected by the claims of this patent application may be implemented even without the technical details and the various changes and modification made to the embodiments below.

[0023] A first embodiment of the present disclosure relates to an I-V converting module, i.e., a current to voltage converting module. As shown in FIG. 2, the I-V converting module includes: an I-V transforming circuit 1, a sampling and holding circuit 2, a current output sensor 3, a source follower M.sub.1, a loop switch S.sub.1, and a bypass circuit.

[0024] The source follower M1 includes an N-type field-effect transistor or an NPN-type triode, but without any limitation; and as an example, this embodiment is described by using the N-type field-effect transistor.

[0025] In this embodiment, a drain of the source follower M.sub.1 connects to an input/output end of the sampling and holding circuit 2, a source of the source follower connects to an input end V.sub.in of the I-V transforming circuit 1 and an output end of the current output sensor 3, a gate of the source follower connects to an output end V.sub.out of the I-V transforming circuit 1 via the loop switch S.sub.1, and the gate of the source follower also connects to the bypass circuit.

[0026] The loop switch S.sub.1 is an electronic switch or a physical switch. For example, the electronic switch may be a field-effect transistor or a bipolar junction transistor. This embodiment has no limitation on the type of the loop switch S.sub.1.

[0027] In this embodiment, the current output sensor 3 includes a parasitic capacitor C.sub.3. One end of the parasitic capacitor C.sub.3 connects to a ground terminal GND1, and the other end of the parasitic capacitor C.sub.3 connects to an output end of the current output sensor 3. The output end of the current output sensor 3 connects to the source of the source follower M.sub.1 and the input end V.sub.in of the I-V transforming circuit 1. A current I.sub.0 is output by the output end of the current output sensor 3. A direct current component output by the current output sensor 3 is I.

[0028] In this embodiment, the sampling and holding circuit 2 includes: a sampling field-effect transistor M.sub.2, a sampling capacitor C.sub.2, and a sampling switch S.sub.2. One end of the sampling capacitor C.sub.2 and a source of the sampling field-effect transistor M2 are connected to a power supply voltage VDD. The other end of the sampling capacitor C.sub.2 connects to a gate of the sampling field-effect transistor M.sub.2 and one end of the sampling switch S.sub.2. The other end of the sampling switch S.sub.2 and a drain of the sampling field-effect transistor M.sub.2 are connected to the drain of the source follower M.sub.1.

[0029] In the sampling and holding circuit 2, when the sampling switch S.sub.2 is closed, the sampling field-effect transistor M.sub.2 is equivalent to a resistor having a resistance of gm. Because the source follower M.sub.1 usually works in a sub-threshold region, the resistance of the sampling field-effect transistor M.sub.2 is in positive proportion to the direct current component I output by the current output sensor 3, i.e. gm=.Math.I (is a constant).

[0030] In this embodiment, the I-V transforming circuit 1 includes an inverting amplifier and at least one transforming path. The transforming path connects between an input end and an output end of the inverting amplifier. The input end and the output end of the inverting amplifier respectively form the input end V.sub.in and the output end V.sub.out of the I-V transforming circuit 1.

[0031] The inverting amplifier includes an inverter or an operational amplifier (but without any limitation). The transforming path includes a resistor and a switch which are connected in series, or a capacitor and a switch which are connected in series. Moreover, there may be multiple or a single transforming path. The type of serial connection of the transforming path and the number of the transforming paths may be specifically set according to actual situations in this embodiment, and this is not limited in this embodiment.

[0032] This embodiment provides two examples of the I-V transforming circuit 1, and specific descriptions are as follows.

[0033] In an I-V transforming circuit of the first type, as shown in FIG. 3, the inverting amplifier is an inverter 11, and a transforming path 12 includes a capacitor C.sub.12 and a converting switch S.sub.12 which are connected in series. Specifically, one end of the capacitor C.sub.12 connects to an input end V.sub.in of the inverter 11, and the other end of the capacitor C.sub.12 connects to one end of the converting switch S.sub.12. The other end of the converting switch S.sub.12 connects to an output end V.sub.out of the inverter 11. The input end V.sub.in and the output end V.sub.out of the inverter 11 respectively form the input end Vin and the output end V.sub.out of the I-V transforming circuit 1.

[0034] In the I-V transforming circuit of the first type, when the converting switch S.sub.12 is disconnected, the transforming path 12 does not work. In this situation, the I-V transforming circuit 1 is equivalent to an open-loop amplifier. When the converting switch S.sub.12 is closed, the I-V transforming circuit 1 converts an input current signal I.sub.in into a voltage signal and outputs the voltage signal. The converting switch S.sub.12 is controlled by a clock signal to disconnect and close at intervals. The input current signal I.sub.in is an alternating current component output by the current output sensor 3.

[0035] In an I-V transforming circuit of the second type, as shown in FIG. 4, the inverting amplifier is an operational amplifier 13, and the transforming path 12 includes a resistor R.sub.12 and a converting switch S.sub.12 which are connected in series. Specifically, one end of the resistor R.sub.12 connects to an input end Vin of the operational amplifier 13, that is, an inverting input end of the operational amplifier 13. An in-phase input end of the operational amplifier 13 receives a common-mode power supply V.sub.cm. The other end of the resistor R12 connects to an end of the converting switch S.sub.12. The other end of the converting switch S12 connects to an output end V.sub.out of the operational amplifier 13. The input end V.sub.in and the output end V.sub.out of the operational amplifier 13 respectively form the input end V.sub.in and the output end V.sub.out of the I-V transforming circuit 1.

[0036] In the I-V transforming circuit 1 of the second type, when the converting switch S.sub.12 is disconnected, the transforming path 12 does not work. In this situation, the I-V transforming circuit 1 is equivalent to an open-loop amplifier. When the converting switch S.sub.12 is closed, the I-V transforming circuit 1 converts an input current signal I.sub.in into a voltage signal and outputs the voltage signal.

[0037] In practice, there are various other implementing manners of the I-V transforming circuit 1 which are not limited in this embodiment. Any implementing manner of the I-V transforming circuit 1 that can make the I-V converting module work normally may be applied to this embodiment. For example, the I-V transforming circuit 1 may be connected by an operational amplifier and a transforming path including a capacitor and a switch which are connected in series, or may be connected by an inverter and a transforming path including a resistance and a switch which are connected in series.

[0038] In this embodiment, the bypass circuit may include a bypass switch S.sub.3 and a power supply. The bypass switch S.sub.3 connects between a gate of the source follower M1 and the power supply. The power supply of the bypass circuit may be the power supply voltage VDD of the sampling and holding circuit 2, or may be an individual power supply. This is not limited in this embodiment.

[0039] In the bypass circuit, the bypass circuit is disabled when the bypass switch S.sub.3 is disconnected, that is, the bypass circuit is in a non-working state. The bypass circuit is enabled when the bypass switch S.sub.3 is closed, that is, the bypass circuit is in a working state. In this case, the gate of the source follower M.sub.1 connects to the power supply, the source follower M.sub.1 enters into a linear region, and the source follower M.sub.1 is equivalent to a closed switch.

[0040] In this embodiment, when a control signal sh is at a high level, the loop switch S.sub.1 is closed and the bypass circuit is disabled, that is, the bypass switch S.sub.3 is disconnected. A feedback loop, formed by the source follower M.sub.1, the I-V transforming circuit 1, and the loop switch S.sub.1, is conducted, and the I-V converting module enters into a sampling setup stage. The loop switch S.sub.1 is disconnected and the bypass circuit is enabled, that is, the bypass switch S.sub.3 is closed, the feedback loop is bypassed, and the I-V converting module enters into an I-V converting stage.

[0041] For example, in the I-V converting module, as shown in FIG. 2 and FIG. 3, in this embodiment, the loop switch S.sub.1 and the sampling switch S.sub.2 are controlled by the control signal sh, and the converting switch S.sub.12 is controlled by a control signal sh. When the control signal sh is at a high level, the loop switch S.sub.1 and the sampling switch S.sub.2 are closed, and the converting switch S.sub.12 and the bypass switch S.sub.3 are disconnected. The feedback loop is conducted, the source follower M.sub.1 enters into a saturation region and separates the sampling and holding circuit 2 from the current output sensor 3. The I-V converting module enters into a sampling setup stage, that is, the sampling and holding circuit 2 begins to sample a current, the gate and the drain of the sampling field-effect transistor M.sub.2 are short-circuited, and charges the sampling capacitor C.sub.2, and finally a voltage V.sub.c2 in one end of the sampling capacitor C.sub.2 stabilizes to a voltage value, making a drain current of the sampling field-effect transistor M.sub.2 be equal to the direct current component I output by the current output sensor 3. In this case, the sampling field-effect transistor M.sub.2 is equivalent to a resistor having a resistance of gm, and the resistor, the sampling capacitor C.sub.2, and a capacitor seen from the drain of the source follower M.sub.1 are connected in parallel to generate a time constant 1. When the control signal sh is at a low level, the loop switch S.sub.1 and the sampling switch S.sub.2 are disconnected, and the converting switch S12 and the bypass switch S.sub.3 is closed. The I-V converting module enters into an I-V converting stage, the sampling field-effect transistor M.sub.2 outputs a constant current and counteracts the direct current component I. At the same time, the source follower M.sub.1 enters into the linear region. In this situation, the source follower M.sub.1 is equivalent to a closed switch, the I-V transforming circuit converts an alternating-current signal output by the current output sensor 3 into a voltage output signal.

[0042] Specifically, in the existing technology, in the sampling setup stage, that is, when the control signal sh is at a high level, the switch S.sub.2 is closed, and a voltage of a plate of the parasitic capacitor C.sub.3 connected to the sampling capacitor C.sub.2 begins to be established. In this situation, the sampling field-effect transistor M.sub.2 is equivalent to a resistor having a resistance of gm. Because the sampling field-effect transistor M.sub.2 usually works in a sub-threshold region, the resistance of the sampling field-effect transistor M.sub.2 is in positive proportion to the direct current component I output by the current output sensor 3, that is, gm=.Math.I , where is a constant, and a time constant of the sampling and holding circuit 2 is =(C.sub.3+C.sub.2)/gm=(C.sub.3+C.sub.2)/.Math.I.

[0043] In this embodiment, because the source follower M.sub.1 is in the saturation region, the channel thereof is pinched off, it is hard to see a capacitor from the drain of the source follower M.sub.1. Therefore, the time constant 1=C.sub.2/gm1, where gm1 is a transconductance of the sampling field-effect transistor M.sub.2. Compared with the existing time constant =(C.sub.3+C.sub.2)/gm=(C.sub.3+C.sub.2)/.Math.I, where is a constant and is a ratio of gm to I, C.sub.3 has no impact on the time constant 1. If gm.sub.1=1 s, C.sub.3=100 pF, and C.sub.2=1 pF, the time constant of the sampling and holding circuit 2 is 1 s, that is, compared with an existing sampling and holding circuit, the setup speed of the sampling and holding circuit 2 is almost increased by 100 times (usually is increased by 10 to 100 times). Therefore, the I-V transforming circuit 1 only needs a very short time to convert the alternating current component output by the current output sensor 3.

[0044] In detail, in the existing technology, in the I-V transforming circuit 1, a time constant of the input end Vin is 2=C.sub.3.Math.Req, where Req is an equivalent impedance of an input end V.sub.in in a loop formed by the transforming path 12 and the inverter 11. Assuming that a gain of the inverter 11 is A, it can be deducted that Req=1/(gm.sub.2.Math.A) ,where gm.sub.2 is a transconductance of the source follower M1, and the time constant of the input end V.sub.in can be changed to 2=(C.sub.3+A)/A.

[0045] In this embodiment, in the I-V transforming circuit 1, the time constant of the input end Vin is 2=C.sub.3.Math.Req, where Req is an equivalent impedance of an input end Vin in a loop including the transforming path 12 and the inverter 11. Assuming that a gain of the inverter 11 is A, it can be deducted that Req=1/(gm.sub.2.Math.A), where gm.sub.2 is a transconductance of the source follower M1, and the time constant of the input end Vin can be changed to 2=(C.sub.3+A)/(gm.sub.2.Math.A). Compared with the existing 2=(C.sub.3+A)/A technology, the setup speed of the input end V.sub.in may be greatly increased by approximately 10 to 100 times.

[0046] Compared with the existing technologies, this embodiment provides an I-V converting module, the feedback loop is formed by the source follower M1, the I-V transforming circuit 1, and the loop switch S1, enabling the source follower M1 to be in the saturation region in the sampling setup stage, so as to separate the parasitic capacitor C.sub.3 from the sampling capacitor C.sub.1, that is, to separate the sampling and holding circuit 2 from the current output sensor 3. A time constant formed by the parasitic capacitor C.sub.3 and the sampling capacitor C.sub.1 is greatly decreased, thereby greatly accelerating the setup speed of the sampling and holding circuit 2, and increasing the converting rate of the I-V transforming circuit. A control circuit of the I-V converting module provided by the present invention is relatively simple, and the formed feedback loop reuses the inverting amplifier in the I-V transforming circuit, which reduces the circuit costs.

[0047] A second embodiment of the present invention relates to an I-V converting module. Improvements are made in the second embodiment based on the first embodiment, and the main improvement is: in the second embodiment of the present invention, as shown in FIG. 5, a loop capacitor C.sub.1 is added in the feedback loop.

[0048] In this embodiment, the loop capacitor C.sub.1 connects between the gate of the source follower M.sub.1 and the input end V.sub.in of the I-V transforming circuit 1. The loop capacitor C.sub.1 is in parallel connection with the inverter 11. Due to the Miller effect, the loop capacitor C.sub.1 is doubled to the source of the source follower M.sub.1. Therefore, the source of the source follower M.sub.1 generates a low-frequency pole to make the feedback loop more stable.

[0049] For example, in this embodiment, as shown in FIG. 3 and FIG. 5, in the I-V converting module, the time constant of the input end V.sub.in of the I-V transforming circuit 1 is 2=C.sub.3.Math.Req, where Req is an equivalent impedance of an input end V .sub.in in a loop including the transforming path 12 and the inverter 11. Assuming that a gain of the inverter 11 is A, it can be deducted that Req=1/(gm.sub.2.Math.A), where gm.sub.2 is a transconductance of the source follower M1, and the time constant of the input end Vin can be changed to 2=(C.sub.3+C.sub.1.Math.A)/(gm.sub.2.Math.A). Compared with 2=(C.sub.3+A)/(gm.sub.2.Math.A) in the first embodiment, the setup speed of the input end V .sub.in is greatly increased.

[0050] Compared with the technology of the first embodiment, this embodiment adds the loop capacitor C.sub.1 in the feedback loop, thereby improving the stability of the feedback loop.

[0051] A third embodiment of the present invention relates to an I-V converting module. The third embodiment is substantially similar to the second embodiment, and the main difference is: in the second embodiment, the bypass circuit includes the bypass switch and the power supply. However, in the third embodiment of the present invention, as shown in FIG. 6, the bypass circuit includes a first bypass switch S.sub.3 (that is, the bypass switch S.sub.3 in the second embodiment), a second bypass switch S.sub.4, and a ground plane GND2.

[0052] In this embodiment, the first bypass switch S.sub.3 connects between the gate of the source follower M.sub.1 and the ground plane GND2; and the second bypass switch S4 connects between the source and the drain of the source follower M.sub.1.

[0053] Preferably, the second bypass switch S.sub.4 uses a P-type field-effect transistor, but without any limitation on the type of transistor.

[0054] In the bypass circuit, when both of the first bypass switch S.sub.3 and the second bypass switch S.sub.4 are disconnected, the bypass circuit is disabled, that is, the bypass circuit is in a non-working state. When both of the first bypass switch S.sub.3 and the second bypass switch S.sub.4 are closed, the bypass circuit is enabled, that is, the bypass circuit is in a working state.

[0055] In this embodiment, when a control signal sh is at a high level, a loop switch S1 is closed, and the first bypass switch S.sub.3 and the second bypass switch S4 are disconnected. When the feedback loop is beginning to work, the source follower M1 enters into the saturation region (due to a negative feedback). When sh is at a low level, the loop switch S.sub.1 is disconnected, and both of the first bypass switch S.sub.3 and the second bypass switch S.sub.4 are closed, and the feedback loop is bypassed. In this case, the I-V transforming circuit is equivalent to a regular transforming circuit, the gate of the source follower M.sub.1 connects to the ground plane GND2, and the source follower M1 enters into a cutoff region. At the same time, the second bypass switch S.sub.4 is closed, and the source follower M.sub.1 is short-circuited.

[0056] Compared with the second embodiment, the mechanism of the bypass circuit in this embodiment is different. In the sampling setup stage of the second embodiment, the gate of the source follower M.sub.1 is pulled to a terminal of the power supply. There is usually a relatively big voltage ripple at the terminal of the power supply, and there is a parasitic capacitor between the gate of the source follower M.sub.1 and the source as well as the drain of the source follower M.sub.1. Therefore, the bypass circuit may introduce the ripple of the voltage to the I-V transforming circuit 1, that is, a large amount of noise may be introduced, resulting in impact on a final signal-to-noise ratio. In this embodiment, in the sampling setup stage, the gate of the second bypass switch S.sub.4 (when being a P-type field-effect transistor) is grounded and is conducted the short-circuited source follower M.sub.1, and the gate of the source follower M.sub.1 connects the ground plane GND2 (that is, is grounded), avoiding introducing the ripple of the power supply to the I-V transforming circuit, so as to increase the signal-to-noise ratio of the I-V transforming circuit 1, that is, to improve the power supply rejection capability of the I-V transforming circuit.

[0057] Compared with this embodiment, in the second embodiment, when the source follower is in the linear region in the sampling setup stage, the source follower is equivalent to a closed switch, such that some switches in the circuit are reduced, and the costs as well, and the control complexity of the I-V converting module is decreased.

[0058] It should be noted that, modules involved in this embodiment are all logical modules. During actual application, a logical unit may be a physical unit, or may be part of a physical unit, or may be implemented as a combination of multiple physical units. In addition, to highlight the innovative part of the present invention, units without very close relationship with the solving of the technical problems in the present invention are not introduced in this embodiment, which does not indicate that other units are not included in this embodiment.

[0059] A person of ordinary skill in the art can understand that the above embodiments are specific embodiments to implement the present invention, but during actual application, various changes can be made to the forms and details without departing from the spirit and scope of the present invention.