CEM SWITCHING DEVICE

Abstract

Subject matter herein disclosed relates to a method for the manufacture of a switching device comprising a correlated electron material. In embodiments, processes are described which may be useful for avoiding a resistive layer which tends to form between the correlated electron material and a conductive substrate and/or overlay.

Claims

1. A method for the manufacture of a switching device, which method comprises: forming a conductive substrate; forming a primary layer of a correlated electron material on the conductive substrate; and forming a conductive overlay on the primary layer of correlated electron material, wherein the forming of the conductive substrate and the conductive overlay comprises incorporating a dopant providing a first secondary layer of a correlated electron material between the primary layer of correlated electron material and the conductive substrate and a second secondary layer of correlated electron material between the primary layer of correlated electron material and the conductive overlay.

2. A method according to claim 1, comprising forming the conductive substrate and overlay by depositing a layer of doped metal or metal compound or by depositing a layer of a metal or metal compound and treating the layer to incorporate a dopant.

3. A method according to claim 2, comprising treating the layer by annealing it after the forming of the primary layer of correlated electron material.

4. A method according to claim 1, wherein the forming of the conductive substrate and/or overlay comprises a physical vapour deposition or a chemical vapour deposition.

5. A method according to claim 4, wherein the physical vapour deposition or the chemical vapour deposition employs an organometallic or organic precursor.

6. A method according to claim 4, wherein the physical vapour deposition or chemical vapour deposition employs an inorganic precursor.

7. A method according to claim 5, wherein the physical vapour deposition or chemical vapour deposition employs an organic precursor.

8. A switching device comprising a correlated electron material, wherein a primary layer of a correlated electron material is provided over a conductive substrate and a conductive overlay is provided over the primary layer of correlated electron material, and wherein a first secondary layer of a correlated electron material is provided between the primary layer of correlated electron material and the conductive substrate and a second secondary layer of correlated electron material is provided between the primary layer of correlated electron material and the conductive overlay.

9. A device according to claim 8, wherein the conductive substrate and overlay comprise a metal or metal compound and the primary layer of correlated electron material comprises a metal compound.

10. A device according to claim 9, wherein the metal of the conductive substrate and overlay is the same as that of the first and second secondary layers of correlated electron material.

11. A device according to claim 9, wherein the metal of the conductive substrate and overlay is different to that of the primary layer of correlated electron material.

12. A device according to claim 10, wherein the metal of the conductive substrate and overlay is different to that of the primary layer of correlated electron material.

13. A device according to claim 8, wherein the primary layer of correlated electron material comprises nickel oxide.

14. A device according to claim 8, wherein the conductive substrate and/or the conductive overlay comprises one or more of titanium nitride, tantalum nitride and tungsten nitride, platinum, titanium, copper, aluminum, cobalt, nickel, tungsten, cobalt silicide, ruthenium oxide, chromium, gold, palladium, indium tin oxide, tantalum, silver, iridium, iridium oxide or any combination thereof.

Description

[0107] Further embodiments in the aforementioned aspects will be apparent from the general description which follows wherein reference is made to the following drawings:

[0108] FIG. 1A shows a schematic illustration of a current density versus voltage profile of a CEM switching device;

[0109] FIG. 1B shows a schematic illustration of the CEM switching device of FIG. 1A and a schematic diagram of an equivalent circuit for the switching device;

[0110] FIG. 2A shows a schematic illustration of a CEM switching device having an oxide as interfacial layers between a conductive substrate and the correlated electron material and a schematic diagram of an equivalent circuit for the switch;

[0111] FIG. 2B shows a schematic illustration of a current density versus voltage profile for the CEM switching device of FIG. 2A;

[0112] FIG. 3A shows a schematic illustration of one embodiment of the CEM switching device of the present disclosure and a schematic diagram of an equivalent circuit for the switching device;

[0113] FIG. 3B shows a schematic illustration a part current density versus voltage profile for the CEM switching device of FIG. 3A;

[0114] FIGS. 4 and 5 show flow charts generally illustrating the manufacture of CEM switching devices according to several embodiments of the present disclosure; and

[0115] FIGS. 6 and 7 show gas flow and temperature profiles illustrating the manufacture of CEM switching devices according to several embodiments of the present disclosure.

[0116] Referring now to FIG. 2A, there is shown a switching device 250, such as may be used as a storage element, wherein interfacial layers 262 and 264 of a relatively high impedance oxide have formed between the CEM layer 260 and the conductive substrate 270 and conductive overlay 280. The device may be represented by a circuit diagram similar to that shown for the device of FIG. 1 except that it also comprises series resistors 296 and 298. The conductive substrate and/or conductive overlay may comprise a titanium nitride fabricated in layers utilizing, for example, sputtering, chemical vapor deposition, atomic layer deposition, or other suitable process and the CEM layer may comprise nickel oxide, for example, Ni:CO fabricated in layers utilizing, for example, atomic layer deposition or other suitable processes.

[0117] As shown in FIG. 2A, an oxidation layer 262 may be present and may be modeled using equivalent resistance disposed between device terminal 290 and the parallel combination of variable resistance 292 with variable capacitance 294. Likewise, the oxidation layer 264 may be modeled using equivalent resistance 298 disposed between device terminal 290 and the parallel combination of variable resistance 292 with variable capacitance 294. The resistances 296 and 298 may bring about degraded electrical performance of a CEM switching device.

[0118] In this device, responsive to application of a voltage within a particular range, such as, for example, between approximately 3.0 V and approximately 4.0 V, oxidation layer 262 may develop one or more filaments which may comprise conductive crystalline, low-resistance paths between conductive overlay 280 and the CEM layer 260. Likewise, a voltage of between, for example, approximately 3.0 V and approximately 4.0 V may bring about formation of filaments in oxidation layer 264 between the CEM layer 260 and conductive substrate 270. Formation of filaments may bring about operation of a switching device that more closely approximates the current density versus voltage profile of FIG. 1A.

[0119] Thus, V.sub.read, V.sub.reset, and V.sub.set may be substantially (and undesirably) increased. In one possible example, V.sub.set may comprise a voltage level approximately in the range of 3.0 V to 4.0 V, for example. Thus, electrical switching voltages to bring about a change of state of a CERAM memory device, for example, may be increased significantly, such as from approximately 1.0 V to 2.0 V as described in reference to FIG. 1A, for example, to 3.0 V to 4.0 V, at least in certain instances as described with reference to FIG. 2A.

[0120] Although the formation of filaments within the oxidation layers 262 and 264 may permit the device to perform switching operations responsive to application of voltage levels approximately in the range of 2.0 V, or less, for example, the need to apply filament-forming voltages of, for example, approximately 3.0 V to approximately 4.0 V may be undesirable.

[0121] Accordingly, in certain devices, it may be advantageous to reduce or eliminate a need to form conductive filaments so as to allow a low-impedance path for electrical current flowing from conductive substrate to CEM film and to conductive material, for example.

[0122] Avoidance of a need for filament-forming (breakdown) voltages may preserve the born on property of a CEM switching device, which refers to a CEM switching device's ability to exhibit a relatively low impedance (relatively high conductivity) responsive to fabrication of the device.

[0123] Referring now to FIG. 3A, there is shown a CEM switching device 350, such as may be used as a storage element, wherein interfacial layers 362 and 364 of relatively low impedance oxide has formed between the CEM layer 360 and the conductive substrate 370 and conductive overlay 380. The conductive substrate 370 and/or conductive overlay 380 may comprise titanium nitride fabricated in layers utilizing, for example, sputtering, chemical vapor deposition, atomic layer deposition, or other suitable process so that a dopant is incorporated at least in the region contacting the CEM layer 360. The CEM layer 360 may comprise nickel oxide, for example, Ni:CO fabricated in layers by, for example, atomic layer deposition or other suitable processes.

[0124] The metal oxide of the interfacial layers 362 and 364 are doped so that the interfacial layers each comprise a secondary layer of a correlated electron material. This secondary CEM layer 362, 364 is formed in situ when the oxidation layer is formed and in a relatively low impedance state. Because the secondary layers 362 and 364 are relatively conducting (as compared to the primary CEM layer 360), the device does not require the application of a relatively high filament-forming voltages before its switching operation.

[0125] FIGS. 2B and 3B shows a comparison between the voltages that may be applied to the CEM switching devices of FIG. 2A and FIG. 3A. If the secondary CEM layers 362 and 364 are modeled in the same way as the oxidation layers of the CEM switching device of FIG. 2, the equivalent circuit is the same as that shown for the CEM switching device of FIG. 1B viz. comprising the parallel combination of variable resistance 392 with variable capacitance 394.

[0126] Referring now to FIGS. 4 and 5, flow diagrams illustrate various ways of forming respectively the conductive substrate and the conductive overlay for a CEM switching device. Taken together, these Figures illustrate several ways for forming the switching device shown in FIG. 3A.

[0127] As may be seen, the method may comprise the formation of a conductive substrate and the formation of a primary layer of correlated electron material on the conductive substrate. At least a portion of the conductive substrate must be doped by a dopant providing for the formation of an interfacial layer between the conductive substrate and the primary layer as a correlated electron material.

[0128] Three alternatives are presented in FIG. 4 for forming the conductive substrate comprising forming substantially the whole of the conductive substrate by deposition of conducting layers incorporating a dopant, forming a top part of the conductive substrate from such layers or treating a conductive substrate so that it incorporates a dopant.

[0129] The treatment of a conductive substrate may comprise annealing it before forming the primary layer in the presence of one or more suitable carbon containing or nitrogen containing molecules such as those mentioned above.

[0130] Alternatively, the treatment of the conductive substrate may comprise annealing it with the primary layer so that the dopant of the primary layer diffuses into the conductive substrate.

[0131] An annealing may be carried out anyway so that the dopant of the conductive substrate is activated or diffuses towards the primary layer.

[0132] It may also be carried out in order to remove impurities such as chlorine when the conductive substrate is doped or to be doped by a dopant other than chlorine and is formed in part from a chloride precursor molecule.

[0133] Although not shown in FIG. 4, an annealing for the purpose of removing impurities such as chlorine can also be carried out during the forming of the conductive substrate (prior to depositing a doped layer or layers) or after the forming of the conductive substrate (and prior to depositing the primary layer).

[0134] The method may alternatively or additionally comprise the formation of a conductive overlay on a primary layer of correlated electron material. At least a portion of the conductive overlay must be doped by a dopant providing for the formation of an interfacial layer between the conductive overlay and the primary layer as a correlated electron material.

[0135] Three alternatives are presented in FIG. 5 for forming the conductive overlay comprising forming substantially the whole of the conductive overlay by deposition of conducting layers incorporating a dopant, forming a bottom part of the conductive overlay from such layers or treating a conductive substrate so that it incorporates a dopant.

[0136] The treatment of a conductive overlay may comprise annealing it on the primary layer in the presence of one or more suitable carbon containing or nitrogen containing molecules such as those mentioned above.

[0137] Alternatively, the treatment of the conductive overlay may comprise annealing it with the primary layer so that the dopant of the primary layer diffuses into the conductive overlay.

[0138] An annealing may be carried out anyway so that the dopant of the conductive overlay is activated or diffuses towards the primary layer.

[0139] It may also be carried out in order to remove impurities such as chlorine when the conductive overlay is doped by a dopant other than chlorine and is formed in part from a chloride precursor molecule.

[0140] Of course, an annealing may additionally or alternatively be carried out so that the conductive substrate and the conductive overlay are annealed together with the primary layer.

[0141] Referring now to FIGS. 6 and 7, there is shown gas flow and a temperature profiles for obtaining the conductive substrate and the conductive overlay of a CEM switching device.

[0142] The profiles are for an atomic layer deposition employing sequential pulsing of a first precursor AX, for example, tetrakis(dimethylamido)titanium (TDMAT) and a second precursor BY, for example, ammonia (NH.sub.3) with intervening pulsing with a purge gas, for example, nitrogen (N.sub.2).

[0143] Each plot of gas flow against time represents the forming of the conductive substrate and/or the forming the conductive overlay. The peaks relating to dopant precursor may be additional to the precursors AX and BY and are alternatives reflecting the deposition of a doped layer in the conductive substrate for contacting the primary layer (late) and the deposition of a doped layer in the conductive overlay (early) contacting the primary layer.

[0144] In one deposition, in which the additional dopant precursor is not employed, the process conditions (flow rate or residence time, temperature, pressure etc) for the sequential pulsing of TDMAT and NH.sub.3 are arranged for the deposition of a conductive substrate of titanium nitride comprising carbon as dopant wherein the carbon dopant originates from TDMAT. The same precursors and process conditions are employed for the deposition of a conductive overlay of titanium nitride comprising carbon as dopant wherein the carbon dopant originates from TDMAT.

[0145] In another deposition, in which an additional dopant precursor is employed, the process conditions for the sequential pulsing of TDMAT and NH.sub.3 are arranged for the deposition of the bulk of a conductive substrate of titanium nitride. In this deposition, the additional precursor, which may for example, comprise carbon monoxide (CO), is introduced with the gas flow of NH.sub.3 at a late stage in the sequence so that a layer of titanium nitride comprising carbon as dopant is formed on the bulk.

[0146] In another deposition, in which the additional dopant precursor comprises a nitrogen containing compound, such as one of those mentioned above, the process conditions for the sequential pulsing of TDMAT and NH.sub.3 are arranged for the deposition of the bulk of a conductive substrate of titanium nitride comprising carbon as dopant wherein the carbon originates from TDMAT. In this deposition, the additional dopant precursor, is introduced with the gas flow of NH.sub.3 at a late stage in the pulsing sequence so that a layer of titanium nitride comprising carbon and nitrogen as dopant is formed on the bulk.

[0147] The same precursors and process conditions may be used for forming the conductive overlay although the additional dopant precursor is introduced with the gas flow of NH.sub.3 at an early stage in the pulsing sequence. In these depositions, the conductive overlay may be formed as a bulk comprising titanium nitride or carbon doped titanium nitride with an underlay comprising one or other of a carbon doped titanium nitride or a carbon and nitrogen doped titanium nitride.

[0148] Note that the temperature may be held constant throughout the deposition of the layers forming the conductive substrate and conductive overlay (FIG. 6) but that a subsequent annealing may be carried out at a temperature which is higher than that employed for the deposition (FIG. 7). The annealing has the effect of moving the dopant to the surface of a conductive substrate which is interfacial when the primary layer is deposited or moving the dopant to the interfacial surface of the conductive overlay with the primary layer.