Sensor circuit

Abstract

A sensor circuit incorporates an analog to digital converter for providing a digital signal derived from sensing elements connected in a bridge configuration. The sensor circuit comprises first and second paths comprising respective first and second sensing elements connected between first and second supply lines; an analog to digital converter having a differential input connected to receive a differential voltage signal (VinpVinn) between the first and second sensing elements and an output for providing a digital output signal (Dout) representing a difference between the first and second sensing elements, the analog to digital converter comprising: current sources connected between the first and second supply lines, each current source being switchably connected to either the first or second sensing elements; and control logic configured to selectively switch current from each of the current sources to either the first path or the second path in dependence on the differential voltage signal.

Claims

1. A sensor circuit comprising: first and second paths comprising respective first and second sensing elements connected between first and second supply lines; and; an analogue to digital converter having a differential input connected to receive a differential voltage signal between the first and second sensing elements and an output for providing a digital output signal representing a difference between the first and second sensing elements, the analogue to digital converter comprising: a plurality of current sources connected between the first and second supply lines, each current source being switchably connected to either the first or second sensing elements; and control logic configured to selectively switch current from each of the current sources to either the first path or the second path in dependence on the differential voltage signal.

2. The sensor circuit of claim 1 wherein the analogue to digital converter comprises: a transconductance amplifier having first and second inputs connected respectively to the first and second sensing elements for receiving the differential voltage signal between the first and second paths; a comparator having an input connected to an output of the transconductance amplifier and an output for providing the digital output signal; and control logic configured to control switching of the plurality of current sources between the first and second paths in dependence on the digital output signal.

3. The sensor circuit of claim 1 wherein the analogue to digital converter comprises: a comparator having first and second inputs connected respectively to the first and second sensing elements for receiving the differential voltage signal between the first and second paths and configured to provide a digital output indicating a sign of the differential voltage signal; and successive approximation control logic having an input connected to receive the digital output from the comparator and configured to provide the digital output signal and to control switching of the plurality of current sources between the first and second paths in dependence on the digital output signal.

4. The sensor circuit of claim 1 wherein the control logic is configured to switch current to the second sensor path from a selected number of the current sources that is equal to a value of the digital output signal.

5. The sensor circuit of claim 4 wherein the control logic is configured to repeatedly change a subset of the plurality of current sources from which the number of current sources is selected.

6. The sensor circuit of claim 5 wherein the control logic is configured to repeatedly change the subset randomly.

7. The sensor circuit of claim 1 wherein the first and second sensing elements are resistive sensing elements.

8. The sensor circuit of claim 7 wherein the first and second sensing elements are configured to change their resistance equally and in opposition in response to a change in a measured parameter.

9. The sensor circuit of claim 7 wherein the first and second sensing elements are magnetic sensing elements.

10. The sensor circuit of claim 1 wherein each of the plurality of current sources is connected to the first supply terminal and switchably connected to the first or second sensing elements along the respective first or second paths.

11. The sensor circuit of claim 1 wherein each of the plurality of current sources is connected to the second supply terminal and switchably connected to the first or second sensing elements along the respective first or second paths, the first and second paths each comprising a bias current source connected between the first supply terminal and the first and second sensor element respectively.

12. The sensor circuit of claim 1 comprising a power supply source connected between the first and second supply terminals.

13. A sensor comprising a sensor circuit according to claim 12.

Description

BRIEF DESCRIPTION OF DRAWINGS

(1) Embodiments will be described, by way of example only, with reference to the drawings, in which

(2) FIG. 1 illustrates a differential sensor with sensing elements connected in a full bridge configuration;

(3) FIG. 2 illustrates a differential sensor in which an analogue to digital converter is integrated in the full bridge configuration;

(4) FIG. 3 illustrates a differential sensor having two sensing elements and a sigma-delta analogue to digital converter;

(5) FIG. 4 illustrates an alternative example of a differential sensor having two sensing elements and a sigma-delta converter; and

(6) FIG. 5 illustrates an alternative differential sensor to that of FIGS. 3 and 4, using a successive approximation register analogue to digital converter.

(7) It should be noted that the Figures are diagrammatic and not drawn to scale. Relative dimensions and proportions of parts of these Figures have been shown exaggerated or reduced in size, for the sake of clarity and convenience in the drawings. The same reference signs are generally used to refer to corresponding or similar feature in modified and different embodiments.

DETAILED DESCRIPTION OF EMBODIMENTS

(8) In the example sensor circuit 100 illustrated in FIG. 1, the sensing elements R.sub.1, R.sub.2, R.sub.3, R.sub.4, represented as variable resistors, are connected in a full bridge configuration. This configuration provides a balanced differential output voltage VinpVinn proportional to an applied bias voltage Vb provided by a voltage supply 101. In order to perform complex digital signal processing the bridge signals Vinp, Vinn are connected to the inputs of a differential high accuracy Analog-to-Digital-Converter (ADC) 102 which converts the analogue signals to the digital domain. The performance of the ADC 102 is to a large extent determined by the accuracy of the reference source of the ADC 102, provided by voltage sources Vrp and Vrn. These voltage sources should track the bias voltage Vb to minimise the effect of noise on the supply of the full bridge. In this way the input range of the ADC 102 scales with the bias voltage Vb as well as the input signals Vinp and Vinn of the ADC 102, resulting in a digital output signal dout that is independent of the bias voltage Vb.

(9) The sensor circuit 100 shown in FIG. 1 has some drawbacks. Generating a low noise accurate reference voltage tracking the bias voltage is not trivial. A significant part of the power consumed by the ADC 102, as well as the area taken up by the ADC in an integrated circuit, will be used for reference signal generation. As mentioned above, the reference voltages Vrp and Vrn should track the bias voltage Vb to make the digital output signal dout independent of the bias voltage Vb. The voltage signals Vinp and Vinn will have a different bandwidth than reference signals Vrefp and Vrefn, so at high frequencies the tracking between reference sources and the bias source will be less accurate. This means that high frequency noise on the bridge supply will not be suppressed, but will be converted to the digital domain. This could even result in aliasing. High frequency noise can then fold back in to the Band Of Interest (BOI).

(10) The ADC 102 also needs a large common mode range to cope with common mode differences between the input signal VinpVinn and the reference signal VrefpVrefn. An alternative that aims to address these issues is illustrated in the sensor circuit 200 of FIG. 2. In this circuit 200, the reference for the ADC is integrated in the full bridge configuration, resulting in a fully symmetrical sensing system without the need for a separate bias circuit for the ADC. This circuit is described in more detail in European patent application 14172427.8, filed on 13 Jun. 2014. This circuit still has some disadvantages. The Power Supply Rejection Ratio (PSRR) of this configuration is still less than ideal due to mismatch between the resistors. Furthermore, it is difficult to achieve a high linearity due to the different bias conditions of the DAC elements R.sub.s1a to R.sub.sna. All resistors and switches operate at a different voltage. DEM algorithms, which can be used to randomize such systematic errors, cannot easily be applied with elements that are connected in series because the additional connections and switches required to enable this would make the circuit much more complex and impractical.

(11) A solution to the above mentioned issues is to switch from a full-bridge configuration with a voltage DAC to a configuration requiring only two sensing elements and using a current DAC. An example of this is illustrated in the sensor circuit 300 of FIG. 3. The sensor circuit 300 comprises first and second paths 301a, 301b, the first path 301a having a first sensing element R.sub.1a and the second path 301b having a second sensing element R.sub.2a, which in the embodiment shown are in the form of variable resistors. The sensing elements R.sub.1a, R.sub.2a are connected between first and second supply lines 302a, 302b, which are connected to a bias voltage source 303, providing a bias voltage Vb. In this example embodiment, the sensing elements R.sub.1a, R.sub.2a are connected directly to the second supply line 302b and to the first supply line 302a via a plurality of current sources 311.sub.0, 311.sub.1 . . . 311.sub.n1, 311.sub.n.

(12) Each of the plurality of current sources 311.sub.0, 311.sub.1 . . . 311.sub.n1, 311.sub.n is switchably connected, by means of respective switches 314.sub.0-n, to either the first or second sensing elements R.sub.1a, R.sub.2a. Current from each of the current sources 311.sub.0-n can thereby be selected to pass along the first path 301a or the second path 301b by means of the selected position of each of the switches 314.sub.0-n. The position of each of the switches 314.sub.0-n is determined by control logic 306, the operation of which is described in more detail below.

(13) A differential voltage signal VinnVinp from the two sensing elements R.sub.1a, R.sub.2a is provided to an ADC for converting the voltage signal to a digital output Dout. In the example circuit 300 in FIG. 3 the ADC is a sigma-delta converter, which comprises a transconductance amplifier or gm stage 304, a capacitor 307, a multi-bit comparator 305, control logic 306 and a feedback DAC consisting of the current sources 311.sub.0, 311.sub.1 . . . 311.sub.n1, 311.sub.n and switches 314.sub.0-n. The gm stage 304 receives the differential voltage signal VinnVinp from the two sensing elements R.sub.1a, R.sub.2a and provides a single ended output signal to an input of the comparator 305. The example embodiments described herein are shown with single ended output stages. Alternative example embodiments may be fully differential, enabling higher resolution. The capacitor 307 is connected between the input of the comparator 305 and ground for low-pass filtering of the signal. An output of the comparator 305 provides the digital output signal Dout, which represents a difference between the first and second sensing elements. In the illustrated example, only two sensing elements are required, both being connected to ground (i.e. the second supply line 302b). The resistors R.sub.1a, R.sub.2a are isolated from the supply line 302a by the current sources 311.sub.0-n. This improves the PSRR of the circuit 300.

(14) The switches 314a-n are controlled by the control logic 306 in dependence on the digital signal output Dout, such that the number of current sources connected to the second path 301b is equal to a value of the digital output signal Dout.

(15) The linearity of the current DAC can be improved by several different DEM techniques. This can be implemented by randomizing the control signals to the DAC elements, each DAC element being a current source and an associated switch. Applying DEM minimizes the required area for the DAC elements while increasing the linearity.

(16) Where the sensor elements R.sub.1a, R.sub.2a are resistors that respond equally and oppositely to a change in a sensed quantity, the response to a change in sensed quantity can be determined as follows.

(17) The voltage on node Vinp is given by:
Vinp=I.sub.p.Math.R.sub.2a=I.sub.p.Math.(R+R)

(18) where I.sub.p is the current flowing through the second path 301b, R is the nominal value of each resistor R.sub.1a, R.sub.2a and R is the change in resistance due to a change in a sensed quantity.

(19) The voltage on node Vinn is given by:
Vinn=I.sub.n.Math.R.sub.2a=I.sub.p.Math.(R+R)

(20) where I.sub.n is the current flowing through the first path 301a.

(21) The current I.sub.p is given by:
I.sub.p=(x+1).Math.I.sub.ref

(22) where x+1 is the number of current sources switched to be connected to the second path 301b.

(23) The current I.sub.n is given by:
I.sub.n=(1x).Math.I.sub.ref
The digital output Ddout is given by:
Dout=x.Math.2.sup.n

(24) where the total number of current sources is n+1.

(25) Due to the loop gain Vinp can be considered equal to Vinn.
I.sub.p.Math.(R+R)=I.sub.n.Math.(RR),
(x+1).Math.I.sub.ref.Math.(R+R)=(1x).Math.I.sub.ref.Math.(RR)
x.Math.R+x.Math.R+R+R=RRx.Math.R+x.Math.R
2.Math.x.Math.R=2.Math.R
x=R/R
Dout=R/R.Math.2.sup.n

(26) This shows that there is a linear relation between the change in resistance R and the digital output signal Dout.

(27) A further advantage of the sensing circuit 300 is that all DAC elements operate under the same bias conditions. This improves the integral nonlinearity of the DAC.

(28) FIG. 4 illustrates an alternative example of a sensor circuit 400, in which the DAC and sensor elements are used in a sigma-delta ADC configuration. As with the sensor circuit 300 of FIG. 3, the sensor circuit 400 comprises first and second paths 401a, 401b having first and second sensing elements R.sub.1a, R.sub.2a connected between first and second supply lines 402a, 402b. A plurality of current sources 411 are connected between the first and second supply lines 402a, 402b, each current source being switchably connected to either the first or second sensing elements R.sub.1a, R.sub.2a. Bias current sources 412a, 412b are connected in the first and second paths 401a, 401b respectively, between the first supply line 402a and the first and second sensing elements R.sub.1a, R.sub.2a respectively. Instead of the switchable current sources being connected to the first supply line 402a, as in the sensor circuit 300 of FIG. 3, the current sources 411 in the alternative circuit 400 are connected to the second supply line, or ground, 402b. Operation of the circuit 400 is similar to that described above in relation to FIG. 3, in that a differential voltage signal is applied to the gm stage 404, which provides a signal to a comparator 405. The comparator 405 provides a digital output signal Dout, which is fed back to control logic 406 to control switching of the current sources 411.

(29) The DAC and sensing elements can also be used in other ADC concepts that use a DAC in a feedback loop, an example of which is a successive approximation ADC. A sensor circuit 500 incorporating a successive approximation ADC is illustrated in FIG. 5. As with the other examples in FIGS. 3 and 4, the sensor circuit 500 comprises first and second paths 501a, 501b comprising respective first and second sensing elements R1a, R2a connected between first and second supply lines 502a, 502b. A plurality of current sources 511.sub.0 . . . 511.sub.n, are connected between the first and second supply lines 502a, 502b, each current source being switchably connected to either the first or second sensing elements R1a, R2a. A comparator 504 receives a differential voltage signal between the first and second sensing elements R1a, R2a and provides a digital output indicating a sign of the differential voltage signal to control logic 506. The control logic 506 provides a digital output signal Dout and controls switching of the current sources to maintain a balance between the currents I.sub.n, I.sub.p flowing through the first and second paths 501a, 501b.

(30) From reading the present disclosure, other variations and modifications will be apparent to the skilled person. Such variations and modifications may involve equivalent and other features which are already known in the art of differential sensing applications and analogue to digital converters, and which may be used instead of, or in addition to, features already described herein.

(31) Although the appended claims are directed to particular combinations of features, it should be understood that the scope of the disclosure of the present invention also includes any novel feature or any novel combination of features disclosed herein either explicitly or implicitly or any generalisation thereof, whether or not it relates to the same invention as presently claimed in any claim and whether or not it mitigates any or all of the same technical problems as does the present invention.

(32) Features which are described in the context of separate embodiments may also be provided in combination in a single embodiment. Conversely, various features which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable sub-combination. The applicant hereby gives notice that new claims may be formulated to such features and/or combinations of such features during the prosecution of the present application or of any further application derived therefrom.

(33) For the sake of completeness it is also stated that the term comprising does not exclude other elements or steps, the term a or an does not exclude a plurality, a single processor or other unit may fulfil the functions of several means recited in the claims and reference signs in the claims shall not be construed as limiting the scope of the claims.