Receiving arrangement for a control device in a vehicle, and method for generating a synchronization pulse

Abstract

A receiving assemblage is provided for a control device in a vehicle, having a voltage generator for generating a synchronization pulse, which encompasses a first voltage source, a current source, and a current sink, the voltage generator generating the synchronization pulse within predefined specification limits with a predefined shape and a predefined time-related behavior, and the receiving assemblage outputting the synchronization pulse via a data bus to at least one sensor for synchronization of a subsequent signal transfer, the voltage generator generating the synchronization pulse via the current source and the current sink, substantially as a sinusoidal oscillation, by charging and/or discharging a bus load, and to a method for generating a synchronization pulse.

Claims

1. A receiving assemblage for a control device in a vehicle, comprising: a voltage generator for generating a synchronization pulse, the voltage generator including: a first voltage source; a current source; and a current sink, wherein the voltage generator is configured to generate a synchronization pulse that has a shape defined by a rise and a fall over time of a value of a voltage of the synchronization pulse; and a data bus via which the receiving assemblage is configured to output the synchronization pulse to at least one sensor to synchronize transfer of signals from the at least one sensor to the receiving assemblage; wherein the voltage generator is configured to: generate the synchronization pulse by toggling between the current source charging the data bus and the current sink discharging the data bus compare the value of the voltage at an end of the synchronization pulse with a voltage value of a supply voltage of a second voltage source of a residual receiver circuit in order to ascertain a value of a voltage difference; apply control to the current source and to the current sink as a function of the ascertained value of the voltage difference to thereby modify the voltage at the end of the synchronization pulse to a value by which the voltage difference drops to less than a predefined threshold value.

2. The receiving assemblage as recited in claim 1, wherein the voltage generator includes at least one digital control application circuit and at least one digital/analog converter, which generate a substantially sinusoidal reference current and output the substantially sinusoidal reference current to the current source and to the current sink.

3. The receiving assemblage as recited in claim 1, wherein the current source furnishes current values that are greater than or equal to 0 mA, and the current sink furnishes current values that are less than 0 mA.

4. The receiving assemblage as recited in claim 2, wherein the at least one digital control application circuit at least one of stores and calculates the shape of the synchronization pulse and, outputs corresponding digital data words to the at least one digital/analog converter.

5. The receiving assemblage as recited in claim 2, wherein the at least one digital control application circuit obtains an indication of a quiescent current of the at least one sensor and regulates the synchronization pulse based on the obtained indication of the quiescent current of the at least one sensor and on a voltage level of the data bus.

6. The receiving assemblage as recited in claim 5, wherein a quiescent current regulator of the residual receiver circuit supplies the indication of the quiescent current.

7. The receiving assemblage as recited in claim 2, wherein the at least one digital control application circuit regulates the synchronization pule based on a quiescent current of the at least one sensor and on a synchronization pulse amplitude that is ascertained by an evaluation of a voltage on the data bus.

8. A method comprising: generating, by toggling charging of a data bus by a current source and discharging of the data bus by a current sink, a synchronization pulse that has a shape defined by a rise and a fall over time of a value of a voltage of the synchronization pulse; transferring the synchronization pulse from a receiver assemblage to at least one sensor to synchronize transfer of signals from the at least one sensor to the receiver assemblage via the data bus; comparing a value of a voltage at an end of the synchronization pulse with a voltage value of a supply voltage of a voltage source, thereby ascertaining a value of a voltage difference; and applying a control to the current source and to the current sink as a function of the ascertained value of the voltage difference to thereby modify the voltage at the end of the synchronization pulse to a value by which the voltage difference drops to less than a predefined threshold value.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic block diagram of a sensor assemblage having an exemplifying embodiment of a receiver assemblage according to the present invention for a control device in a vehicle, which assemblage generates and outputs an optimized synchronization pulse.

(2) FIG. 2 schematically depicts the shape and the time-related behavior of a synchronization pulse, optimized according to the present invention, within the predefined limits.

(3) FIG. 3 schematically depicts the change in bus voltage during a synchronization pulse in the context of a synchronization current that is greater than a quiescent current.

(4) FIG. 4 schematically depicts the change in bus current during the synchronization pulse of FIG. 3.

(5) FIG. 5 schematically depicts the change in bus voltage during a synchronization pulse in the context of a synchronization current that is less than the quiescent current.

(6) FIG. 6 schematically depicts the change in bus current during the synchronization pulse of FIG. 5.

(7) FIG. 7 schematically depicts the change in bus voltage during an optimized synchronization pulse in the context of a synchronization current that is equal to the quiescent current.

(8) FIG. 8 schematically depicts the change in bus current during the synchronization pulse of FIG. 7.

DETAILED DESCRIPTION

(9) As is evident from FIG. 1, the exemplifying embodiment depicted of a sensor assemblage 1 encompasses a data bus 5, at least one sensor 7, and an exemplifying embodiment of a receiving assemblage 3 according to the present invention for a control device in a vehicle. Receiving assemblage 3 according to the present invention encompasses a voltage generator 30 for generating a synchronization pulse P.sub.sync, having a first voltage source 3.1, a current source 3.5, and a current sink 3.6. Voltage generator 30 generates the synchronization pulse P.sub.sync by way of current source 3.5 and current sink 3.6, substantially as a sinusoidal oscillation, by charging and/or discharging a bus load. Receiving assemblage 3 outputs the synchronization pulse P.sub.sync via data bus 5 to the at least one sensor 7 for synchronization of a subsequent signal transfer. According to the present invention, voltage generator 30 compares a voltage value at the end 12 of the synchronization pulse P.sub.sync with a corresponding voltage value of a supply voltage of a second voltage source 3.2 of residual receiver circuit 3.3, and ascertains a voltage difference U.sub.diff. Voltage generator 30 applies control to current source 3.5 and to current sink 3.6 as a function of the ascertained voltage difference U.sub.diff, in such a way that the ascertained voltage difference U.sub.diff drops below a predefined threshold value. Preferably an attempt is made to regulate the voltage difference U.sub.diff to 0 V. In the exemplifying embodiment depicted, current source 3.5 furnishes current values that are greater than or equal to 0 mA, and current sink 3.6 furnishes current values that are less than 0 mA.

(10) As is evident from FIG. 2, voltage generator 30 generates the synchronization pulse P.sub.sync within predefined specification limits Vo, Vu with a predefined shape and a predefined time-related behavior. Receiving assemblage 3 outputs synchronization pulse P.sub.sync via data bus 5 to the at least one sensor 7 for synchronization of a subsequent signal transfer. In order for a synchronous bus system to function with one sensor 7 or with multiple sensors, the synchronization pulse P.sub.sync that is depicted exhibits a specific shape and a specific time-related behavior for all possible bus configurations and under all possible operating conditions. As is further evident from FIG. 2, the synchronization pulse P.sub.sync has an edge slope that is predefined by the edge slope of a first characteristic curve which represents the lower limit Vu, and the edge slope of a second characteristic curve which represents the upper limit Vo. As a result of the sinusoidal or sinusoidal-like shape, the synchronization pulse P.sub.sync is optimized within the predefined limits Vu, Vo in such a way that the lowest possible electromagnetic emission can be achieved in particular in the signal transfer spectral range (100 kHz to 300 kHz), said emission remaining confined to the fundamental wave region of the synchronization pulse P.sub.sync.

(11) As is further evident from FIG. 1, the exemplifying embodiment depicted of receiving assemblage 3 according to the present invention encompasses voltage generator 30, which encompasses a shared digital control application circuit 32 and a shared digital/analog converter 34, which generate a substantially sinusoidal reference current and output it to current source 3.5 and to current sink 3.6. The number of components of voltage generator 30 can be reduced thanks to the shared use of digital control application circuit 32 and of digital/analog converter 34 for current source 3.5 and current sink 3.6. Voltage generator 30 thereby economizes on layout area or silicon area. The exemplifying embodiment depicted enables a very robust implementation of the synchronization pulse P.sub.sync and a reduced electromagnetic emission. Control application to current source 3.5 and to current sink 3.6 for generation of the synchronization pulse P.sub.sync can moreover be displaced entirely into the digital section of receiving assemblage 3, which results in an area-efficient solution given the constant scaling progress of semiconductor technology.

(12) As is further evident from FIG. 1, a voltage supply 3.2 to the remaining circuits 3.3 of receiving assemblage 3 is decoupled from data bus 5 via a switching unit 3.4 during generation and output of the synchronization pulse P.sub.sync, while voltage generator 30 is activated in order to generate the synchronization pulse P.sub.sync. Because voltage generator 30 encompasses current source 3.5 and current sink 3.6, the need for an additional switch in series with current source 3.5 and current sink 3.6 is eliminated.

(13) The shape of the synchronization pulse P.sub.sync either is stored in the digital section or in digital control application circuit 32, or is calculated in digital control application circuit 32 with the aid of an algorithm. At least one digital/analog converter 34 generates, from an N-bit data word, a reference current that is conveyed via current source 3.5 or current sink 3.6 onto the data bus and respectively charges or discharges the load present on the data bus. In order to generate a sinusoidal or approximately sinusoidal synchronization pulse P.sub.sync shown in FIG. 2, sinusoidal or substantially sinusoidal control is applied both to current source 3.5 and to current sink 3.6.

(14) As is further evident from FIG. 2, requirements are imposed on the shape and the edge slope of the synchronization pulse P.sub.sync. On the one hand, the edge slope must not be too shallow, since this results in higher tolerances for the detection time of sensors 7. This in turn can limit the maximum number of sensors 7 and thus reduce data throughput. On the other hand, the edge slope must not be too steep because this leads to intensified electromagnetic emission. Two variables that greatly influence the behavior of the synchronization pulse P.sub.sync are the bus load and the quiescent current of sensor 7 or of the sensors. Different bus and sensor configurations exhibit greatly different loads and quiescent currents. A regulation of the bus current I.sub.Bus or bus voltage U.sub.Bus is carried out so that a synchronization pulse P.sub.sync can be prepared within the predefined limits Vu, Vo despite these large variations in bus load and quiescent current.

(15) Digital control application circuit 32 uses the information regarding the quiescent current I.sub.0 from a quiescent current regulator 10 of residual receiver circuit 3.3, and information regarding the maximum synchronization pulse amplitude reached, to regulate the synchronization pulse P.sub.sync. The knowledge of the quiescent current is used to ensure correct acquisition of the quiescent current, at the start of the synchronization pulse P.sub.sync, by current source 3.5 and current sink 3.6 of synchronization pulse generator 30. Synchronization pulse generator refers to voltage generator 30, which generates the synchronization pulse P.sub.sync and encompasses the at least one digital control application element 32, the at least one digital/analog converter 34, current source 3.5, current sink 3.6, and voltage supply 3.1 for current source 3.5. The maximum synchronization pulse amplitude is ascertained by evaluating the bus voltage U.sub.Bus. A decision threshold and a time window can be defined, for example, for evaluation of the bus voltage U.sub.Bus. Evaluation of the bus voltage U.sub.Bus, and a corresponding regulating action, ensure the desired shape of the synchronization pulse P.sub.sync between the starting point and end point of the synchronization pulse P.sub.sync. The regulating action does not ensure, however, that the bus voltage U.sub.Bus to which the synchronization pulse P.sub.sync is set is correctly acquired by voltage generator 30 that generates the synchronization pulse P.sub.sync. For this, embodiments of the present invention use evidence regarding the quiescent voltage or quiescent current on bus 5, as well as a regulating action that minimizes the inaccuracies in the sensing of the quiescent voltage or quiescent current and in the subsequent application of control to the charging and discharging current sources or to current source 3.5 and current sink 3.6 of voltage generator 30.

(16) Automatic regulation of the quiescent current, which is present-day existing art, provides an indication of the quiescent current. This information is used by voltage generator 30 to generate the synchronization pulse P.sub.sync in order to correctly acquire the quiescent current with the charging or discharging current sources or current source 3.5 and current sink 3.6. The information regarding the present quiescent current is furnished by quiescent current regulator 10, which is disposed in the remaining receiver circuit 3.3 block. Because voltage generator 30 for generating the synchronization pulse P.sub.sync, and quiescent current regulator 10, are mutually independent, the current sensed by quiescent current regulator 10 can differ from the current generated by voltage generator 30. This situation is depicted in the subsequent illustrations.

(17) FIG. 3 shows the change in the bus voltage U.sub.Bus of the synchronization pulse P.sub.sync.sub._.sup.pO, and FIG. 4 the corresponding change in the bus current I.sub.Bus, when the synchronization current I.sub.sync.sub._.sup.g is greater than the quiescent current at the time of acquisition. Because the charging current I.sub.sync.sub._.sup.g from voltage generator 30 is greater than the quiescent current, the synchronization pulse P.sub.sync.sub._.sup.pO ends at a higher value than the quiescent voltage, so that the synchronization pulse P.sub.sync.sub._.sup.pO exhibits, at the end, a positive voltage difference U.sub.diff or a positive voltage offset.

(18) FIG. 5 shows the change in the bus voltage U.sub.Bus of the synchronization pulse P.sub.sync.sub._.sup.nO, and FIG. 6 the corresponding change in the bus current I.sub.Bus, when the synchronization current I.sub.sync.sub._.sup.k is less than the quiescent current at the time of acquisition. Because the charging current I.sub.sync.sub._.sup.k from voltage generator 30 is less than the quiescent current, the synchronization pulse P.sub.sync.sub._.sup.nO ends at a lower value than the quiescent voltage, so that the synchronization pulse P.sub.sync.sub._.sup.nO exhibits, at the end, a negative voltage difference U.sub.diff or a negative voltage offset.

(19) In the depictions of FIGS. 7 and 8, the quiescent current has been correctly acquired from the charging and discharging sources or from current source 3.5 and current sink 3.6 of voltage generator 30, and both the current curve and the voltage curve of the synchronization pulse P.sub.sync are free of offsets.

(20) In FIGS. 3 to 6, the synchronization pulse P.sub.sync pO or synchronization pulse P.sub.sync nO begins at a voltage that corresponds approximately to the quiescent voltage and as a rule does not exhibit any appreciable offset. The reason why this is observed is that the bus capacitance integrates the current I.sub.Bus on bus 5, and brief dips or rises in the current are represented in smoothed fashion in the voltage. The offset voltage is therefore most clearly apparent at the end 12 of the synchronization pulse P.sub.sync. In order to make possible the situation in FIGS. 7 and 8, the pulse voltage is therefore monitored in the circled region, i.e. toward the end 12 of the synchronization pulse P.sub.sync, and is continuously compared with the supply voltage for the receiver. If the pulse voltage differs from the supply voltage, the application of control to digital/analog converter 34 by digital control application circuit 32 of voltage generator 30 is correspondingly adapted.

(21) Embodiments of the method according to the present invention for generating a synchronization pulse P.sub.sync for synchronizing a subsequent signal transfer between receiving assemblage 3 and at least one sensor 7 via a data bus 5 in a vehicle generate the synchronization pulse P.sub.sync within predefined specification limits Vo, Vu with a predefined shape and a predefined time-related behavior. At the beginning of the signal transfer between the at least one sensor 7 and receiver assemblage 3, the synchronization pulse P.sub.sync is transferred from receiver assemblage 3 to the at least one sensor 7. The synchronization pulse P.sub.sync is generated substantially as a sinusoidal oscillation. According to the present invention, a voltage value at the end 12 of the synchronization pulse P.sub.sync is compared with a corresponding voltage value of a supply voltage of a second voltage source 3.2 of residual receiver circuit 3.3 and a voltage difference U.sub.diff is ascertained, control being applied to current source 3.5 and to current sink 3.6 as a function of the ascertained voltage different U.sub.diff in such a way that the ascertained voltage difference U.sub.diff drops below a predefined threshold value.