Abstract
The present invention relates to an operational amplifier, including: a symmetrical differential amplifier; a local common mode feedback circuit coupled to the symmetrical differential amplifier; a tail current source circuit including at least one first transistor and a second transistor and a current source resistor. The tail current source circuit is configured to adjust a control voltage of the first transistor by using the second transistor such that a predetermined reference current flows through a load path of the first transistor.
Claims
1. Operational amplifier, comprising: a symmetrical differential amplifier; a local common mode feedback circuit coupled to the symmetrical differential amplifier; a tail current source circuit comprising at least one first transistor and a second transistor and a current source resistor, wherein the tail current source circuit is configured to adjust a control voltage of the first transistor by using the second transistor such that a predetermined reference current flows through a load path of the first transistor, wherein a load path of the transistor is a path between a sink and a source of the transistor, wherein a control terminal of the second transistor is coupled to a sink terminal of the first transistor, and wherein a source terminal of the second transistor is coupled to the current source resistor, wherein the control voltage of the first transistor and a voltage applied across the current source resistor are correlated with each other; wherein a tail current of the symmetrical differential amplifier is based on a current flow through a load path of the second transistor and wherein the current flow through the load path of the second transistor is based on a current flow through the current source resistor, wherein the tail current source circuit comprises a third transistor between the current source resistor and the control terminal of the first transistor, wherein a source terminal of the first transistor and one end of the current source resistor are both connected to a ground of the operational amplifier, wherein a sink terminal of the second transistor is coupled to the symmetrical differential amplifier, wherein a sink terminal of the third transistor is coupled to the control terminal of the first transistor, a source terminal of the third transistor is coupled to the current source resistor and the source terminal of the second transistor, wherein the sink terminal of the third transistor receives a current flow originating from the same source as the reference current, and the source terminal of the second transistor, and a control terminal of the third transistor is coupled to the control terminal of the first transistor to counteract, in particular to reduce, a voltage drop across the current source resistor, wherein the local common mode feedback circuit comprises at least two resistors and the current source resistor is selected of a same type as the resistors of the local common mode feedback circuit, wherein of the same type means that the current source resistor comprises the same temperature coefficients and/or the same process variations and/or the same orientations in the geometrical configuration of the operational amplifier as the resistors of the local common mode feedback circuit.
2. Operational amplifier according to claim 1, wherein the control voltage of the first transistor and the voltage applied across the current source resistor are selected in a predetermined relation to one another, such that the control voltage of the first transistor and the voltage applied across the current source resistor are equal or differ by a gate-source voltage of the third transistor.
3. Operational amplifier according to claim 1, wherein the third transistor is coupled to the first transistor and the current source resistor to control a voltage drop across the current source resistor and/or to compensate temperature variations of other devices of the operational amplifier, in particular the first transistor.
4. Operational amplifier according to claim 1, wherein the tail current of the symmetrical differential amplifier is determined by the current flow through the load path of the second transistor and is in particular equal to the same.
5. Operational amplifier according to claim 1, wherein at least part of the current flowing through the current source resistor flows through the load path of the third transistor or wherein at least the predetermined reference current flows through the load path of the third transistor.
6. Operational amplifier according to claim 1, wherein the symmetrical differential amplifier is replaced by a normal operational amplifier.
7. Method for operating an operational amplifier, in particular according to claim 1, the method comprising: providing a symmetrical differential amplifier, a common mode feedback circuit and a tail current source circuit; coupling the local common mode feedback circuit to the symmetrical differential amplifier; coupling the tail current source circuit to the local common mode feedback circuit, wherein the tail current source circuit comprises at least a first transistor and a second transistor and a current source resistor, wherein the tail current source circuit is configured to adjust a control voltage of the first transistor by using the second transistor, such that a predetermined reference current flows through a load path of the first transistor, wherein a load path of the transistor is a path between a sink and a source of the transistor, wherein a control terminal of the second transistor is coupled to a sink terminal of the first transistor, and wherein a source terminal of the second transistor is coupled to the current source resistor, wherein the control voltage of the first transistor and a voltage applied across a current source resistor are correlated with each other; wherein a tail current of the symmetrical differential amplifier is based on a current flow through a load path of the second transistor and wherein the current flow through the load path of the second transistor is based on a current flow through the current source resistor, wherein the tail current source circuit comprises a third transistor between the current source resistor and the control terminal of the first transistor, wherein a source terminal of the first transistor and one end of the current source resistor are both connected to a ground of the operational amplifier, wherein a sink terminal of the second transistor is coupled to the symmetrical differential amplifier, wherein a sink terminal of the third transistor is coupled to the control terminal of the first transistor, a source terminal of the third transistor is coupled to the current source resistor and the source terminal of the second transistor, wherein the sink terminal of the third transistor receives a current flow originating from the same source as the reference current and a control terminal of the third transistor is coupled to the control terminal of the first transistor to allow reducing a voltage drop across the current source resistor wherein the local common mode feedback circuit comprises at least two resistors and the current source resistor is selected of a same type as the resistors of the local common mode feedback circuit, wherein of the same type means that the current source resistor comprises the same temperature coefficients and/or the same process variations and/or the same orientations in the geometrical configuration of the operational amplifier as the resistors of the local common mode feedback circuit.
8. Method according to claim 7, wherein an operating point of the third transistor is selected such that a temperature dependency of the current source resistor is compensated during operation of the operational amplifier, in that a current flowing through the third transistor originates from the same current source as the reference current, wherein the same variations can occur in both currents.
9. Method according to claim 7, wherein the current flow through the devices of the tail current source circuit is regulated such that variations, in particular temperature and/or process variations of the local common mode feedback circuit are compensated, in that variations of the resistors of the local common mode feedback circuit are compensated by introducing the current source resistor.
10. Method according to claim 7, wherein a temperature variation of the operational amplifier caused by an operating state of a differential transistor allocated to the symmetrical differential amplifier is compensated by regulating an operating state of the third transistor.
11. Method according to claim 7, wherein a temperature variation and/or a process variation of the operational amplifier caused by an operating state of the first transistor is compensated by selecting the operating state in particular the third transistor is operated in.
12. Method according to claim 7, wherein an operational amplifier is operated, the operational amplifier comprising: a symmetrical differential amplifier; a local common mode feedback circuit coupled to the symmetrical differential amplifier; a tail current source circuit comprising at least one first transistor and a second transistor and a current source resistor, wherein the tail current source circuit is configured to adjust a control voltage of the first transistor by using the second transistor such that a predetermined reference current flows through a load path of the first transistor, wherein a load path of the transistor is a path between a sink and a source of the transistor, wherein a control terminal of the second transistor is coupled to a sink terminal of the first transistor, and wherein a source terminal of the second transistor is coupled to the current source resistor, wherein the control voltage of the first transistor and a voltage applied across the current source resistor are correlated with each other; wherein a tail current of the symmetrical differential amplifier is based on a current flow through a load path of the second transistor and wherein the current flow through the load path of the second transistor is based on a current flow through the current source resistor, wherein the tail current source circuit comprises a third transistor between the current source resistor and the control terminal of the first transistor, wherein a source terminal of the first transistor and one end of the current source resistor are both connected to a ground of the operational amplifier, wherein a sink terminal of the second transistor is coupled to the symmetrical differential amplifier, wherein a sink terminal of the third transistor is coupled to the control terminal of the first transistor, a source terminal of the third transistor is coupled to the current source resistor and the source terminal of the second transistor, wherein the sink terminal of the third transistor receives a current flow originating from the same source as the reference current, and the source terminal of the second transistor, and a control terminal of the third transistor is coupled to the control terminal of the first transistor to counteract, in particular to reduce, a voltage drop across the current source resistor, wherein the local common mode feedback circuit comprises at least two resistors and the current source resistor is selected of a same type as the resistors of the local common mode feedback circuit, wherein of the same type means that the current source resistor comprises the same temperature coefficients and/or the same process variations and/or the same orientations in the geometrical configuration of the operational amplifier as the resistors of the local common mode feedback circuit.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0042] Embodiments of the present invention will be detailed subsequently referring to the appended drawings, in which:
[0043] FIG. 1 is a circuit of a current source with a current mirror,
[0044] FIG. 2 is a circuit of a current source of an operational amplifier coupled to a tail resistor,
[0045] FIG. 3 is a circuit of a current source with regulated cascode,
[0046] FIG. 4 is a circuit of a proposed regulated cascode to be used (tail current source circuit) with level-shift according to two variations A (FIG. 4A) and B (FIG. 4B),
[0047] FIG. 5 is a circuit of a differential pair,
[0048] FIG. 6 is a circuit of an operational amplifier,
[0049] FIG. 7 is a superposition of the normalized GBW characteristics (gain-product-bandwidth=GBW) to different circuits as well as GBW characteristics of a proposed operational amplifier,
[0050] FIG. 8 is a superposition course of an ORG (open loop gain=gm*Rout) for different current source circuits and a differential pair,
[0051] FIG. 9 is a superposition of GBW characteristics for different current source circuits and a differential pair,
[0052] FIG. 10 is a superposition of GBW characteristics for different circuits of a symmetrical operational amplifier with different current source circuits,
[0053] FIG. 11 is a superposed course of an OLG (open loop gain=gm.sub.dp*gm.sub.drive*R.sub.LCMFB*R.sub.out for different circuits of a symmetrical operational amplifier with different current source circuits, and
[0054] FIG. 12 is a method for operating a proposed operational amplifier.
DETAILED DESCRIPTION OF THE INVENTION
[0055] The principle of the teaching described herein will be illustrated in more detail below based on possible embodiments, wherein the detailed description of individual embodiments is no limitation of the teaching described herein.
[0056] Advantages of the proposed operational amplifier will be described below together with FIGS. 1 to 12. FIGS. 1 to 3 and 5 show circuits known from conventional technology that can be applied in operational amplifiers. FIGS. 4A-B show regulated cascodes with level-shift that can be used in the proposed operational amplifier according to FIG. 6. FIG. 6 shows, in combination with FIGS. 4 and 5, possible proposed circuits of the operational amplifier and FIG. 7 shows determined GWB characteristics of the proposed operational amplifier compared to circuits for operational amplifiers known from conventional technology. FIGS. 8 and 9 show OLG and GWB characteristic curves for a differential pair, while FIGS. 10 and 11 show OLG and GWB characteristic curves for a symmetrical differential operational amplifier. In combination with FIGS. 1 to 11, the significance of the technical teaching described herein becomes obvious. FIG. 12 describes a method for operating the proposed operational amplifier.
[0057] The principle of the teaching disclosed herein is described for a symmetrical operational amplifier. However, for a person skilled in the art, it is obvious that the principles described herein can also be applied to normal operational amplifiers. By the simple usage of the circuit according to FIG. 4, for example, the variations of the OLG of the circuit of FIG. 5 can also be improved. In the parameter GBW, the variations in the normal operational amplifier do not deteriorate significantly. However, when using an OPA with LCMFB circuits, the parameters GBW, OLG, SR, etc. are extremely improved by the LCMFB circuit, such that for these amplifiers, a technical advantage results by applying the teachings descried herein.
[0058] FIG. 1 shows a structure of a circuit of a current mirror 10. The current mirror 10 includes two transistors 12. The control terminals of the transistors 12 are coupled to a reference current source 14 providing a reference current I.sub.ref. A sink terminal of one of the two transistors 12 is coupled to a tail current source wherein a tail current I.sub.tail and a reference current I.sub.ref flow through the tail current source circuit 140 according to FIG. 1.
[0059] FIG. 2 shows a tail current source circuit 140 configured as symmetrical operational amplifier 120 with a reference current source 14. A reference voltage V.sub.ref and a reference current I.sub.ref are provided at the inputs of the operational amplifier 120. The circuit according to FIG. 2 comprises a tail resistor R.sub.tail coupled to a control loop 50. The operational amplifier 120 and a transistor 12 are coupled via the control loop 50. A source terminal of the transistor 12 is connected to an input of the operational amplifier and an output of the operational amplifier 120 is connected to a control terminal of the transistor 12. Further, the tail current source circuit 140 is connected to a source terminal of the transistor 12. Process variations of the resistor can be compensated by the circuit according to FIG. 2.
[0060] FIG. 3 shows a circuit of a tail current source circuit 140 configured as regulated cascode. The tail current source circuit 140 according to FIG. 3 comprises at least one first transistor M.sub.reg and a second transistor M.sub.casc and a current source resistor R.sub.tail. The tail current source circuit 140 is configured to adjust a control voltage of the first transistor M.sub.reg by using the second transistor M.sub.casc such that predetermined reference current I.sub.ref flows through a load path of the first transistor M.sub.reg. For this, a control terminal of the second transistor M.sub.casc is coupled to a sink terminal of the first transistor M.sub.reg, and a source terminal of the second transistor M.sub.casc is coupled to the current source resistor R.sub.tail. A control voltage of the first transistor M.sub.reg and a voltage applied across the current source resistor R.sub.tail are correlated with each other; wherein a tail current I.sub.tail of the differential amplifier is based on a current flow through a load path, for example, a drain source path of the second transistor M.sub.casc. Current flow through the load path of the second transistor M.sub.casc is based on a current flow through the current source resistor R.sub.tail.
[0061] FIGS. 4A and 4B each show an example of a tail current source circuit 140 configured as regulated cascode with level-shift. In contrary to the tail current source circuit shown in FIG. 3, the tail current source circuit of FIGS. 4A and 4B each comprise a third transistor M.sub.M between the current source resistor R.sub.tail and the control terminal of the first transistor M.sub.reg Thereby, a voltage drop across the current source resistor R.sub.tail can be counteracted. In particular, the voltage drop can be reduced. As indicated in FIG. 4A, a current corresponding to a sum of reference current I.sub.ref of a reference current source and a tail current I.sub.tail of a tail current source flows through the current source resistor R.sub.tail. From FIGS. 4A and 4B, it can be seen that the sink terminal of the second transistor M.sub.casc is each coupled to the tail current source, such that the tail current I.sub.tail flows through the second transistor M.sub.casc. Further, it can be seen from those figures that the sink terminal of the first and third transistor M.sub.reg and M.sub.M is each coupled to a reference current source providing a reference current I.sub.ref or k*I.sub.ref, wherein k can be a real number.
[0062] FIG. 4A, B each show tail current source circuits 140 compensating the process variations at least partly, when the tail current source in a common operational amplifier is replaced by another proposed current feeding tail current source circuit 140 according to FIG. 4A, B.
[0063] FIG. 5 shows a circuit of an operational amplifier in the form of a differential pair 150. Differential pairs are frequently dimensioned for an operating mode MI. However, a differential can be operated in so-called low power applications in the operating mode WI. The circuit according to FIG. 5 includes two differential transistors M.sub.dp that are coupled to one another and to a local common mode feedback circuit (LCMFB circuit) 120 as well as a tail current circuit 140. Further, the circuit according to FIG. 5 comprises two voltage inputs V.sub.in, p and V.sub.in, n as well as two voltage outputs V.sub.out, n and V.sub.out, p.
[0064] FIG. 6 shows a proposed operational amplifier in the form of a symmetrical differential amplifier 100. The operational amplifier includes a local common mode feedback circuit 120 and a tail current source circuit 140. The circuit according to FIG. 6 can be considered, for example, as combination of the circuits according to FIGS. 5 and 4A or 4B, wherein the outputs V.sub.in, p and V.sub.in, n of the operational amplifier are provided at a different position. Additionally, the operational amplifier according to FIG. 6 comprises four further transistors M.sub.drive and M.sub.out as well as two further resistors R.sub.CM. The further transistors and resistors of the operational amplifier can be the basis of occurring temperature and/or process variations which can, however, be reduced or, in the sense of the present disclosure, be compensated by means of a tail current source circuit 140 according to one of FIG. 4A or 4B in connection with the usage of a common mode feedback circuit 120. It is obvious that temperature and/or process variations of the operational amplifier can occur.
[0065] In FIGS. 7 to 11, the shown calculated GBW characteristics or OLG characteristics are each illustrated for a temperature of T.sub.min=−40° C. or T.sub.max=+120° C. and for a maximum total resistor R.sub.max or minimum total resistor R.sub.min. The resistors R.sub.max, R.sub.min are predetermined by the manufacturer of a chip by which the respective circuit is implemented. Further, the resistors R.sub.max, R.sub.min are process-dependent values. If, for example, the process SLOW is indicated in a simulation, the resistance is set according to the specifications. The graphs in FIGS. 7 to 11 are consequently shown for the values {T.sub.min, R.sub.min}, {T.sub.min, R.sub.max}, {T.sub.max, R.sub.min} and {T.sub.max, R.sub.max} as outlined in the drawings. The determined GBW characteristics or OLG characteristics for the predetermined values {T.sub.min, R.sub.min} are shown on the x-axis at [0.0, 4.0], for the values {T.sub.min, R.sub.max} at [4.0, 8.0], for the values {T.sub.max, R.sub.min} at [8.0, 12.0], and for the values {T.sub.max, R.sub.max} at [12.0, 16.0] (cf. Table 1). Temperatures between the minimum temperature T.sub.min and the maximum temperature T.sub.max as well as resistors between the minimum resistor R.sub.min and the maximum resistor R.sub.max correspond to possible variations of the temperature or the resistor as they can occur during operation of an operational amplifier. Further, the signal shown in FIGS. 7 to 11 can be influenced by residual ripple caused by the transistors of the operational amplifier.
[0066] In the following table 1, the conditions under which the individual determined values as shown in FIGS. 7 to 11 have been determined are summarized. The abbreviation FF stands for fast-fast, SS for slow-slow, SF for slow-fast and FS for fast-slow. Basically, S stands for slow and F for fast.
TABLE-US-00001 TABLE 1 Resistor Operating Transistor Operating Temperature Iteration [no.] Mode Mode [° C.] 0 S SS −40 1 S SF −40 2 S FS −40 3 S FF −40 4 F SS −40 5 F SF −40 6 F FS −40 7 F FF −40 8 S SS 120 9 S SF 120 10 S FS 120 11 S FF 120 12 F SS 120 13 F SF 120 14 F FS 120 15 F FF 120
[0067] The curve 81 shown in FIG. 7 shows the determined and normalized GBW characteristics of a symmetrical operational amplifier without LCMFB circuits (circuit not illustrated). The y-axis of FIG. 7 shows a deviation of GBW in percent from the nominal value determined at a temperature of 27° C. Curve 81 shows that the normalized GBW characteristics at T.sub.min move between 0 and −5, while the GBW characteristics for T.sub.max move between −20 and −25. The process variations in a common operational amplifier without LCMFB circuit are therefore proportional to ±15. The curve 81 has been determined without temperature influence. However, a current supply would show a temperature influence.
[0068] The curve 72 shown in FIG. 7 shows the determined and normalized GBW characteristics of an operational amplifier with LCMFB circuit as shown, for example, in FIG. 6. However, the operational amplifier does not include any tail current source circuit. It can be seen in curve 72 that the normalized GBW characteristics at T.sub.min move between 0 and 50, while the GBW characteristics for T.sub.max move between 0 and −40. The process variations in an operational amplifier with LCMFB circuits but without tail current source circuits are therefore proportional to ±50%. Therefore, the LCMFB circuit operates without compensation of process variations. In an operational amplifier 100 with LCMFB circuit 120, all components vary, wherein the resistor or the resistors R.sub.LCMFB of the LCMFB circuit is/are responsible for approximately half of the process variations. A large part of the process variations or the variations can be attributed to a temperature development in the operational amplifier.
[0069] The GBW characteristics 71, 72 of the operational amplifiers determined and normalized in FIG. 7 are further shown in superposition with determined and normalized GBW characteristics 73, 74 of the proposed operational amplifiers, each including an LCMFB circuit and a proposed tail current source circuit. The characteristics of the curve 71 have been acquired with a resistor R.sub.LCMFB equal 0 and separate gate controls of Wad, i.e., a common symmetrical amplifier as described in Sansen, 2008, “Analog design essentials” and the characteristics of the curve 72 have been acquired with a resistor R.sub.LCMFB unequal 0. The values in FIG. 7 by which the curves 73 and 74 have been determined show the determined and normalized GBW characteristics of an operational amplifier by using one of the circuits according to FIG. 6 with the current source circuits of FIG. 2 or 4. The curve 73 shows the GBW characteristics of an operational amplifier with LCMFB circuits wherein a current mirror of the tail current source has been replaced by a resistor R.sub.tail and a control loop 50 according to FIG. 2. The curve 74 shows the GBW characteristics of the proposed operational amplifier with LCMFB circuit, wherein the current mirror of the tail current source has been replaced by a regulated cascode with cascode resistor R.sub.tail, wherein the cascode or also tail current source circuit comprises a first transistor M.sub.reg, a second transistor M.sub.casc and a third transistor M.sub.lvl.
[0070] Both curves 73 and 74 show process variations of the same order, in particular, curve 74 shows a process variation of ±18%. From the course of curve 74, it can be derived that a good compensation of the process variations can be obtained by the tail current source circuit. In particular, the tail current source circuit obtains a process variation that is almost as low as the one obtained with the control loop 50. The variations in the proposed modified operational amplifier are mainly due to the fact that the modified operational amplifier has almost two stages due to the LCMFB circuit.
[0071] FIG. 8 shows a comparison of determined courses of OLG values (Open loop gain=gm*R.sub.out) for different current source circuits according to the circuits of one of FIGS. 1 to 4, and a differential pair according to FIG. 5. The OLG values can be determined by the relation OLG=gm*R.sub.out, wherein gm is the already described current-voltage characteristic and R.sub.out describes an output resistor of the circuit. The OLG values illustrated in FIG. 8 are each averaged values that are indicated on the x-axis with respect to different temperatures and resistors as illustrated in FIG. 8 and as can be seen in Table 1. The curve 81 in FIG. 8 represents the OLG values for a differential pair according to FIG. 5 with a current mirror according to FIG. 1. The curve 82 in FIG. 8 represents the OLG values for a differential pair according to FIG. 5 with a current source according to FIG. 2. The curve 83 in FIG. 8 represents the OLG values for a differential pair according to FIG. 5 with a current source with regulated cascode according to FIG. 3. The curve 84 in FIG. 8 represents the OLG values for a differential pair according to FIG. 5 with a current source with regulated cascode with level-shift according to FIG. 4A, B. The y-axes of FIGS. 8 to 11 each show averaged OLG or averaged GBW values determined according to (OLG/OLG.sub.nom)−1 or (GWB/GWB.sub.nom)−1.
[0072] In the curves 82 to 84 in FIG. 8, a compensation of resistors R.sub.LCMFB of the local common mode feedback circuit (LCMFB circuit) can be seen. This is obvious, as the values compared to curve 91 are more on a horizontal curve than, for example, the values of curve 81. Compensation of the temperature variations of a threshold voltage of the differential pair V.sub.th,dp can only be partly compensated as can be seen from curves 82 and 83. However, a very good compensation of temperature variation is possible in the used circuit by which the curve 84 has been determined. This can be seen in that of the curves 81 to 84, the curve 84 is more on a horizontal curve around 0 than the curves 81 to 83. In other words, the influence of different temperatures and resistors is stable across a range between {R.sub.min, T.sub.min} to {R.sub.max, T.sub.max}. For a differential pair or a symmetrical differential amplifier according to FIG. 5, which is/are coupled to a current source circuit according to FIG. 4A, B, the temperature influence could be reduced from ±10% to ±3%.
[0073] FIG. 9 shows, for example, GBW characteristics of simple operational amplifiers OPA. The values illustrated in FIG. 9 also show that even for simple OPA, improvement can be obtained with a proposed circuit as has already been indicated at the beginning of the description of the figures in general. In detail, FIG. 9 shows a comparison of determined courses of GBW characteristics (GBW=gm/C) for different circuits of a differential pair according to FIG. 5 with different current source circuits according to FIGS. 1 to 4. The GBW values can be determined by the relation GBW=gm/C, wherein gm is the already described current-voltage characteristic and C describes a capacitance of the total circuit. The capacitance can be given, for example, by C.sub.load=200 fF. At a value of C.sub.load=200 fF, no variations with respect to process and temperature have been considered. Consequently, this value can be considered ideal.
[0074] The GBW values illustrated in FIG. 9 are each averaged values that are represented compared to different temperatures and resistors as illustrated on the x-axis. The curve 91 in FIG. 9 represents the GBW values for a differential pair according to FIG. 5 with a current mirror according to FIG. 1. The curve 92 in FIG. 9 represents the GBW values for a differential pair according to FIG. 5 with a current source according to FIG. 2. The curve 93 in FIG. 9 represents the GBW values for a differential pair according to FIG. 5 with a current source with regulated cascode according to FIG. 3. The curve 94 in FIG. 9 represents GBW values for a differential pair according to FIG. 5 with a current source with regulated cascode with level-shift according to FIG. 4A, B.
[0075] Of all curves represented herein, the curve 93 in FIG. 9 shows the greatest process variation. The normal regulated cascode amplifies the process variations of M.sub.dp, which can be seen in curve 93, for example, in small spikes, i.e., the scattering of the determined values that have been combined to the curve 93. This means that the temperature variation can also be somehow amplified. In the values forming the curve 92 on the other hand, only the additional influence of R.sub.tail becomes obvious.
[0076] In the curves 92 to 94, the resistor R.sub.tail varies with the respective process and can only be compensated to a small extent. In the curve 94, however, a temperature variation can be well compensated. In other words, in sum, curve 94 shows less absolute changes than the values of curve 91. It has been found out that process and/or temperature variations considered in an absolute manner are generally lower when the differential pair according to FIG. 5 coupled to a current source circuit is operated in the operating mode SI (strong inversion) according to FIG. 4A, B. Independent of the fact what operating mode the differential pair is operated in, the ratio of the variations to each other is maintained.
[0077] FIG. 10 shows a comparison of determined courses of GBW characteristics for different circuits according to FIGS. 1, 2, and 4, and for a symmetrical operational amplifier according to FIG. 6. The GBW values can be determined by the relation GBW=gm.sub.dp*gm.sub.drive*R.sub.LCMFB/C, wherein gm is the already described current-voltage characteristic of the differential pair dp or of symmetrical operational amplifiers (index “drive”), R.sub.LCMFB describes the resistors of the local common mode feedback circuit and C a capacitance of, for example, C.sub.load=200 fF of the total circuit. The GBW values illustrated in FIG. 10 are each averaged values that are represented compared to different temperatures and resistors as illustrated on the x-axis. The curve 101 in FIG. 10 represents the GBW values for symmetrical operational amplifiers according to FIG. 6 with a current mirror according to FIG. 1. The curve 102 in FIG. 10 represents the GBW values for symmetrical operational amplifiers according to FIG. 6 with a current source according to FIG. 2. The curve 104 in FIG. 10 represents the GBW values for symmetrical operational amplifiers according to FIG. 6 with a current source with regulated cascode with level-shift according to FIG. 4A, B.
[0078] It can be seen from FIG. 10 that compensation of the temperature and/or process variations by a factor of 1.83 has been obtained for the curve 104, i.e., starting from ±55%, the same have been reduced to ±30% when the transistor M.sub.dp is operated in the WI operating mode. Even when the transistor M.sub.dp is operated in the SI operating mode, the ratio of compensation of the temperature and/or process variation is maintained. In detail, with reference to temperature variations, it has been determined that in the values of curve 104, the transistor M.sub.M compensates the temperature influence of gm.sub.dp and also partly of gm.sub.drive, such that a temperature influence is almost completely compensated. Further, it has been determined that in the values of curves 102 to 104, the influence of the resistors R.sub.LCMFB is compensated by the resistors R.sub.tail With reference to process variation, it has been determined that in the curves 102 to 104, the resistor R.sub.LCMFB is compensated, in particular, slightly overcompensated. However, the influence of gm.sub.drive cannot be compensated in all curves 101 to 104. It has been determined that variations are generally lower when the transistors M.sub.dp are operated in the SI operating mode. Then, the occurring variations may be up to four times lower. The ratios, however, remain similar. In other words, an improvement can still be obtained.
[0079] FIG. 11 shows a comparison of determined curves of OLG values (Open loop gain==gm.sub.dp*gm.sub.drive*R.sub.LCMFB*R.sub.OUT) for different circuits according to FIGS. 1, 2, and 4 of a symmetrical operational amplifier according to FIG. 6. The OLG values can be determined by the relation OLG=gm.sub.dp*gm.sub.drive*R.sub.LCMFB*R.sub.OUT, wherein gm is the already described current-voltage characteristic of the differential pair dp or of the output transistor M.sub.drive (index “drive) and R.sub.LCFMB describes the resistors of the local common mode feedback circuit or R.sub.out is the output resistor formed by M.sub.drive and M.sub.out. The OLG values illustrated in FIG. 11 are each averaged values that are represented compared to different temperatures and process states of resistors and transistors as represented in Table 1 and illustrated on the x-axis. The curve 111 in FIG. 11 represents the OLG values for a symmetrical operational amplifier according to FIG. 6 with a current mirror according to FIG. 1. The curve 112 in FIG. 11 represents the OLG values for a symmetrical operational amplifier according to FIG. 6 with the current source according to FIG. 2. The curve 114 in FIG. 11 represents the OLG values for a symmetrical operational amplifier according to FIG. 6 with a current source with regulated cascode with level-shift according to FIG. 4A, B.
[0080] The values of curve 111 show temperature and process variations of ±16%, while the values of curve 114 only show temperature and process variations of ±7%. In other words, when using a symmetrical operational amplifier according to FIG. 6 and a current source circuit according to FIG. 4A, B, the occurring variations can be improved by a factor 2.28. In detail, with reference to temperature variations, it could be determined that with a circuit generating a curve 114, the transistor M.sub.M compensates the amount gm.sub.dp. Further, it has been determined that in curves 111 to 114 in FIG. 11, an influence of gm.sub.drive and R.sub.cm can only be compensated to a small extent. With reference to process variations, it could be determined that in circuits by which the values of curves 112 and 114 have been determined, the resistor R of the circuits has been compensated by the influence of gm.sub.drive has remained visible in all curves 111 to 114. Further, it has been determined that the improvement, i.e., the compensation of temperature and/or process variations is lower when the transistors M.sub.dp are operated in SI operating mode, but compensation still exists. Starting from variations of ±16% of the values of curve 111, in the values of curve 114, only a variation of ±11% has been determined, i.e., a compensation of the variations of ±5% could be obtained in the SI operating mode.
[0081] FIG. 12 shows schematically a method for operating the proposed operation amplifier in step 121. The method includes providing a symmetrical differential amplifier, providing a common mode feedback circuit (LCMFB circuit) and providing a tail current source circuit in step 122. Further, the method includes coupling the local common mode feedback circuit (LCMFB circuit) to the symmetrical amplifier that has been coupled to an LCMFB circuit in step 123 and coupling the tail current source circuit to the local common mode feedback circuit (LCMFB circuit) in step 124, wherein the tail current source circuit includes at least a first transistor M.sub.reg and a second transistor M.sub.casc and a current source resistor R.sub.tail, wherein the tail current source circuit is configured to adjust a control voltage of the first transistor M.sub.reg by using the second transistor M.sub.casc such that a predetermined reference current I.sub.ref flows through a load path of the first transistor M.sub.reg. A control terminal of the second transistor M.sub.casc is coupled to a sink terminal of the first transistor M.sub.reg, and a source terminal of the second transistor M.sub.casc is coupled to the current source resistor R.sub.tail. The control voltage of the first transistor M.sub.reg and a voltage applied across the current source resistor R.sub.tail are correlated with each other, wherein a tail current I.sub.tail of the symmetrical differential amplifier is based on a current flow through a load path, i.e., a drain-source path of the second transistor M.sub.casc. The current flow through the load path of the second transistor M.sub.casc is based on a current flow through the current source resistor R.sub.tail. Further, the tail current source circuit includes a third transistor M between the current source resistor R.sub.tail and the control terminal of the first transistor M.sub.reg. Further, the method includes a step of reducing a voltage drop across the current source resistor R.sub.tail in step 125. With the method described herein, the already described compensations of the variations can be obtained. The compensations described herein can be obtained by providing the tail current source circuit described herein. The configuration of the tail current source circuit will not be described in detail again with reference to the method. Rather, reference is made to the statements with respect to the apparatus in order to avoid redundancies. In particular, reference is made to the description of the tail current source circuit.
[0082] When combining the figures, it can be summarized that process variations of the resistors R.sub.LCMFB can be reduced when using a current source circuit according to FIG. 2 or FIG. 3. When using a symmetrical operational amplifier according to FIG. 6 with a resistor load, temperature and process variations can be reduced. Such a symmetrical operational amplifier can be used in many operational amplifier structures with common mode feedback circuits (LCMFB circuit). For example, the teaching proposed herein can be applied in the circuits described in the publications of GARDE, M. Pilar, et al. Super class-AB recycling folded cascode OTA. IEEE Journal of Solid-State Circuits, 2018, Vol. 53, No. 9, p. 2614-2623 or of LOPEZ-MARTIN, Antonio, et al. On the Optimal Current Followers for Wide-Swing Current-Efficient Amplifiers. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2018. p. 1-5 or of ZHAO, Xiao, et al. Transconductance and slew rate improvement technique for current recycling folded cascode amplifier, AEU-International Journal of Electronics and Communications, 2016, vol. 70, No. 3, p. 326-330. In the circuits disclosed in the stated publications, adaptive biasing structures can be omitted. It is possible that a tail current source circuits functions with or without adaptive biasing structures.
[0083] Even in a common differential pair with resistor load, compensations of the occurring variations could be observed. The technical teaching proposed herein obtains the temperature and/or process variations by wiring only a few transistors. In other words, only a small effort is needed when designing the circuit of the operational amplifier to obtain a measureable compensation of variations. In particular, it could be determined that the transistor M.sub.M compensates variations of the transistors M.sub.dp.
[0084] Although some aspects have been descripted in the context of an apparatus, it is obvious that these aspects also represent a description of the corresponding method, such that a block or device of an apparatus also corresponds to a respective method step or a feature of a method step. Analogously, aspects described in the context of a method step also represent a description of a corresponding block or detail or feature of a corresponding apparatus.
[0085] In the above detailed description, different features have partly been grouped in examples to streamline the disclosure. This type of disclosure is not to be interpreted with the intent that the claimed examples comprise more features than explicitly stated in each claim. Rather, as the following claims will reflect, the subject-matter can be comprised in less than all features of an individual disclosed example. Consequently, the following claims are herewith incorporated in the detailed description, wherein each claim can be seen as its own separate example. While each claim can stand as its own individual separate example, it should be noted that although dependent claims in the claims relate to a specific combination with one or several other claims, other examples also include a combination of dependent claims with the subject-matter of each other dependent claim or a combination of each feature with other dependent or independent claims. Such combinations are included, except where it is stated that a specific combination is not intended. Further, it is intended that also a combination of features of one claim with any other independent claim is included, even when this claim is not directly dependent on the independent claim.
[0086] While this invention has been described in terms of several advantageous embodiments, there are alterations, permutations, and equivalents, which fall within the scope of this invention. It should also be noted that there are many alternative ways of implementing the methods and compositions of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, permutations, and equivalents as fall within the true spirit and scope of the present invention.
