Adaptive dual stage identification control method for a power stage of a power converter

Abstract

A control method is provided for a power converter configured to generate an output voltage according to a control law controlling a power stage. The method comprises a dual stage identification process for identifying parameters of the power stage. The method includes, in a first stage, identifying at least one parameter of the power stage during ramp up of the power converter and adapting the control law to the identified at least one parameter of said power stage for operating the power converter. The method further includes, in a second stage, determining a response of the power stage; identifying at least one other parameter of the power stage by characterizing the response; and further adapting the control law according to a characteristic of the response.

Claims

1. A control method for a power converter configured to generate an output voltage according to a control law controlling a power stage, the method comprising: identifying at least one parameter of the power stage during ramp up of the power converter; adapting the control law to the identified at least one parameter of said power stage for operating said power converter; determining a response of the power stage; identifying at least one other parameter of the power stage by characterizing the response; and further adapting the control law according to a characteristic of the response, wherein the power stage comprises an inductor and an output capacitor, and wherein the at least one parameter of a component of the power stage to be identified is the capacitance C, and wherein the capacitance C is determined by measuring an average inductor current i.sub.L,AVG during ramp up time t and a voltage drop of said capacitance C at a start of the ramp up and at an end of the ramp up and computing C=i.sub.L,AVG*t/V, wherein V is a difference between a voltage drop of said capacitance C between the start of the ramp up and the end of the ramp up.

2. The control method according to claim 1 further comprising: continuously characterizing the response and continuously adapting the control law in response when operating the power converter.

3. The control method according to claim 1, wherein characterizing the response comprises determining a degree of matching between the response and an objective response by filtering the response to generate a filtered response and integrating a product of the filtered response and a delayed response.

4. The method according to claim 1, wherein further adapting the control law comprises adapting the control law such that the response matches the objective response.

5. The method according to claim 3, wherein the delayed response is delayed by one sample.

6. The method according to claim 3, wherein filtering the response comprises using an inverse filter of the objective response such that a response that exactly matches the objective response results in a zero output from the filter apart from a first sample of the filtered response.

7. The control method according to claim 1, wherein adapting the control law comprises re-parameterizing control parameters of the control law with respect to the identified parameter, and scaling control parameters according to a deviation of the identified parameter from an expected value of the at least one parameter of said power stage.

8. The control method according to claim 7, wherein adapting the control law further comprises normalizing the identified control parameter by the expected value of said control parameter for obtaining a normalized identified parameter and scaling control parameters according to a deviation of the normalized identified parameter from a normalized expected value of the at least one parameter of said power stage.

9. The control method according to claim 1, wherein said control law is defined by a transfer function having a plurality of zeros and poles and wherein said plurality of zeros and poles of said transfer function is determined on the basis of an expected value for the at least one parameter of said power stage prior to identifying the at least one parameter of the power.

10. The control method according to claim 9, wherein after determining the at least one parameter of the power stage, the plurality of zeros and poles of the transfer function is adapted according to the identified at least one parameter of the power stage.

11. The control method according to claim 10, wherein a gain or a zero or a pole of the transfer function is scaled according to deviation of the identified parameter from an expected value of the at least one parameter of said power stage.

12. The control method according to claim 1, wherein the average current i.sub.L,AVG is corrected by measuring average inductor current when ramp up has finished and subtracting said average inductor current measured after ramp up from the average inductor current during ramp up.

13. A power converter comprising a switched power stage controlled by a control law implemented by a compensator, means for identifying at least one parameter of said power stage during ramp-up of the power converter and means for adapting the control law of the compensator according to the identified at least one parameter of said power stage, wherein the means for adapting the control law comprise means for adapting, means for normalizing and means for scaling a parameter of the control law, the power converter further comprising means for determining a response of the stage; means for identifying at least one other parameter of the power stage by characterizing the response; and wherein the means for adapting for the control law comprise means for further adapting the control law according to a characteristic of the response, wherein the power stage comprises an inductor and an output capacitor, and wherein the at least one parameter of a component of the power stage to be identified is the capacitance C, and wherein the capacitance C is determined by measuring an average inductor current i.sub.L,AVG during ramp up time t and a voltage drop of said capacitance C at a start of the ramp up and at an end of the ramp up and computing C=i.sub.L,AVG*t/V, wherein V is a difference between a voltage drop of said capacitance C between the start of the ramp up and the end of the ramp up.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Reference will be made to the accompanying drawings, wherein

(2) FIG. 1 shows a DC-DC power converter and its output voltage and inductor during ramp-up;

(3) FIG. 2 shows the transfer function of a control law having two zeros and two poles;

(4) FIG. 3 shows the transfer function adjusted to different output capacitances;

(5) FIG. 4 shows Bode plots of the original and adjusted control law (compensator);

(6) FIG. 5 shows the output voltage, inductor current and average inductor current during soft ramp-up;

(7) FIG. 6 shows the response of a DC-DC power converter using an updated control law(compensator) adapted to the identified capacitance;

(8) FIG. 7 shows the load step responses; and

(9) FIG. 8 shows the load step response characterization system; and

(10) FIG. 9 shows vector u when a=0.5 (objective response);

(11) FIG. 10 shows vector y when a=0.5;

(12) FIG. 11 shows vector u when a=0.2;

(13) FIG. 12 shows vector y when a=0.2;

(14) FIG. 13 shows vector u when a=0.8;

(15) FIG. 14 shows vector y when a=0.8;

(16) FIG. 15 shows vector u when a=0.5;

(17) FIG. 16 shows vector y when a=0.5;

(18) FIG. 17 shows vector u resulting from a 2nd order impulse response;

(19) FIG. 18 shows vector y resulting from a 2nd order impulse response;

(20) FIG. 19 shows an automatically tunable compensator; and

(21) FIG. 20 shows the output voltage and inductor current of a buck converter with characterization turned on at 4.0 ms resulting in improved Load-Step response thereafter.

DETAILED DESCRIPTION OF THE INVENTION

(22) The present invention relates a dual stage identification process for identifying parameters of the power stage. In a first stage the bulk capacitance is identified during soft start of the power converter in order to pre-initialize compensator parameters. In a second stage other parameters of the power stage are identified by characterizing the load-step response and further the compensation according to the results is further adjusted.

(23) FIG. 1 shows a soft-start mechanism of a DC-DC converter comprising switched power stage 11, said power stage comprising an inductor 12 an output capacitor 13 and a compensator 14 implementing a control law for controlling the switches 15, 16 of the power stage 11. During the soft-start ramp-up the inductor current must charge the output capacitor 13. Load devices connected to the DC-DC converter are usually in active reset prior to the output voltage reaching its desired setpoint and, therefore, it can be assumed that they draw no current during the soft-start ramp up. As the total charge applied to the capacitor is proportional to the final voltage and its capacitance C, the capacitance C can be estimated as a function of the applied charge. The applied charge can easily be determined from the average current i.sub.L,AVG applied during the soft-start ramp and the ramp time (T), where V is the difference between the start-of-ramp and end-of ramp voltage. The estimated capacitance C is therefore:
C=i.sub.L,AVG*(T/V)

(24) The average current i.sub.L,AVG used in calculation can be corrected in circumstances where there is significant load current during the ramp up by measuring the current after the ramp has finished and subtracting this value from the average ramp current value.

(25) FIG. 2 shows the magnitude versus frequency and transfer function of a discrete time Type-3 compensator, implementing a 2-zero 2-pole plus integrator transfer function. The placement of the poles and zeros on the basis of known design equations for the expected values of power stage parameters, gives a desired starting point for operation of the control loop before parameter identification has been completed.

(26) The compensator has been re-parameterised in terms of the output capacitance so that scaling can be applied accordingly when a larger amount of capacitance is applied. This is illustrated in FIG. 3, where the full-line curves show the magnitude versus frequency of the power stage (line 31 a) and Loop Gain, L, (line 32 a) and indicates the expected loop behaviour. The dotted lines of FIG. 3 show how the same loop bandwidth can be achieved in a system with a larger amount of capacitance as illustrated in the dotted curve 31 b for the magnitude of the power stage and 32 b for the loop gain.

(27) Scaling can be achieved by moving the zeros of the compensator by a corresponding amount which results in the same loop bandwidth as the original system. That is, if the capacitance value quadruples then the LC bandwidth halves and the zero locations must half in frequency compared to their original values. In this way the compensator can utilize the estimated capacitance value to modify the compensation for optimal performance by the process of normalisation and scaling with respect to the output capacitance value, C.

(28) The adjustments are also illustrated in FIG. 4. It is apparent from the compensator adjustments (curves 41 a,b and 42 a,b), that the proportional and differential gains of a PID type may be equivalently adjusted.

(29) The soft-start of a DC-DC converter is illustrated in FIG. 5 FIG. 5a shows the output voltage, FIG. 5b the inductor current and FIG. 5c the averaged inductor current, as a function of time. The average inductor current at the end of the soft-start ramp is shown to peak indicating the capacitors are fully charged.

(30) In order to further illustrate the advantages of the invention FIG. 6 shows the power stage identification and control system of an exemplary DC-DC converter, whereby the capacitance is identified as being 4000 micro-Farads according to the average inductor current at the end of the soft-start ramp. In this case the loop has been compensated assuming 1000 micro-Farads. The identified capacitance value is updated after 6 ms. It can be seen that the transient response is improved by the identification of the output capacitance of the system.

(31) Returning to FIG. 5, it is apparent that no disturbance has been introduced into the control loop to identify the capacitance.

(32) Hence, the combination of capacitance identification and a simple means of compensation adjustment from a pre-determined compensator conveys significant advantages in the performance and cost of a DC-DC converter and serves as advantageous pre-stage to an even more sophisticated identification process.

(33) The second stage of the dual stage identification process makes use of the load step response. The load-step response is a very important dynamic characteristic of DC-DC converters, but the response is dependent on both the loop gain/phase and the open-loop output impedance of the converter. Although the loop gain/phase alters the closed-loop output impedance, converters with similar loop characteristics may have different load-step responses. Therefore an approach based on characterizing the shape of the load-step response is advantageous compared to methods that characterize the loop bandwidth/phase-margin.

(34) In order to characterize the load-step response it is necessary to have an objective load-step response that represents the desired response. The characterization method identifies the salient features of the load-step response in comparison to the objective load-step response. Bearing in mind, that the magnitude of the response varies with load-step magnitude and edge-rate for example, a method involving some function of the difference, i.e. subtraction, between the response and the objective response would be problematic. Referring to FIG. 7, the objective load step (a) represents the characteristics of the desired response; the under-damped (b) and over-damped (c) responses are shown for comparison.

(35) In order to characterise the load-step response and quantify how well it matches the objective response the load step response (u), is applied to filter 81 as shown in FIG. 8.

(36) The filtered load step response is multiplied, see stage 83, by the load-step response and integrated by integrator 84 in order to ascertain the degree of matching between the load step response and the objective load step response.

(37) A delay 82 is required to remove the first sample from the filter. The filter may be designed as an inverse filter of the objective load-step response such that a load-step response that exactly matches the objective response results in a zero output from the filter, neglecting the first sample, and therefore the integral of the product of the filtered and original load step response is zero.

(38) For example, considering an objective load step response represented by the vector u (FIG. 9), where u=[1, a, a.sup.2, a.sup.3, . . . , a.sup.n], applied to a filter whose impulse response is vector h where h=[1, a]. The resulting signal from the filter is vector y (FIG. 10), where y=u. h and therefore y=[1, a-a, a.sup.2-a.sup.2, a.sup.3-a.sup.3, . . . , a.sup.n-a.sup.n] which simplifies to y=[1, 0, 0, 0, . . . , 0]. Assuming zero valued signals apriori, delaying u by one sample yields u where u=[0, 1, a, a.sup.2, a.sup.3, . . . , a.sup.n] and the result of the integral of the product is therefore v, where v=u. y=0.

(39) Now considering u=[1, b, b.sup.2, b.sup.3, . . . , b.sup.n] applied to a filter whose impulse response is vector h where h=[1, a]. The resulting signal from the filter is y=[1, b-a, b.sup.2-ab, b.sup.3-ab.sup.2, . . . , b.sup.n-ab.sup.n-1]. When b>a, the vector y simplifies to a vector of positive values (neglecting the first value), and the result of the integral of the product is therefore positive (FIG. 13, FIG. 14). When b<a, the vector y simplifies to a vector of negative values (neglecting the first value), and the result of the integral of the product is therefore negative (FIG. 11, FIG. 12).

(40) Negative values of the parameter a model an oscillatory response (FIG. 15), which results in a vector y (FIG. 16), whose integral of the product (neglecting the first value), is negative.

(41) Therefore it is clear that the proposed characterisation system yields a value whose magnitude and sign is a measure of matching between the response and the objective response with a zero result value for an exact match to the objective response, a positive result value when a is greater than the desired value and a negative result when a is less than the desired value or negative.

(42) A simple two-tap (first order) FIR filter has been considered for clarity of explanation but it is clear that higher order FIR filters or IIR filters may be employed to characterise higher order objective responses. For example the objective response vector equal to the impulse response of a filter whose transfer function is (1-0.1z.sup.1)/(1-1.3z.sup.1+0.36z.sup.2) is illustrated in FIG. 17. FIG. 18 shows this is correctly characterised by the 2nd order IIR filter whose transfer function is: (1-1.3z.sup.1+0.36z.sup.2)/(1-0.1z.sup.1).

(43) The output of the characterisation system of FIG. 10 may be used to adjust a PID compensator as shown in FIG. 19, where the compensator block 193 is a component of a DC-DC converter and the scaling block interfaces 192 the characterisation block 191 to the compensator. The compensator 193 is adjusted by the adjustment value w. Components 1981, 1982, 1983 and 1984 inside the characterization block 191 correspond to the components 81, 82, 83, 84 as shown in FIG. 8.

(44) The scaling block 192 may be suitably

(45) i) a linear time invariant gain;

(46) ii) a gain that is responsive to the magnitude of the signal being characterised (u) e.g. K/|u| where |u| represents the 2-norm of u or another suitable function. The advantage of (ii) is that the resulting signal from the characterisation block is amplified more if it is resulting from a small input signal u. Therefore it represents a greater requirement for adjustment in the compensator than if the same signal resulted from a large input signal u.

(47) FIG. 20 shows the output voltage and inductor current of a buck converter with characterisation turned on at 4.0 ms resulting in improved load-step response thereafter. The adjustment value w is also shown to characterise the pulse immediately resulting in improved compensator tuning after only one load-step pulse, as required.

(48) Because of the characterisation is carried out on the load-step pulse response as described it is clear that this method may operate with non-linear compensators, for example where different compensators are activated according to the system state at a specific instance in time, and furthermore is compatible with non-linear digital pulse width modulation restart techniques.

(49) Following characterisation the adjustment value w may be stored in non-volatile memory to be applied when the converter is next powered up following power down. Also, the adjustment value, or the like, may be communicated over a communication bus, serial or parallel, to provide information regarding the characterisation of the response which would be useful in the design and quality control of the end power system. For example, if it was observed that the value had changed since the previous characterisation or was very different from expected then the user may be alerted to act accordingly, on an impending component failure for example.