Alkali-niobate-based piezoelectric thin film element

Abstract

An alkali-niobate-based piezoelectric thin film element includes a substrate, a lower electrode film on the substrate, a piezoelectric thin film on the lower electrode film, and an upper electrode film on the piezoelectric thin film. The piezoelectric thin film is made of an alkali-niobate-based piezoelectric material represented by the formula (Na.sub.xK.sub.yLi.sub.z)NbO.sub.3, where 0?x?1, 0?y?1, 0?z?0.2, and x+y+z=1. The piezoelectric thin film has an element pattern and contains a metal element in a higher concentration near the upper electrode film than near the lower electrode film. The average concentration of the metal element is 5?10.sup.17 atoms/cm.sup.3 or less in a region within ?15% of the thickness of the piezoelectric thin film from a position corresponding to half the thickness of the piezoelectric thin film.

Claims

1. An alkali-niobate-based piezoelectric thin film element comprising: a substrate; a lower electrode film on the substrate; a piezoelectric thin film on the lower electrode film, the piezoelectric thin film comprising an alkali-niobate-based piezoelectric material represented by the formula (Na.sub.xK.sub.yLi.sub.z)NbO.sub.3, where 0?x?1, 0?y?1, 0?z?2, and x+y+z=1; and an upper electrode film on the piezoelectric thin film, wherein the piezoelectric thin film has a desired micro pattern formed for a piezoelectric element and contains a metal element in a higher concentration near the upper electrode film than near the lower electrode film, the metal element being chromium, gold or platinum, and the average concentration of the metal element is 5?10.sup.17 atoms/cm.sup.3 or less in a region within ?15% of the thickness of the piezoelectric thin film from a position corresponding to half the thickness of the piezoelectric thin film.

2. The alkali-niobate-based piezoelectric thin film element according to claim 1, wherein the average concentration of the metal element is 1?10.sup.17 atoms/cm.sup.3 or more in the region within ?15% of the thickness of the piezoelectric thin film from the position corresponding to half the thickness of the piezoelectric thin film.

3. An electronic device comprising the alkali-niobate-based piezoelectric thin film element according to claim 1.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIGS. 1A to 1D are schematic enlarged sectional views illustrating a process of manufacturing an NKLN-piezoelectric-thin-film-deposited substrate according to an embodiment of the present invention (to an etching-mask forming step);

(2) FIGS. 2A to 2B are schematic enlarged sectional views illustrating the process of manufacturing an NKLN-piezoelectric-thin-film-deposited substrate according to the embodiment of the present invention (piezoelectric-thin-film etching step);

(3) FIGS. 3A to 3C are schematic enlarged sectional views illustrating a process of manufacturing an NKLN piezoelectric thin film element according to the embodiment of the present invention (upper-electrode-film forming step and later);

(4) FIG. 4 is a chart showing example measurements of contaminant metal (Cr) concentration for Comparative Example 2 and Example 3;

(5) FIG. 5 is a chart showing example measurements of contaminant metal (Au or Pt) concentration for Examples 4 and 5;

(6) FIG. 6 is a graph showing example relationships between leakage current density and applied voltage for Comparative Example 2 and Example 3; and

(7) FIG. 7 is a graph showing example relationships between polarization and applied voltage for Comparative Example 2 and Example 3.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

(8) The inventors have focused on alkali-niobate-based piezoelectric materials ((Na.sub.xK.sub.yLi.sub.z)NbO.sub.3, NKLN) as lead-free piezoelectric materials expected to provide a comparable piezoelectric performance to lead zirconate titanate (Pb(Zr.sub.1-xTi.sub.x)O.sub.3, PZT), and have conducted extensive research on the dry etching of these materials.

(9) In the related art, an alkali-niobate-based piezoelectric material is dry-etched through an etching mask made of a metal film, mainly for reasons of etching selectivity. The inventors have hypothesized that the degradation of the piezoelectric properties (particularly, leakage current properties) of a piezoelectric thin film during dry etching results from the contamination of the piezoelectric thin film with a metal from the etching mask during the etching. After further research, the inventors have found that the degradation of the piezoelectric properties of a piezoelectric thin film during dry etching can be significantly reduced if at least the layer of the etching mask in contact with the piezoelectric thin film is made of an oxide film to reduce the contamination of the piezoelectric thin film with a metal from the etching mask. These findings have led to the present invention.

(10) A manufacturing process according to an embodiment of the present invention will now be described step by step with reference to the drawings. The present invention, however, should not be construed as being limited to the embodiment discussed below. Various combinations and improvements are possible without departing from the technical scope of the present invention.

(11) FIGS. 1A to 1D are schematic enlarged sectional views illustrating a process of manufacturing an NKLN-piezoelectric-thin-film-deposited substrate according to an embodiment of the present invention (to an etching-mask forming step). Although a cleaning step and a drying step are omitted in the following description, it is preferable to perform these steps if necessary.

(12) A substrate 11 is first provided. The substrate 11 may be made of any material selected depending on the application of the piezoelectric element. Examples of such materials include silicon (Si), silicon-on-insulator (SOI), quartz glass, gallium arsenide (GaAs), sapphire (Al.sub.2O.sub.3), metals such as stainless steel, magnesium oxide (MgO), and strontium titanate (SrTiO.sub.3). If the substrate 11 is made of a conductive material, it preferably has an electrically insulating film (e.g., an oxide film) thereon. The oxide film may be formed by any process, preferably, for example, by thermal oxidation or chemical vapor deposition (CVD).

(13) Lower-Electrode-Film Forming Step

(14) In this step, a lower electrode film 12 is formed on the substrate 11 (see FIG. 1A). The lower electrode film 12 may be made of any material, preferably platinum (Pt) or a Pt-based alloy. The lower electrode film 12 may be formed by any process, preferably, for example, by sputtering. The lower electrode film 12 preferably has an arithmetic mean surface roughness Ra of 0.86 nm or less so that the resulting piezoelectric thin film, described later, provides sufficient piezoelectric performance.

(15) Piezoelectric-Thin-Film Forming Step

(16) In this step, a piezoelectric thin film 13 is formed on the lower electrode film 12 (see FIG. 1A). The piezoelectric thin film 13 is preferably made of NKLN ((Na.sub.xK.sub.yLi.sub.z)NbO.sub.3, where 0?x?1, 0?y?1, 0?z?0.2, and x+y+z=1). The piezoelectric thin film 13 is preferably formed by sputtering or electron beam deposition with a sintered NKLN target. Sputtering and electron beam deposition are advantageous in terms of film reproducibility, deposition rate, and operating cost and also allow the orientation control of an NKLN crystal. For reasons of piezoelectric performance, it is preferable that the resulting piezoelectric thin film 13 be made of an NKLN crystal having a pseudocubic crystal structure and have a main surface preferentially oriented in the (001) plane.

(17) The piezoelectric thin film 13 may contain impurities such as tantalum (Ta), antimony (Sb), calcium (Ca), copper (Cu), barium (Ba), and titanium (Ti) in a total amount of 5 atomic percent or less.

(18) Etching-Mask Forming Step

(19) In this step, an etching mask for dry etching, described later, is formed on the deposited piezoelectric thin film 13. Specifically, a photoresist pattern 14 is first formed on the piezoelectric thin film 13 by a photolithography process (see FIG. 1B).

(20) An etching mask 15 is then deposited on the photoresist pattern 14. In this embodiment, the etching mask 15 has a layered structure including an oxide layer 151 and a metal layer 152, and at least the layer in contact with the piezoelectric thin film 13 is made of the oxide layer 151 (see FIG. 1C). For reasons of ease of handling (e.g., deposition and removal) and cost, the oxide layer 151 is preferably a silicon oxide layer (e.g., a SiO.sub.2 layer) or an aluminum oxide layer (e.g., an Al.sub.2O.sub.3 layer). The oxide layer 151 may be formed by any process, including known processes such as sputtering, plasma-enhanced CVD, and spin-on-glass (SOG) technique.

(21) The oxide layer 151 of the etching mask 15 preferably has a thickness (average thickness) of 0.2 to 2 ?m, more preferably 0.5 to 2 ?m, even more preferably 1 to 1.5 ?m. If the oxide layer 151 has a thickness of 0.2 ?m or more, it can reduce the contamination of the piezoelectric thin film 13 with a metal from the metal layer 152 of the etching mask 15 in the subsequent dry etching step. In other words, the oxide layer 151 functions as a diffusion barrier against the metal layer 152 in the etching mask 15. If the oxide layer 151 has a thickness of more than 2 ?m, it will have no greater diffusion barrier effect.

(22) Although the etching mask 15 illustrated in FIG. 1C includes the single oxide layer 151, the oxide layer 151 may have a layered structure including two or more layers. For example, the oxide layer 151 may include a silicon oxide layer formed on the piezoelectric thin film 13 and an aluminum oxide layer formed on the silicon oxide layer (between the silicon oxide layer and the metal layer 152). If the oxide layer 151 has a layered structure including two or more layers, it has a greater diffusion barrier effect against the metal layer 152.

(23) The metal layer 152 is then formed on the oxide layer 151. The metal layer 152 is preferably made of a material that exhibits a higher etching selectivity than the oxide layer 151 in the subsequent dry etching step. For example, the metal layer 152 is preferably made of a metal such as chromium (Cr), gold (Au), or Pt. The metal layer 152 may be formed by any process, including known processes (such as sputtering).

(24) An etching mask pattern 15 (patterned oxide layer 151 and metal layer 152) of the desired pattern is then formed by a lift-off process (see FIG. 1D). The etching mask pattern 15 may also be formed by processes other than photolithography and lift-off.

(25) Piezoelectric-Thin-Film Etching Step

(26) FIGS. 2A to 2B are schematic enlarged sectional views illustrating the process of manufacturing an NKLN-piezoelectric-thin-film-deposited substrate according to this embodiment (piezoelectric-thin-film etching step). In this step, the piezoelectric thin film 13 is dry-etched into the pattern defined by the etching mask pattern 15 (see FIG. 2A). The piezoelectric thin film 13 may be etched by any dry etching process, preferably by inductively coupled plasma reactive ion etching (ICP-RIE). As the etching gas, it is preferred to use a noble gas (e.g., argon (Ar)) and a reactive gas (e.g., trifluoromethane (CHF.sub.3), tetrafluoromethane (CF.sub.4), hexafluoroethane (C.sub.2F.sub.6), octafluorocyclobutane (C.sub.4F.sub.8), orsulfur hexafluoride (SF.sub.6)). In this method, a piezoelectric thin film pattern 13 of the desired pattern can be formed.

(27) In this embodiment, as described above, the use of the etching mask pattern 15, which has a layered structure including the oxide layer 151 and the metal layer 152, reduces the contamination of the piezoelectric thin film pattern 13 with a metal element from the metal layer 152. In this embodiment, the average concentration of the contaminant metal in the region within ?15% of the thickness of the piezoelectric thin film from the position corresponding to half the thickness of the piezoelectric thin film is used as a measure of the content of the contaminant metal, taking into account the overall influence on piezoelectric properties. The average concentration of the contaminant metal in the region defined above is preferably 5?10.sup.17 atoms/cm.sup.3 or less, more preferably 4?10.sup.17 atoms/cm.sup.3 or less, even more preferably 3?10.sup.17 atoms/cm.sup.3 or less. The contaminant metal, however, will probably be present in a concentration of about 1?10.sup.17 atoms/cm.sup.3 or more as long as the metal layer 152 is used as the etching mask pattern 15.

(28) After dry etching, the oxide layer 151 is removed with a suitable etchant (e.g., buffered hydrofluoric acid for silicon oxide) to obtain a piezoelectric-thin-film-deposited substrate 10 including the NKLN piezoelectric thin film etched into the desired pattern (see FIG. 2B).

(29) Upper-Electrode-Film Forming Step

(30) FIGS. 3A to 3C are schematic enlarged sectional views illustrating a process of manufacturing an NKLN piezoelectric thin film element according to this embodiment (upper-electrode-film forming step and later). In this step, an upper electrode film is formed on the piezoelectric thin film etched into the desired pattern in the previous step (piezoelectric thin film pattern 13). Specifically, a photoresist pattern 21 is first formed in the region other than the region in which the upper electrode film is to be formed by a photolithography process, and an upper electrode film 22 is deposited on the photoresist pattern 21 (see FIG. 3A). The photoresist pattern 21 is then removed by a lift-off process to leave an upper electrode film 22 (see FIG. 3B). Examples of suitable materials for the upper electrode film 22 (upper electrode film 22) include Al, Au, nickel (Ni), and Pt.

(31) Dicing Step

(32) In this step, the substrate having the piezoelectric thin film pattern 13 on which the upper electrode film 22 is formed is diced into a piezoelectric thin film element chip 20 (see FIG. 3C). The piezoelectric thin film element 20 includes a substrate chip 11 and a lower electrode film 12 thereon. In this method, the piezoelectric thin film element 20 including the NKLN piezoelectric thin film etched into the desired pattern can be fabricated.

(33) Electronic Device Including Piezoelectric Thin Film Element

(34) The thus-fabricated piezoelectric thin film element 20 can be used to provide environmentally friendly high-performance lead-free electronic components, including microsystem devices (e.g., micro-electro-mechanical system (MEMS) devices), stress/pressure sensors, actuators, and variable capacitors.

EXAMPLES

(35) The present invention is further illustrated by the following examples, although the present invention is not limited to these examples.

(36) Fabrication of Piezoelectric-Thin-Film-Deposited Substrates of Examples 1 to 5 and Comparative Examples 1 and 2

(37) Piezoelectric-thin-film-deposited substrates 10 including a piezoelectric thin film etched into the desired pattern were fabricated by the manufacturing process illustrated in FIGS. 1A to 2B. The substrate 11 was a silicon substrate having a thermally oxidized film thereon (4 inch (100)-oriented wafer with a wafer thickness of 0.525 mm having thereon a thermally oxidized film with a thickness of 205 nm).

(38) A Ti layer was first deposited to a thickness of 2.5 nm on the silicon substrate by radio-frequency (RF) magnetron sputtering to form an adhesion layer for improving the adhesion between the substrate 11 and the lower electrode film 12. A Pt layer was then deposited to a thickness of 200 nm on the Ti layer by RF magnetron sputtering to form a lower electrode film 12 (see FIG. 1A). The adhesion layer and the lower electrode film 12 were deposited by sputtering with a pure Ti target and a pure Pt target, respectively, at a substrate temperature of 250? C. and a discharge power of 200 Win an Ar atmosphere at a pressure of 2.5 Pa. The arithmetic mean surface roughness Ra of the deposited lower electrode film 12 was measured to be 0.86 nm or less. The sputtering system used was an RF sputtering system (SH-350-T10 from ULVAC, Inc.) (the same applies hereinafter).

(39) A (Na.sub.0.65K.sub.0.35)NbO.sub.3 (hereinafter referred as NKN) thin film was then deposited to a thickness of 2 won the lower electrode film 12 by RF magnetron sputtering to forma piezoelectric thin film 13 (see FIG. 1A). The NKN thin film was deposited by sputtering with a sintered NKN target at a substrate temperature of 520? C. and a discharge power of 700 W in a mixed atmosphere of oxygen (O.sub.2) gas and Ar gas (in an O.sub.2/Ar ratio of 0.005) at a pressure of 1.3 Pa.

(40) A photoresist (ZPN1150 from Zeon Corporation) was then applied, exposed, and developed on the NKN piezoelectric thin film to form a photoresist pattern 14 (see FIG. 1B). A SiO.sub.2 film was then deposited to a thickness of 0.2 to 1.5 ?m by RF magnetron sputtering to form an oxide layer 151 (Examples 1 to 5, see FIG. 1C). The SiO.sub.2 film was deposited by sputtering with a quartz plate target at a substrate temperature of 25? C. and a discharge power of 400 W in a mixed atmosphere of O.sub.2 gas and Ar gas (in an O.sub.2/Ar ratio of 0.033) at a pressure of 0.7 Pa.

(41) A Cr film (thickness: 0.4 ?m) was then deposited on the oxide layers 151 with varying thicknesses by RF magnetron sputtering to forma metal layer 152 (Examples 1 to 3, see FIG. 1C). The Cr film was deposited by sputtering with a pure Cr target at a substrate temperature of 25? C. and a discharge power of 50 W in an Ar atmosphere at a pressure of 0.8 Pa.

(42) Alternatively, a Au film (thickness: 0.4 ?m) or a Pt film (thickness: 0.4 ?m) was deposited on the SiO.sub.2 film (oxide layer 151) with a thickness of 1 ?m by RF magnetron sputtering to form different types of metal layers 152 (Examples 4 and 5, see FIG. 1C). The Au film or the Pt film was deposited by sputtering with a pure Au target or a pure Pt target at a substrate temperature of 25? C. and a discharge power of 50 Win an Ar atmosphere at a pressure of 0.8 Pa.

(43) A comparative sample was prepared by directly depositing a Cr film (thickness: 0.4 ?m) on the NKN piezoelectric thin film by RF magnetron sputtering (Comparative Example 1). In addition, a comparative sample was prepared by depositing a SiO.sub.2 film to a thickness of 0.1 ?m to form an oxide layer 151 and then depositing a Cr film to a thickness of 0.4 ?m to form a metal layer 152 by RF magnetron sputtering (Comparative Example 2). The SiO.sub.2 film and the Cr film were deposited under the same conditions as described above.

(44) Thereafter, the photoresist pattern 14 was removed by cleaning with acetone (lift-off) to form an etching mask pattern 15 on the NKN piezoelectric thin film (see FIG. 1D). The type of etching mask pattern 15 is shown in Table below.

(45) Etching Test

(46) The samples having the various etching mask patterns were dry-etched in an ICP-RIE system (EIS-700 from Elionix Inc.) under the same etching conditions. The samples were etched at an antenna power of 800 W and a bias power of 100 W using Ar and C.sub.4F.sub.8 as the etching gas at a pressure of 0.1 Pa.

(47) After the dry etching of the NKN piezoelectric thin film, the samples having an etching mask pattern 15 including a SiO.sub.2 layer (Examples 1 to 5 and Comparative Example 2) were etched with an etchant for SiO.sub.2 (buffered hydrofluoric acid) to remove the etching mask pattern 15. The sample having a Cr mask alone (Comparative Example 1) was etched with an etchant for Cr (ceric ammonium nitrate) to remove the etching mask pattern.

(48) Fabrication of Piezoelectric Thin Film Element

(49) A photoresist pattern 21 was formed on the NKN piezoelectric thin film of the thus-fabricated piezoelectric-thin-film-deposited substrates 10 by the manufacturing process illustrated in FIGS. 3A to 3C, and an upper electrode film 22 (thickness: 200 nm) was deposited by RF magnetron sputtering (see FIG. 3A). The upper electrode film 22 was deposited under the same conditions as the lower electrode film 12, i.e., by sputtering with a pure Pt target at a substrate temperature of 250? C. and a discharge power of 200 Win an Ar atmosphere at a pressure of 2.5 Pa.

(50) Thereafter, the photoresist pattern 21 was removed by cleaning with acetone (lift-off) to leave an upper electrode film 22 on the NKN piezoelectric thin film (see FIG. 3B). The piezoelectric-thin-film-deposited substrates 10 were then diced into NKN piezoelectric thin film element chips.

(51) A reference sample was also prepared by depositing an upper electrode film 22 (thickness: 200 nm) on an NKN piezoelectric thin film not patterned by dry etching. This sample, which was not affected by the etching mask pattern 15 and dry etching, was prepared as a reference for the contamination of the NKN piezoelectric thin film with a metal element from the metal layer 152 (i.e., the contaminant metal concentration) and the piezoelectric properties of the NKN piezoelectric thin film.

(52) Measurement of Concentration of Contaminant Metal from Metal Layer of Etching Mask in Piezoelectric Thin Film

(53) To examine the content of the contaminant metal from the metal layer 152 of the etching mask pattern 15 in the piezoelectric thin film 13, the contaminant metal concentration of the piezoelectric thin film 13 was measured by secondary ion mass spectrometry (SIMS) after the piezoelectric-thin-film etching step. The primary ion beam (excitation source) used in SIMS was an oxygen ion beam (O.sup.?, O.sub.2.sup.+ or Cs.sup.+ ion beam).

(54) The contamination of the piezoelectric thin film 13 with metal atoms from the metal layer 152 is assumed to be a type of diffusion phenomenon. Therefore, the metal concentration is expected to be high near the surface of the piezoelectric thin film 13 (near the etching mask pattern 15) and to decrease gradually along the depth of the piezoelectric thin film 13 (along the thickness toward the lower electrode film 12).

(55) FIG. 4 is a chart showing example measurements of the contaminant metal (Cr) concentration for Comparative Example 2 and Example 3. As shown in FIG. 4, in both cases, the contaminant metal concentration was high near the surface of the piezoelectric thin film (near a depth of 0 ?m) and decreased along the thickness of the piezoelectric thin film (toward a depth of 2 ?m). The contaminant metal concentration of Example 3 as a whole was lower than that of Comparative Example 2. Specifically, the measurements show that the average contaminant metal concentration of Example 3 in the region within ?15% of the thickness of the piezoelectric thin film (i.e., ?0.3 ?m) from the position corresponding to half the thickness of the piezoelectric thin film (i.e., a depth of 1 ?m) was about 3?10.sup.17 atoms/cm.sup.3, which is about half that of Comparative Example 2, i.e., about 6?10.sup.17 atoms/cm.sup.3.

(56) FIG. 5 is a chart showing example measurements of the contaminant metal (Au or Pt) concentration for Examples 4 and 5. As in FIG. 4, the contaminant metal concentrations of Examples 4 and 5 were high near the surface of the piezoelectric thin film (near a depth of 0 ?m) and decreased along the thickness of the piezoelectric thin film (toward a depth of 2 ?m). The average contaminant metal concentrations of Examples 4 and 5 in the region within ?15% of the thickness of the piezoelectric thin film (i.e., ?0.3 ?m) from the position corresponding to half the thickness of the piezoelectric thin film (i.e., a depth of 1 ?m) were about 2?10.sup.17 atoms/cm.sup.3 and about 3?10.sup.17 atoms/cm.sup.3, respectively, which are about half that of Comparative Example 2 or less.

(57) These results demonstrate that the contamination of the piezoelectric thin film with metal atoms from the metal layer is due to the diffusion phenomenon during the piezoelectric-thin-film etching step. The results also demonstrate that the oxide layer of the etching mask pattern functions as a diffusion barrier against the metal layer. The measurements taken from the other samples are listed together in Table below.

(58) Measurement and Evaluation of Piezoelectric Properties

(59) The resulting NKN piezoelectric thin film elements were examined using a ferroelectric property evaluation system for their dielectric loss tangent (tan ?), leakage current density, and polarization.

(60) FIG. 6 is a graph showing example relationships between the leakage current density and the applied voltage for Comparative Example 2 and Example 3. As shown in FIG. 6, in both cases, the leakage current density increased with increasing applied voltage. Specifically, the leakage current density tended to increase abruptly in the low voltage region (e.g., below about 5 V) and to remain substantially constant in the higher voltage region. It should be noted that measurements of the leakage current density that differ by one order of magnitude or less in the region where the absolute values of the measurements are low (e.g., on the order of 10.sup.0 ?A/cm.sup.2 or less) can be assumed to be practically equal because of the method of measurement.

(61) The measurements of the dielectric loss tangent (tan ?) and the leakage current density are shown in Table together with the type of etching mask pattern and the average contaminant metal concentration. The measurements of the piezoelectric properties are representative values of measurements taken from 10 elements at an applied voltage of 20 V.

(62) Table Type of Etching Mask Pattern and Measurements of Average Contaminant Metal Concentration and Piezoelectric Properties

(63) TABLE-US-00001 Average Piezoelectric Type of etching mask pattern contaminant properties Thickness Thickness Thickness Thickness metal Leakage of SiO.sub.2 film of Cr film of Au film of Pt film concentration current density (?m) (?m) (?m) (?m) (atoms/cm.sup.3) tan? (?A/cm.sup.2) Reference No dry etching 5 ? 10.sup.13 0.20 0.9 sample Comparative 0.4 5 ? 10.sup.18 0.76 3,760 Example 1 Comparative 0.1 0.4 6 ? 10.sup.17 0.27 396 Example 2 Example 1 0.2 0.4 5 ? 10.sup.17 0.21 3.4 Example 2 1 0.4 4 ? 10.sup.17 0.21 1.6 Example 3 1.5 0.4 3 ? 10.sup.17 0.21 0.1 Example 4 1 0.4 2 ? 10.sup.17 0.20 0.5 Example 5 1 0.4 3 ? 10.sup.17 0.21 1.5

(64) As shown in Table, the reference sample, which was not affected by dry etching, had an extremely low average contaminant metal concentration (nearly below the detection limit) and exhibited a sufficiently low dielectric loss tangent (tan ?) and leakage current density. This demonstrates that the NKN piezoelectric thin film formed in the above examples was a high-quality piezoelectric thin film.

(65) In contrast, in Comparative Example 1, in which a metal film etching mask in the related art was used alone, the average contaminant metal concentration was five orders of magnitude higher than that of the reference sample. Accordingly, the dielectric loss tangent was nearly four times higher than that of the reference sample, and the leakage current density was at least three orders of magnitude higher than that of the reference sample. This demonstrates that the piezoelectric properties were noticeably degraded.

(66) In Comparative Example 2, which is beyond the scope of the present invention, the average contaminant metal concentration was about one order of magnitude lower than that of Comparative Example 1. Accordingly, the dielectric loss tangent was about one-third that of Comparative Example 1, and the leakage current density was about one order of magnitude lower than that of Comparative Example 1. The leakage current density, however, was at least two orders of magnitude higher than that of the reference sample. This demonstrates that the oxide layer of the etching mask pattern had an insufficient effect (diffusion barrier effect against the metal layer).

(67) In contrast to these comparative examples, in Examples 1 to 5, which are within the scope of the present invention, the dielectric loss tangent was comparable to that of the reference sample, and the leakage current density was on the order of 10.sup.?1 to 10.sup.0 ?A/cm.sup.2. The leakage current densities of Examples 1 to 5 are comparable to that of the reference sample because, as described above, leakage current densities that differ by one order of magnitude or less in the region on the order of 10.sup.0 ?A/cm.sup.2 or less can be assumed to be practically equal. This demonstrates that the piezoelectric properties of the NKN piezoelectric thin films of Examples 1 to 5 were not degraded during microfabrication.

(68) FIG. 7 is a graph showing example relationships between the polarization and the applied voltage for Comparative Example 2 and Example 3. As shown in FIG. 7, Comparative Example 2 showed a wide polarization hysteresis loop, demonstrating that the ferroelectric properties were degraded. In contrast, Example 3 showed a narrow polarization hysteresis loop. This demonstrates that the ferroelectric properties of the NKN piezoelectric thin film of Example 3 were not degraded during dry etching.

(69) As demonstrated above, according to embodiments of the present invention, a thin film element that uses an alkali-niobate-based piezoelectric material can be manufactured by microfabrication without degrading the piezoelectric properties thereof. Thus, a piezoelectric thin film element that maintains the intrinsic high piezoelectric performance of an alkali-niobate-based piezoelectric material and an electronic device including such a piezoelectric thin film element can be provided.

(70) The foregoing embodiments and examples have been described in order to assist in understanding the present invention. The present invention should not be construed as being limited to the specific configurations disclosed herein. For example, part of the configuration of a certain embodiment may be replaced by the configuration of another embodiment, or the configuration of a certain embodiment may be added to the configuration of another embodiment. Thus, part of the configurations of the embodiments and examples disclosed herein may be removed or replaced by another configuration, or another configuration may be added thereto.