Directional coupling-type multi-drop bus

09864143 ยท 2018-01-09

Assignee

Inventors

Cpc classification

International classification

Abstract

The invention relates to a directional coupling-type multi-drop bus of which the impedance is matched with the bus at the time of coupling so that the speed is increased. A directional coupler is formed when a second module provided with a second coupler end is mounted on a first module provided with a first coupler end, and as a result, the coupling impedance where the proximity effects in the coupling state of the directional coupler are reflected is matched with the impedance of the bus.

Claims

1. A directional coupling-type multi-drop bus, comprising: a first module comprising: n first coupler ends provided on a surface of a first board and aligned in such an order that satisfies: Z.sub.ja (Z.sub.1aZ.sub.2a . . . Z.sub.na), wherein Z.sub.ja is a differential characteristic impedance of the respective first coupler ends; a first semiconductor integrated circuit device having a transmitter/receiver circuit of which a differential input/output impedance is Z.sub.0a (Z.sub.0a<Z.sub.1a); a first terminal member of which a differential impedance is Z.sub.0a; and a plane provided on a rear surface of said first board, wherein said first semiconductor integrated circuit device, said n coupler ends, and said first terminal member are linked together in this order with connection lines of which the differential characteristic impedance is Z.sub.0a; and a second module comprising: a second coupler end of which the differential characteristic impedance is Z.sub.1b; a second semiconductor integrated circuit device of which the differential input/output impedance is Z.sub.0b (Z.sub.0b<Z.sub.1b); and a second terminal member of which the differential impedance is Z.sub.0b, wherein said second semiconductor integrated circuit device, the second coupler end, and said second terminal member are linked together in this order with connection lines of which the differential characteristic impedance is Z.sub.0b, wherein said second module is mounted on said first module so that one of the first coupler ends and said second coupler end are aligned in proximity so as to face each other and form a directional coupler, and coupling impedances Z.sub.ja-coupled and Z.sub.1b-coupled which reflect the proximity effects in coupling state of said directional coupler are within a range of +/5% of Z.sub.0a and within a range of +/5% of Z.sub.0b, respectively.

2. The directional coupling-type multi-drop bus according to claim 1, wherein the second module includes n second modules and the second modules are mounted on said first module such that the respective second modules face corresponding one of the first coupler ends and such that the respective first coupler ends and corresponding one of the second coupler ends are aligned in proximity so as to face each other and form a directional coupler, and a coupling degree C.sub.j of respective directional couplers satisfies:
C.sub.1C.sub.2 . . . C.sub.n (here, C.sub.1<C.sub.n).

3. The directional coupling-type multi-drop bus according to claim 1, wherein distance between differential lines in one of the first coupler ends is the same or greater than the distance from the differential lines to said plane.

4. The directional coupling-type multi-drop bus according to claim 1, wherein the differential characteristic impedance Z.sub.ja of said first coupler ends is adjusted by line width of differential lines of said first coupler ends.

5. The directional coupling-type multi-drop bus according to claim 1, wherein the greater a coupling degree C of said directional coupler is, the higher the differential characteristic impedance Z.sub.ja of said first coupler ends before coupling is than the differential characteristic impedance Z.sub.0a of said connection lines.

6. The directional coupling-type multi-drop bus according to claim 5, wherein the second module includes a plurality of second modules and the second modules are mounted on said first module such that the respective second modules face corresponding one of the first coupler ends and such that the respective first coupler ends and corresponding one of the second coupler ends are aligned in proximity so as to face each other and form a directional coupler, and the coupling degree of each of said directional couplers is set higher as the directional coupler is farther away from said first semiconductor integrated circuit device, and at the same time, the farther away the first coupler end is from said first semiconductor integrated circuit device, the narrower the line width of differential lines in said first coupler end is.

7. The directional coupling-type multi-drop bus according to claim 2, wherein the coupling degree of each of said directional couplers is set so as to divide the signal power equally by changing distance d between the first coupler end and the second coupler end.

8. The directional coupling-type multi-drop bus according to claim 2, wherein distance d between the first coupler end and the second coupler end is adjusted by thickness of an insulating film provided between the first coupler end and the second coupler end.

9. The directional coupling-type multi-drop bus according to claim 2, wherein distance d between the first coupler end and the second coupler end is adjusted by level of a layer of multilayer wires provided on said first board.

10. The directional coupling-type multi-drop bus according to claim 2, wherein the farther away the first coupler end is from said first semiconductor integrated circuit device, the shorter a distance between differential lines in the first coupler end is.

11. The directional coupling-type multi-drop bus according to claim 1, wherein line width of differential lines in the first coupler end is wider than positional error of said second module relative to said first module.

12. The directional coupling-type multi-drop bus according to claim 11, wherein shape of said directional coupler is rectangular.

13. The directional coupling-type multi-drop bus according to claim 1, further comprising a terminal module mounted on another of the first connector ends, the terminal module including a coupler end having both ends each connected to a terminal resistor.

14. The directional coupling-type multi-drop bus according to claim 1, wherein the plane provided on the rear surface of said first board includes a missing portion in the location facing another of the first coupler ends, the missing portion misses the plane, and a plane module where a plane is provided instead of said second coupler end is mounted on the another of the first coupler ends.

15. The directional coupling-type multi-drop bus according to claim 1, wherein the second module includes a plurality of second modules to be mounted on said first module, the second modules all having the same characteristics and structure.

16. The directional coupling-type multi-drop bus according to claim 7, wherein the distance d between a first coupler end and the second coupler end is adjusted by thickness of an insulating film provided between the first coupler end and the second coupler end.

17. The directional coupling-type multi-drop bus according to claim 7, wherein the distance d between the first coupler end and the second coupler end is adjusted by level of a layer of multilayer wires provided on said first board.

18. The directional coupling-type multi-drop bus according to claim 7, wherein the farther away the first coupler end is from said first semiconductor integrated circuit device, the shorter a distance between differential lines in the first coupler end is.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic block diagram showing the directional coupling-type multi-drop bus according to an embodiment of the present invention;

(2) FIG. 2 is a schematic perspective diagram showing the directional coupling-type multi-drop bus according to Example 1 of the present invention;

(3) FIGS. 3A and 3B are schematic perspective diagrams showing a child board and a coupling portion in the directional coupling-type multi-drop bus according to Example 1 of the present invention;

(4) FIG. 4 is a cross-sectional diagram showing the directional coupling-type multi-drop bus according to Example 1 of the present invention;

(5) FIGS. 5A to 5C are diagrams showing the signal propagation and signal power at the time of writing in and reading out of memories using the directional coupling-type multi-drop bus according to Example 1 of the present invention;

(6) FIGS. 6A and 6B are diagrams showing the relationship between the degree of coupling in directional couplers and the power of a propagating signal;

(7) FIG. 7 is a plan diagram showing the directional coupler according to Example 1 of the present invention;

(8) FIGS. 8A and 8B are diagrams showing the coupling impedance matching in Example 1 of the present invention;

(9) FIG. 9 is a diagram showing the positional shift of the directional coupler according to Example 1 of the present invention;

(10) FIGS. 10A and 10B are graphs showing the correlation between the size and characteristics of a directional coupler;

(11) FIG. 11 is a diagram showing paths for signal currents and return currents;

(12) FIG. 12 is a diagram showing the correlation between the degree of coupling and the distance in a directional coupling portion;

(13) FIG. 13 is a diagram showing the correlation between the degree of coupling and the positional error in a directional coupler;

(14) FIG. 14 is a circuit diagram showing an example of a transmitter/receiver circuit used in the directional coupling-type multi-drop bus according to Example 1 of the present invention;

(15) FIGS. 15A and 15B are waveform diagrams showing the waveforms of the received signal measured in a child board;

(16) FIG. 16 is a waveform graph showing the results of measurement of the bit error rate and the reception timing when the signal power is equally divided by adjusting the degree of coupling for each memory module;

(17) FIG. 17 is a plan diagram showing the directional coupling-type multi-drop bus according to Example 2 of the present invention;

(18) FIG. 18 is a diagram showing the coupling impedance matching in Example 2 of the present invention;

(19) FIG. 19 is a cross-sectional diagram showing the directional coupling-type multi-drop bus according to Example 3 of the present invention;

(20) FIG. 20 is a cross-sectional diagram showing the directional coupling-type multi-drop bus according to Example 4 of the present invention;

(21) FIG. 21 is a cross-sectional diagram showing the directional coupling-type multi-drop bus according to Example 5 of the present invention; and

(22) FIG. 22 is a cross-sectional diagram showing the directional coupling-type multi-drop bus according to Example 6 of the present invention.

PREFERRED EMBODIMENTS OF THE INVENTION

(23) In reference to FIG. 1, the directional coupling-type multi-drop bus according to an embodiment of the present invention is described below. FIG. 1 is a schematic block diagram showing the directional coupling-type multi-drop bus according to an embodiment of the present invention. A first module 1 formed on a main board is provided with a number of first couplers 5.sub.1 to 5.sub.n, where each of these first coupler ends 5.sub.j is directionally coupled with a second coupler end 15.sub.j formed on a second module 11.sub.j that becomes a child board 12.sub.j. The symbols 6, 7, 13.sub.j, 14.sub.j, 16.sub.j, 17.sub.j, 18.sub.j, and 19.sub.j in the figure are a connection line, a terminal resistor (terminator), a second semiconductor integrated circuit device, a transmitter/receiver circuit, a stub, a terminal resistor (terminator), a via wire, and a DRAM, respectively.

(24) Here, the differential impedance Z.sub.c of each directional coupler is set slightly higher than the characteristic impedance Z of the bus in advance (Z.sub.c>Z) in accordance with the degree of coupling so that the differential impedance matches at the time of coupling (Z.sub.c-coupled=Z). Accordingly, the greater the degree of coupling C in a coupler is, the higher the differential impedance Z.sub.c of the coupler before coupling needs to be set as compared to the characteristic impedance Z of the bus. Here, the matching of the coupling impedance is allowed to have an error in a range of +/5%, judging from the results of the below-described electrical field simulation.

(25) Thus, the means for adjusting the differential impedance Z.sub.c include: a. Means for widening the distance S.sub.c between the differential lines in the coupler so that the coupling between the differential lines is weakened, and therefore, determining the impedance with the line width W.sub.c; or b. Means for keeping the differential lines of the coupler away from each other so that the distance S.sub.c becomes equal to or greater than the distance h to the plane (almost equal to the thickness of the board) with the coupling between the differential lines becoming weaker, and therefore, determining the differential impedance with the line width W.sub.c,
in such a state that the distance between the lines, the bus and the stub 16.sub.j, is sufficiently large enough to prevent coupling.

(26) In addition, it is desirable that the farther away a coupler is from the transmitter/receiver circuit 4, the greater the degree of coupling C.sub.j is set. That is to say, the setting satisfies the following:
C.sub.1C.sub.2 . . . C.sub.n, where, C.sub.1<C.sub.n

(27) In this case, the differential impedance is adjusted so as to satisfy the following in order to match the impedance in at least one directional coupler in the state where the second module is mounted:
Z<Z.sub.c1Z.sub.c2 . . . Z.sub.cn
In this case, all the degrees of coupling may be set differently, or the degree of coupling of a number of couplers adjacent to each other may be set the same. In particular, the degree of coupling C.sub.j of each coupler can be adjusted so that the signal power is divided equally.

(28) The degree of coupling C.sub.j is adjusted by varying the distance d between the first coupler end 5.sub.j and the second coupler end 15.sub.j. The farther away a coupler is from the first semiconductor integrated circuit device 3 having a transmitter/receiver circuit 4, the thinner the insulating film between the first coupler end 5.sub.j and the second coupler end 15.sub.j is made, and thereby, the shorter the distance d is and the stronger the degree of coupling is.

(29) Alternatively, the bus provided on the main board may have a multilayer wiring structure so that the distance can be adjusted by the level of the layer of the multilayer wires in a location where the first coupler end 5.sub.j is provided. Here, the degree of coupling may be weakened by widening the distance between couplers on the main board, which has such a disadvantage as to be affected by the adjustment precision.

(30) A coupler of which the line width W.sub.c (>) is greater than the positional error of the child board relative to the main board is used. For example, the coupler is made rectangular and the line width W.sub.c is greater than the assumed value of the error in the mounting position. That is to say, the coupling in the direction of the diagonal lines due to the positional shift when the second module 11.sub.j is mounted on the first module 1 can be reduced when a rectangular coupler is used.

(31) In the case where the impedance matches at the time of coupling when the second module 11.sub.j is mounted, such a problem arises that the impedance does not match when the second module 11.sub.j is not mounted. Therefore, it is desirable to match the impedance by mounting a child board for a terminal that does not have a memory or a transmitter/receiver circuit and only has a coupler and a terminal in portions on which a second module 11.sub.j is not mounted. Alternatively, the plane on the main board is removed only from the coupling portions so that when a child board having a plane is mounted, the plane may be used as the plane of the bus coupler. Though the plane on the main board may be used as it is, the speed is slightly hindered from increasing due to the mismatch of the impedance.

(32) According to the embodiment of the present invention, the impedance matches in at least one branch point of the bus, and therefore, an increase in the communication speed can be realized. In addition, the present invention can allow the signal power to be divided equally to the child boards, and thus, the power for communication can be reduced. Non-contact data transfer is also possible between the main board and a child board in such a manner that the transfer performance can be maintained even in the case where the two are slighted shifted positionally from each other, and therefore, the reliability in communication can be increased.

(33) As for the concrete materials, a typical example of the circuit boards for forming the main board and child boards is an FR-4 base having a thickness of 0.5 mm and a relative dielectric constant of 4.2, on the two sides of which a copper foil having a thickness of 0.036 mm is printed, and the top of which is coated with an organic insulating film such as of a solder resist having a thickness of 0.05 mm and a relative dielectric constant of 4.2. Here, the present invention is applicable in the same manner even in the case where the thickness, the relative dielectric constant, or the number of layers of wires is different, or a board is of another type.

(34) Though it is typical for the couplers and the connection lines to be made of a microstrip line having a plane directly below it, the invention can be implemented using microstrip lines when the plane is removed from between the lines only in the coupling portions. Though it is general for the differential impedance for the differential lines to be 100 when the characteristic impedance of the transmission line is 50, which is typical, they may have other values. The number of modules to be mounted may be any number.

(35) When an impedance matching means or a degree of coupling adjusting means is provided on the first module side, a second module 11.sub.j can be used for many purposes, and thus, a memory system using a directional coupling-type multi-drop bus can be implemented at a low cost. Though the line width of the couplers on the second module side may be made the same as on the main board side, the second module 11.sub.j does not have many purposes, and it becomes difficult to lower the cost.

Example 1

(36) Based on the above, next, the directional coupling-type multi-drop bus according to Example 1 of the present invention is described in reference to FIGS. 2 to 15B. Here, the degree of coupling is adjusted by the thickness of the insulating film, and at the same time, the distance between coupler lines S.sub.c>the distance to the plane h and the constant coupler line width W.sub.c>positional error are satisfied.

(37) FIG. 2 is a schematic perspective diagram showing the directional coupling-type multi-drop bus according to Example 1 of the present invention. FIG. 3A is a schematic perspective diagram showing a child board, and FIG. 3B is a schematic perspective diagram showing a coupling portion. As shown in FIG. 2, bus lines (connection lines 6) are formed on a main board 2 of a number of pairs (only one pair is shown in the figure) of differential lines with a differential impedance Z (typically, 100) that are wired parallel to each other from a first semiconductor integrated circuit device 3, which is a transmitter/receiver chip such as a microprocessor having a transmitter/receiver circuit 4. Though in FIG. 2 the differential lines are straight lines in the layout, they may be curved.

(38) The bus lines are terminated through matching at the connection points with the transmitter/receiver chip and at the terminal points while a first coupler end 5.sub.j for branching a signal is inserted into a stub along a differential line, and a second module 11.sub.j such as a memory module formed of a child board is mounted on this first coupler end Though in FIG. 2 the first coupler end 5.sub.j is inserted in five places from #1 to #5, the number thereof may be any number. A second coupler end 15.sub.j on the child board side is formed of a transmission line at the bottom of a memory module so as to face the first coupler end 5.sub.j on the main board 2 in close proximity, and thus, a directional coupler is formed.

(39) As shown in FIG. 3A, the two ends of the second coupler end 15.sub.j on the memory module side are wired above the memory module through via wires 18.sub.j. The second coupler end 15.sub.j on the memory module side is terminated through matching in the forward direction relative to the flow of the signal on the main board and is connected to the second semiconductor integrated circuit device 13.sub.j, which is a transmitter/receiver chip, through differential lines in the reverse direction. Here, the first coupler end 5.sub.j on the main board side and the second coupler end 15.sub.j on the child board side face each other at a close distance for capacitive/inductive coupling. However, the distance between other parts of the lines is great, and therefore, there is no coupling.

(40) In this case, a mechanical structure such as of a conventional connector can be used to mount the memory module, and the contact of wires in the connector allows power to be supplied to the memory module as in the prior art. Data is transferred in a non-contact manner through the directional coupler.

(41) As shown in FIG. 3B, the shorter the distance d between the first connector end 5.sub.j on the main board side and the second connector end 15.sub.j on the child board side is, the stronger the degree of coupling C of the directional coupler can be made. Here, the closer the coupler is to the transmitter/receiver chip on the main board, the greater the distance d is made so that the degree of coupling C is weaker, while the farther away the coupler is, the shorter the distance d is made so that the degree of coupling C is stronger. The distance to the closest coupler #1 is denoted by d.sub.1 with the degree of coupling thereof being denoted by C.sub.1, while the distance to the next closest coupler #2 is denoted by d.sub.2 with the degree of coupling thereof being denoted by C.sub.2. When the distance to the coupler and the degree of coupling thereof are denoted in the same way sequentially, the following relationships are satisfied:
C.sub.1C.sub.2C.sub.3C.sub.4C.sub.5, where C.sub.1<C.sub.5, and
d.sub.1d.sub.2d.sub.3d.sub.4d.sub.5, where d.sub.1>d.sub.5

(42) FIG. 4 is a cross-sectional diagram showing the directional coupling-type multi-drop bus according to Example 1 of the present invention. A plane 22 connected to the ground is provided on the rear surface of a board 21 made of an FR-4 base having a thickness of 0.5 mm and a relative dielectric constant of 4.2. A copper foil having a thickness of 0.036 mm is patterned so that differential lines 23 and coupler ends 24 are formed of microstrip lines on the front surface of the board 21. The top thereof is covered with an organic insulating film 25 made of a solder resist having a thickness of 0.05 mm and a relative dielectric constant of 4.2, and furthermore, an organic insulating film 26 having a thickness of t.sub.j is provided above the coupler ends 24. Here, an organic insulating film 27 made of a solder resist having a thickness of 0.05 mm and a relative dielectric constant of 4.2 is provided on the surface of the plane 22. In addition, a transmitter/receiver chip 28 such as a microprocessor having a transmitter/receiver circuit is connected to one end of the differential lines 23, while a terminal resistor 29 is connected to the other end so that the differential impedance becomes 100.

(43) Meanwhile, a memory module 30 is provided with a coupler end 32 on the rear surface of the child board 31 in an inverted T shape, where one of the two ends of this coupler end 32 is connected to the terminal resistor 34 through a via wire 33 while the other is connected to a stub 36 through a via wire 35. This stub 36 is connected to a transmitter/receiver chip 37, and a number of DRAMs 38 are connected to this transmitter/receiver chip 37. In addition, an organic insulating film 39 made of a solder resist having a thickness of 0.05 mm and a relative dielectric constant of 4.2 is provided on the surface of the coupler end 32.

(44) When a memory module 30 is mounted on a piece of the organic insulating film 26, the distance between the memory module 30 and the coupler end 24 on the main board 20 is the sum of the thickness t.sub.j of the organic insulating film 26 and the thickness of the two solder resist films (organic insulating film 25+organic insulating film 39) so that d.sub.j=t.sub.j+0.100 mm.

(45) The distance d.sub.j of each coupler is adjusted by varying the thickness t.sub.j of the organic insulating film 26 provided in the location of each memory module 30. When t.sub.1=0.100 mm, t.sub.2=0.075 mm, t.sub.3=0.050 mm, t.sub.4=0.025 mm, and t.sub.5=0 mm, then d.sub.1=0.200 mm, d.sub.2=0.175 mm, d.sub.3=0.150 mm, d.sub.4=0.125 mm, and d.sub.5=0.100 mm. In this case, the organic insulating film 26 may be made of insulating films, each of which has a thickness of 0.025 mm, and the thickness of the organic insulating film 26 may be adjusted by changing the number of layered insulating films.

(46) Thus, the organic insulating film 26 having a different thickness depending on the coupler end 22 on the main board 20 is formed so that the degree of coupling with each memory module 30 can be varied even in the case where the same memory modules 30 are mounted, and thus, it is possible to use the memory modules 30 for many purposes. For the mounting of the memory modules 30, connectors may be used or other engaging mechanisms may be used.

(47) FIGS. 5A to 5C are diagrams showing the signal propagation and signal power at the time of writing in and reading out of memories using the directional coupling-type multi-drop bus according to Example 1 of the present invention. As shown in FIG. 5A, the differential signal transmitted from the transmitter/receiver chip on the main board propagates through the differential lines from the left to the right in the figure, and part of the signal in response to the degree of coupling in the first directional coupler propagates in the reverse direction to the second memory module #2, and thus, propagates through the coupler end of the memory module #1 from the right to the left in the figure so as to move upwards through the child board through the via wires and the differential lines and is received by the transmitter/receiver chip. The signal that has passed through the coupling end on the main board from the left to the right in the figure without undergoing coupling in the first directional coupler further propagates through the differential lines so as to reach the second directional coupler, and after that repeats the same process, and finally is terminated through matching in the terminal resistor (terminator) provided in the terminal (right end in the figure) where the signal is not reflected.

(48) As a result, data from the transmitter/receiver chip can be written into memory modules #1 to #3. In the figure, the degree of coupling C.sub.j in #1, #2, and #3 is C.sub.1=, C.sub.2=, and C.sub.3=, respectively, and therefore, such a manner that the equally divided signal power, which is of the transmission power, is delivered to each memory module #1 to #3 is shown.

(49) At the time of reading out, the flow of the signal is opposite to the above. As shown in FIG. 5B, for example, as for the signal transmitted from the transmitter/receiver chip in the second memory module #2, part of the signal in response to the degree of coupling in the directional coupler propagates in the reverse direction to the main board while the remaining part of the signal that has not been coupled propagates through the coupler end of the second memory module #2 from the left to the right in the figure so as to be terminated through matching. The signal that has propagated to the main board propagates through the coupler end of the second directional coupler #2 from the right to the left in the figure so as to reach the first directional coupler #1. Part of the signal in response to the degree of coupling of the first directional coupler #1 propagates in the reverse direction to the first memory module #1 and propagates through the coupler end of the first memory module #1 from the left to the right in the figure so as to be terminated through matching. The remaining part of the signal that has not been coupled passes through the coupler end of the first directional coupler #1 on the main board from the right to the left in the figure, and thus, the signal power that is of the power of the transmission signal is received by the transmission/reception chip on the main board side.

(50) FIG. 5C shows the manner how the signal transmitted from the transmitter/receiver chip of the third memory module #3 is received by the transmitter/receiver chip on the main board side. The signal power received by the transmitter/receiver chip is of the transmitted power in the same manner as in the case of FIG. 5B. Thus, no matter which memory module the signal is transmitted from, of the signal power is received by the transmitter/receiver chip on the main board.

(51) Though in reality there is a slight signal of which the direction of propagation is in the forward direction after coupling, the signal that has coupled in the forward direction is terminated afterwards through matching and is not reflected. The signal that has propagated in the forward direction to the memory module #1 in FIG. 5A, for example, is terminated through matching in the terminal resistor (terminator) that is located in a place to which the signal propagates afterwards. Alternatively, the signal that has propagated from the memory module #2 to the main board in the forward direction in FIG. 5B propagates to the memory module #3 in the reverse direction in the coupler #3, and after that is terminated through matching at the input for the reception by this transmitter/receiver chip.

(52) FIGS. 6A and 6B are diagrams showing the relationship between the degree of coupling in directional couplers and the power of a propagating signal. As shown in FIG. 6A, in the case where the maximum degree of coupling is C=(6 dB), the degree of coupling of each coupler can be set to C.sub.1=, C.sub.2=, C.sub.3=, C.sub.4=, and C.sub.5= so that the power of the propagating signal can be equally divided to the respective memory module with the divided power being of the transmitted power.

(53) In the case where the degree of coupling of the coupler cannot be made as great as C=, for example, in the case where the degree of coupling can be made C= (16 dB) or less, as shown in FIG. 6B, the degree of coupling of each coupler can be set to C.sub.1= 1/10, C.sub.2= 1/9, C.sub.3=, C.sub.4= 1/7, and C.sub.5= so that the power of the propagating signal can be equally divided to the respective memory module with the divided power being 1/10 of the transmitted power.

(54) FIG. 7 is a plan diagram showing a directional coupler according to Example 1 of the present invention. It is desirable for the distance S between lines 23.sub.1 and 23.sub.2 of the differential lines 23 of the bus on the main board to be smaller than the distance h between the lines and the plane, that is to say, Sh is desirable. In the case where this condition is satisfied, one of the differential lines allows a return current for the other to flow through. That is to say, the lines 23.sub.1 and 23.sub.2 are in close proximity so as to be strongly and closely coupled.

(55) In this case, the return current flows through the line 23.sub.1 or 23.sub.2 instead of the plane, and therefore, the differential impedance Z is determined mainly by the distance S between the lines 23.sub.1 and 23.sub.2 and the distance h without being affected by the distance vis--vis the plane, for example, which is desirable for matching, by controlling the impedance. The differential impedance Z of the lines 23.sub.1 and 23.sub.2 is typically designed so as to be 100. A 50 resistor is inserted between each line and the terminal power source for termination through matching.

(56) It is desirable for the distance S.sub.c between the lines 24.sub.1 and 24.sub.2 of the coupler ends 24 formed of the differential lines in a directional coupler to be greater than the distance h between the lines and the plane, that is to say, S.sub.ch is desirable. This is because the impedance of the coupler can be designed with a good perspective as described below without being affected by the coupling between the lines in the case where the coupling is weak between the lines 24.sub.1 and 24.sub.2 that form the coupler end.

(57) Furthermore, the setting of S.sub.ch makes it possible for the coupling in the direction of the diagonal lines between the lines 24.sub.1 and 24.sub.2 and the lines 32.sub.1 and 32.sub.2 to be smaller due to the positional shift when a child board is mounted on the main board, and thus can reduce the effects thereof. That is to say, the return currents through the line 24.sub.1 and the line 24.sub.2 flow separately through the plane when the coupling between the line 24.sub.1 and the line 24.sub.2 is weak.

(58) When the coupling between the differential lines is weak, the differential impedance is high and becomes close to two times greater than the characteristic impedance of each line. Accordingly, the differential impedance Z.sub.c of the line 24.sub.1 and the line 24.sub.2 is higher than the differential impedance Z of the line 23.sub.1 and the line 23.sub.2 that form differential lines in the state where the main board and the child board are not coupled to each other, that is to say, Z.sub.c>Z is satisfied.

(59) When a child board is mounted on the main board so that the line 24.sub.1 and the line 23.sub.1 are in close proximity so as to be coupled to each other and the line 23.sub.2 and the line 32.sub.2 are in close proximity so as to be coupled to each other, the differential impedance Z.sub.c of the line 24.sub.1 and the line 24.sub.2 lowers so as to be equal to the differential impedance Z of the line 23.sub.1 and the line 23.sub.2, that is to say, Z.sub.c-coupled=Z is satisfied.

(60) Here, the line width of the bus W=0.4 mm, the distance between the differential lines of the bus S=0.26 mm, the line width of a coupler W.sub.c=0.4 mm, the distance between the lines of a coupler S.sub.c=1.06 mm, the length of a coupler L.sub.c=5 mm, and the distance between the lines and the plane h=0.5 mm are adopted as typical dimensions.

(61) FIGS. 8A and 8B are diagrams showing the coupling impedance matching in Example 1 of the present invention, where FIG. 8A shows the results of electrical field simulation of the coupling impedance in conventional differential lines and FIG. 8B shows the results of electrical field simulation of the coupling impedance in Example 1 of the present invention. As shown in FIG. 8A, in the case of conventional differential lines, the coupling impedance lowers in accordance with the degree of coupling, causing mismatch of 20% or more. Meanwhile, as shown in FIG. 8B, the width of the lines in the directional couplers is widened to increase the impedance in Example 1 of the present invention, where the coupling impedance mismatch is less and the coupling impedance of at least one directional coupler can be matched. In addition, the coupling impedance mismatch in the third directional coupler is approximately 4%, and the mismatch can be within a range of approximately +/10% as a whole.

(62) Furthermore, the width W.sub.c of the lines of a coupler end is greater than the positional shift when a child board is mounted on the main board, that is to say, W.sub.c> is satisfied in order for the system not to be affected by the positional shift. FIG. 9 is a diagram showing the positional shift in a directional coupler where the positional shift between the line of the coupler end 24 and the line of the coupler end 32 in the projection is defined as .

(63) The frequency f.sub.0 at which the degree of coupling C of a directional coupler becomes maximum can be represented by the following in the case where the wavelength of the signal is :
f.sub.0=/4
The wavelength becomes 5 mm in a dielectric substance of which the relative dielectric constant is 4 when the frequency is approximately 7 GHz. Accordingly, f.sub.0 is approximately 7 GHz when the length L.sub.c of the transmission line coupler is 5 mm, and f.sub.0 is approximately 5 GHz when L.sub.c is 7 mm.

(64) When the frequencies at which the degree of coupling C is 3 dB lower than the maximum are denoted by f.sub.L and f.sub.H, the degree of coupling C barely depends on the frequency f in the frequency range between f.sub.H and f.sub.L, where a signal can be transmitted without a change in the signal waveform, and therefore, this range is regarded as a signal band. f.sub.L is approximately 0.5f.sub.0 and f.sub.H is approximately 1.5f.sub.0, and therefore, the signal band f.sub.H-f.sub.L is approximately f.sub.0.

(65) The communication speed is proportional to the signal band, and therefore, the smaller the transmission line length L is, the broader the band is, thereby making the communication speed faster. Thus, the length L.sub.c of the transmission line coupler is determined by the demand on the signal band.

(66) When two transmission lines are coupled to each other, the signal that flows through the two transmission lines can be represented by the synthesis of the signals in the same direction (the two change from low to high) and the signals in the opposite direction (when one changes from low to high, the other changes from high to low).

(67) That is to say, the signals V.sub.1 and V.sub.2 of the line 24.sub.1 and the line 24.sub.2 are as follows when the signal component that propagates in the odd mode is V.sub.odd and the signal component that propagates in the even mode is V.sub.even:
V.sub.odd=V.sub.1V.sub.2, V.sub.even=0.5(V.sub.1+V.sub.2)
Therefore, V.sub.1 and V.sub.2 can be represented as follows:
V.sub.1=V.sub.even+0.5V.sub.odd, V.sub.2=V.sub.even0.5V.sub.odd

(68) The characteristic impedance of a pair of transmission lines for signals in the same phase is referred to as even mode impedance Z.sub.0e, while the characteristic impedance of a pair of transmission lines for signals in opposite phases is referred to as odd mode impedance Z.sub.0o. In the even mode, signals change in the same phase, and therefore, the capacitance between the lines is effectively reduced as compared to the odd mode where signals change in the opposite phase. The impedance is inversely proportional to the capacitance, and therefore, the even mode impedance Z.sub.0e is greater than the odd mode impedance Z.sub.0o. The greater this difference is, the greater the value of the degree of coupling C is, that is to say, the stronger the degree of coupling is. Here, the characteristic impedance Z of a transmission line can be represented in the following using Z.sub.0e and Z.sub.0o:
Z=(Z.sub.0eZ.sub.0o).sup.1/2

(69) The decibel indication value of the degree of coupling C can be represented in the following when Z.sub.0e is the characteristic impedance of a pair of transmission lines in the even mode and Z.sub.0o is the characteristic impedance of a pair of transmission lines in the odd mode:
C=20 log|(Z.sub.0eZ.sub.0o)/(Z.sub.0e+Z.sub.0o)|
Naturally, the greater the distance d is, the smaller the degree of coupling is. Accordingly, the degree of coupling C is designed by varying the distance d of the coupler, while the impedance Z.sub.c can be designed by varying the line width W.sub.c of each coupler.

(70) FIGS. 10A and 10B are graphs showing the correlation between the size and the characteristics of a directional coupler, where the above-described relationships are shown as the results of the search using an electromagnetic field analysis simulator. When the distance d is given and the line width W varies, the degree of coupling C and the impedance Z change. The greater W is, the lower the impedance is as shown in FIG. 10A and the stronger the coupling is as shown in FIG. 10B.

(71) In addition, the greater the position of a transmission line shifts, the weaker the coupling is. In the case where a transmission line shifts by approximately of the width of the transmission line, for example, =0.06 mm when W=0.3 mm, however, the degree of coupling is lower by approximately 6 dB, which is approximately half.

(72) FIG. 11 is a diagram showing the paths of signal currents and return currents where differential lines 23.sub.1 and 23.sub.2 for creating bus lines on the main board are in close proximity to each other and coupled, and therefore, one allows a return current of the other to flow, and thus, allows a differential signal to propagate. After entering the coupler, the distance S.sub.c between the line 24.sub.1 and the line 24.sub.2 is great, which makes the coupling weak, and therefore, the respective return currents flow separately through the plane.

(73) At the same time, when the coupling end on a child board is in close proximity and coupled to a coupling end on the main board, a return current that is part of the current that flows through the line 24.sub.1 flows through the line 32.sub.1, while a return current that is part of the current that flows through the line 24.sub.2 flows through the line 32.sub.2. One of the currents that flow through the line 32.sub.1 and the line 32.sub.2 allows a return current of the other to flow through so as to allow a differential signal to propagate because the line 36.sub.1 and the line 36.sub.2 that create stub lines on the child board are in close proximity and coupled to each other.

(74) FIG. 12 is a diagram showing the correlation between the degree of coupling and the distance in a directional coupling portion, where the results of measurement for a directional coupler that has actually been prepared with the following dimensions of each part are shown:
W=0.4 mm, S=0.26 mm, W.sub.c=0.4 mm, S.sub.c=1.06 mm, L.sub.c=5 mm, and h=0.5 mm.

(75) The correlation between the degree of coupling and the distance in a directional coupling portion can be shown as data in the following table on the basis of the results of measurement in FIG. 12. Here, the numerals are gained as a result of linear approximation, and therefore, errors are included.

(76) TABLE-US-00001 TABLE 1 Distance d Degree of Coupling C. 0.100 mm 9.6 dB (0.3311/3) 0.125 mm 11.2 dB (0.2751/3.6) 0.150 mm 12.7 dB (0.2321/4.3) 0.175 mm 14.3 dB (0.1931/5.2) 0.200 mm 16.0 dB (0.1581/6.3) 0.225 mm 17.6 dB (0.1321/7.6) 0.250 mm 19.2 dB (0.1101/9.1) 0.275 mm 20.8 dB (0.0911/11.0) 0.300 mm 22.4 dB (0.0761/13.2)

(77) When the distance d of each memory module is d.sub.1=0.20 mm, d.sub.2=0.175 mm, d.sub.3=0.150 mm, d.sub.4=0.125 mm, and d.sub.5=0.100 mm, for example, the signal power (equal to the signal voltage) divided to each memory module is as follows in accordance with the above table, and thus, the power that is approximately of the transmitted power can be distributed to each memory module. The results are close to the setting of the degree of coupling illustrated in FIG. 6A.
Memory module #1: 10.158=0.158
Memory module #2: (10.158)0.193=0.163
Memory module #3: (0.8420.163)0.232=0.158
Memory module #4: (0.6790.158)0.275=0.143
Memory module #5: (0.5210.143)0.331=0.125
Terminal: 0.378(10.331)=0.252

(78) Alternatively, when d.sub.1=0.30 mm, d.sub.2=0.275 mm, d.sub.3=0.250 mm, d.sub.4=0.225 mm, and d.sub.5=0.200 mm, the signal power (equal to the signal voltage) divided to each memory module is as follows, and thus, the power that is approximately 1/10 of the transmitted power can be distributed to each memory module. The results are close to the setting of the degree of coupling illustrated in FIG. 6B.
Memory module #1: 10.076=0.076
Memory module #2: (10.076)0.091=0.084
Memory module #3: (0.9240.084)0.110=0.092
Memory module #4: (0.8400.092)0.132=0.099
Memory module #5: (0.7480.099)0.158=0.103
Terminal: 0.649(10.158)=0.546

(79) FIG. 13 is a diagram showing the correlation between the degree of coupling and the positional error in a directional coupler, where the results of measurement for a directional coupler that has actually been prepared when the line width W.sub.c=0.4 mm and the distance d=0 as described in the above are shown. As shown in the figure, the degree of coupling lowers by approximately 4 dB at the maximum, that is to say, becomes only approximately 0.6 times smaller, even in the case where a line is arranged with a shift within a range of the width W.sub.c (0.4 mm). Meanwhile, the degree of coupling dramatically lowers in the case where a line is arranged with a shift of the line width or greater (>0.4 mm). Accordingly, it can be seen that a coupler of which the width is greater than the positional error d of a child board, that is to say, W.sub.c>, may be used.

(80) FIG. 14 is a circuit diagram showing the structure of an example of the transmitter/receiver circuit used in the directional coupling-type multi-drop bus according to Example 1 of the present invention. The transmitter circuit is a circuit for transmitting a differential signal of a current in response to the transmitted data. A first derivative is carried out on the transmitted signal when passing through the directional coupler, and thus, the signal attenuates in accordance with the degree of coupling. The receiver circuit restores the signal to the original data by using a comparator having hysteresis. The impedance matching circuit digitally corrects the differential impedance of the input/output terminals to which the transmitter/receiver is connected.

(81) FIGS. 15A and 15B are diagrams showing waveforms of the received signal that is measured on a child board, where FIG. 15A shows the received signal waveform in the case where the degree of coupling C is constant, and FIG. 15B shows the received signal waveform in the case where the signal is divided equally by varying the degree of coupling C. Here, the results of measurement are shown for a multi-drop bus where a transmitter/receiver chip, a main board, and five child boards have actually been fabricated and assembled, when W=0.4 mm, S=0.26 mm, W.sub.c=0.4 mm, S.sub.c=1.06 mm, L.sub.c=5 mm, and h=0.5 mm.

(82) As shown in FIG. 15A, the signal received by a memory module that is further away is too small to be determined in the case where the degree of coupling C is constant for each memory module. Meanwhile, as shown in FIG. 15B, the power of the received signal is almost equal for any memory module, and thus, can be determined in the case where the degree of coupling is varied for each memory module so that the signal is equally divided. As shown in FIG. 8B, matching of the coupling impedance also contributes to this.

(83) FIG. 16 is a graph showing the results of measurement for the bit error rate and the reception timing when the degree of coupling is adjusted for each memory module so that the signal power is divided equally, where the results of measurement are shown for the memory module #1 that is the closest to the transmitter/receiver chip and the memory module #5 that is the farthest from the transmitter/receiver chip.

(84) As shown in the figure, as a result of measurement using 2.sup.71 pseudo-random data of 7 Gbps, the bit error rate at the time of data communication is 10.sup.12 or less, and a margin of the reception timing is 50% or more of the period [U. I.]. Here, 7 Gbps is the fastest speed in the world as the data transfer speed through a multi-drop bus at present (January 2012).

(85) Thus, in Example 1 of the present invention, the differential impedance Z.sub.c at the coupler end on the main board side before a memory module is mounted in one directional coupler is preset large enough that the differential impedance Z.sub.c-coupled after mounting becomes equal to the impedance Z of the differential lines, and therefore, the impedance can be matched at the time of operation, and as a result, it is possible to propagate a signal at a high speed. Here, it is general for the directional coupler where the impedance is matched to be a directional coupler having the highest degree of coupling. In the case where the number of memory modules that are mounted is small, the impedance may be matched in a directional coupler that is close to the middle.

(86) In addition, the degree of coupling C is equally divided to each memory module by varying the thickness of the organic insulating film that is interposed between the main board and the child boards, and therefore, a signal waveform that can be determined can be received by each memory module, which makes it possible to lower the power consumption, and at the same time, can greatly increase the reliability of signal transmission.

(87) Furthermore, the distance S.sub.c between the lines in a coupler portion is greater than the distance h between the lines and the plate, and therefore, it is easy to control the impedance, and at the same time, the impedance is affected less by the positional error at the time of the mounting of the memory module. The reliability of the signal transmission increases in this point.

Example 2

(88) Next, the directional coupling-type multi-drop bus according to Example 2 of the present invention is described in reference to FIG. 17. The impedance is adjusted by varying the line width in a coupler portion in Example 2. FIG. 17 is a plan diagram showing the directional coupling-type multi-drop bus according to Example 2 of the present invention, where the greater the degree of coupling is, that is to say, the farther away the coupler is from the transmitter/receiver chip, the smaller the line width W.sub.c of the coupler end on the main board side is, and the remaining portions are the same as in Example 1. Here, the child board in each coupler portion is the same as in Example 1. That is to say, any memory module may be mounted in any location on the main board.

(89) In this case, the line width W.sub.c of the coupler on the main board side is set as follows:
W.sub.c1W.sub.c2W.sub.c3W.sub.c4W.sub.c5, where M.sub.c1>W.sub.c5.
When the line width W.sub.c of a coupler is smaller, the impedance is greater as shown in FIG. 10B, and therefore, the impedance in each coupler before coupling satisfies the following:
Z.sub.c1Z.sub.c2Z.sub.c3Z.sub.c4Z.sub.c5, where Z.sub.c1<Z.sub.c5.

(90) The degree of coupling C is set as follows so that the farther away the coupler is from the transmitter/receiver chip, the greater the impedance is as described above.
C1C2C3C4C5, where C.sub.1<C.sub.5.
The greater the degree of coupling C is, the more the impedance lowers at the time of coupling, and as a result, the impedance Z.sub.c-coupled at the time of coupling matches the differential impedance Z of the differential lines in all the couplers. That is to say, the following is satisfied:
Z.sub.c1-coupled=Z.sub.c2-coupled=Z.sub.c3-coupled=Z.sub.c4-coupled=Z.sub.c5-coupled=Z

(91) FIG. 18 is a diagram showing the coupling impedance matching in Example 2 of the present invention. The results of electrical field simulation shows that the entire coupling impedance can be adjusted within the range of +/3% by setting the line width W.sub.c of each directional coupler as shown in the figure. Here, in reality, there is a positional error and dispersion in the size, and therefore, the coupling impedance is within the range of +/5%.

(92) When the degree of coupling C is set to 9.6 dB by making the distance d 0.1 mm and when the degree of coupling C is set to 16.0 dB by making the distance d 0.2 mm, the reflective coefficient S.sub.11 on the main board side in the band center frequency (7 GHz) is found through electromagnetic field analysis simulation in the following in the case where W.sub.c is set to 0.40 mm and in the case where W.sub.c is set to 0.25 mm.

(93) TABLE-US-00002 TABLE 2 Degree of Distance d Coupling C. W.sub.c = 0.40 mm W.sub.c = 0.25 mm 0.10 mm 9.6 dB 18 dB 22 dB 0.20 mm 16.0 dB 26 dB 28 dB 0.25 mm 19.2 dB 31 dB 27 dB

(94) It is shown that the reflective coefficient is smaller (S.sub.11=22 dB<18 dB) and the impedance is matched better for the lines 24.sub.3 and 24.sub.4 of which the width at the coupler end on the main board side is smaller (W.sub.c=0.25 mm) when the distance is smaller (d=0.1 mm) and the coupling is stronger (C=9.6 dB). Meanwhile, it is shown that the reflective coefficient is smaller (S.sub.11=31 dB<27 dB) and the impedance is matched better for the lines 24.sub.1 and 24.sub.2 of which the width at the coupler end on the main board side is greater (W.sub.c=0.40 mm) when the distance is greater (d=0.25 mm) and the coupling is weaker (C=19.2 dB).

(95) Here, the coupler end of the child board may be varied in the same manner as for the main board, and as a result, the impedance and the degree of coupling can be controlled more precisely, which is an advantage. Here, a dedicated memory module is mounted on each mounting position, and thus, there is a disadvantage that the same memory module cannot be used for a different mounting position.

Example 3

(96) Next, the directional coupling-type multi-drop bus according to Example 3 of the present invention is described in reference to FIG. 19. In Example 3, the portions where a module is not mounted are not provided with a memory or a transmitter/receiver circuit, and a child board for a terminal having only a coupler and a terminal resistor is mounted. FIG. 19 is a cross-sectional diagram showing the directional coupling-type multi-drop bus according to Example 3 of the present invention, and a board for a terminal, that is to say, a terminal module 40, is mounted on a location where a memory module is not mounted. The remaining structure is the same as in Example 1. Though memory modules are mounted on both sides in this figure, memory modules may be mounted starting from an end in the order in which the degree of coupling of the directional coupler is greater as shown in FIG. 20.

(97) This terminal module 40 is provided with a child board 41 that is the same as for the memory module 30, a coupler end 42, and terminal resistors 45 and 46 for terminating the two ends of the coupler end 42, and a transmitter/receiver chip or a DRAM is not mounted on the terminal module 40 to which the terminal potential is provided from the main board 20. Here, symbols 43 and 44 are via wires.

(98) The system is designed so that the impedance of a coupling portion lowers so as to match the impedance of the bus when a memory module 30 is mounted, and therefore, the impedance is high and not matched when a memory module 30 is not mounted. The impedance of the bus can be matched for data transfer at a higher speed by mounting a terminal module 40 on a place where a memory module 30 is not mounted. Though the terminal resistor 45 on the forward direction side of the terminal module 40 can be omitted, it is desirable not to omit it, taking into consideration the fact that the signal is slightly coupled in the forward direction.

(99) Thus, a terminal module is mounted in a coupler portion where a memory module is not mounted in Example 3 of the present invention, and therefore, the impedance of the bus can be matched without adjusting the number of coupler ends on the main board even in the case where the number of required memory modules is small.

Example 4

(100) Next, the directional coupling-type multi-drop bus according to Example 4 of the present invention is described in reference to FIG. 20. In Example 4, the plane on the main board is removed only from the coupling portions so that a child board having a plane is mounted on a portion on which a module is not mounted so as to work as a plane for the bus coupler.

(101) FIG. 20 is a cross-sectional diagram showing the directional coupling-type multi-drop bus according to Example 4 of the present invention, where the rear surface of a coupling portion on the main board 20 provides a missing portion of the plane 22. In addition, memory modules 30 are mounted sequentially starting from a place where the degree of coupling is stronger, that is to say, a place farther away from the transmitter/receiver chip, and a plane module 50 is mounted on a place on which a memory module 30 is not mounted. The remaining points are the same as in Example 1. The farther away a high-frequency signal is from the transmitter/receiver chip 28 on the main board 20, the easier it attenuates, and therefore, memory modules 30 may be mounted as in FIG. 19.

(102) On the rear surface of the child board 51, plane modules 50 are provided with a plane 52, an organic insulating film 53 such as of a solder resist, and an organic insulating film 54 for adjusting the thickness so that the plane potential (typically, grounded) is given from the main board 20.

(103) The system is designed so that the impedance of a coupling portion lowers so as to match the impedance of the bus when a memory module 30 is mounted, and therefore, the impedance is high and not matched when a memory module 30 is not mounted. The thickness of the organic insulating film 54 in a plane module 50 is determined so that the impedance of the bus can be matched by mounting the plane module 50 on a place where a memory module 30 is not mounted.

(104) The farther away a coupler is from the transmitter/receiver chip 28 on the main board 20, the higher the impedance of the coupler is set, and therefore, the thickness of the organic insulating film 54 in the plane module 50 is determined so that the farther away the plane module 50 is placed, the shorter the distance between the coupler end 24 on the main board 20 and the plane 52 in the plane module 50 is.

Example 5

(105) Next, the directional coupling-type multi-drop bus according to Example 5 of the present invention is described in reference to FIG. 21. In Example 5, the main board has a multilayer wiring structure, and the distance d is varied by changing the level of the layer of the wires used in the differential wires or the coupler end.

(106) FIG. 21 is a cross-sectional diagram showing the directional coupling-type multi-drop bus according to Example 5 of the present invention, where a multilayer wired board having four or more layers is used for the main board 20 so that the distance d vis--vis the coupler is varied by selecting wires in whichever layer is used to form the coupler end. The remaining structure is the same as in Example 1.

(107) Though the cost for forming an organic insulating film through deposition becomes unnecessary as compared to the method for forming an organic insulating film through deposition on the surface of the main board in Example 1, it is difficult to finely adjust the distance d vis--vis the coupler. Accordingly, two or more coupler ends may be formed of wires in the same level of the layer, and even this structure can gain excellent properties as compared to the case where the degree of coupling C is the same for all the couplers.

Example 6

(108) Next, the directional coupling-type multi-drop bus according to Example 6 of the present invention is described in reference to FIG. 22. In Example 6, the degree of coupling C is varied by changing the distance between couplers on the main board, and the remaining structure is the same as in Example 1.

(109) FIG. 22 is a plan diagram showing the directional coupling-type multi-drop bus according to Example 6 of the present invention, where the degree of coupling C is adjusted by providing a structure where the closer the couplers are to the transmitter/receiver chip 28 on the main board side, the greater the distance S.sub.ck (k=1, 2, . . . , n1) between coupler ends 24 is as compared to the distance S.sub.c of a coupler end 32 on the child board side.

(110) As shown in FIG. 13, the greater the positional shift is between the two coupler ends, the lower the degree of coupling is, and therefore, the distance S.sub.ck at the coupler end 24 on the main board side is set as follows:
S.sub.c1S.sub.c2S.sub.c3S.sub.c4S.sub.c5(=S.sub.c), where S.sub.c1>S.sub.c5.
The system is affected in a more complex manner by the precision in alignment as compared to the method in Example 1.