TRANSITION STRUCTURE BETWEEN TRANSMISSION LINE OF MULTILAYER PCB AND WAVEGUIDE
20230088793 · 2023-03-23
Assignee
Inventors
Cpc classification
H05K1/0242
ELECTRICITY
H05K1/0251
ELECTRICITY
H05K1/115
ELECTRICITY
International classification
Abstract
A transition structure between a transmission line of a multilayer PCB and a waveguide is proposed. The transition structure includes the waveguide comprising an interior space on one side thereof and having an inlet for accommodating a part of a stripline, the transmission line comprising a first ground layer of the multilayer PCB composed of at least two or more dielectric layers, the stripline extending from the transmission line and protruding into the waveguide through the inlet of the waveguide, and a single via hole or a plurality of via holes formed between the first ground layer and a bottommost ground layer, wherein each via hole is positioned at the inlet of the waveguide.
Claims
1. A transition structure between a transmission line of a multilayer PCB and a waveguide, the transition structure comprising: the waveguide comprising an interior space on one side thereof and having an inlet for accommodating a part of a stripline; the transmission line comprising the stripline and at least two ground layers below the stripline of the multilayer PCB composed of at least two or more dielectric layers; the stripline extending from the transmission line and protruding into the waveguide through the inlet of the waveguide; and a single via hole or a plurality of via holes formed between the at least two ground layers, wherein each via hole is positioned at the inlet of the waveguide.
2. The transmission line of claim 1, wherein a dielectric layer comprising the stripline is connected from a dielectric layer of the transmission line.
3. The transition structure of claim 1, wherein the stripline is spaced apart from a backshort of the waveguide by a predetermined distance.
4. The transition structure of claim 1, wherein each via hole is arranged at a last end of the inlet of the waveguide.
5. The transition structure of claim 1, wherein each via hole is installed as a single via hole array or a plurality of via hole arrays
6. The transition structure of claim 1, wherein each via hole is installed by arranging in a zigzag vertically or horizontally.
7. The transition structure of claim 1, wherein a spacing between each via hole is arranged in a range of 10 to 500 μm.
8. The transition structure of claim 1, wherein a via pillar is used instead of each via hole.
9. The transition structure of claim 1, wherein the dielectric layers constituting the multilayer PCB are composed of at least one or more different dielectrics.
10. The transition structure of claim 1, wherein a dielectric dissipation factor of a topmost dielectric layer constituting the multilayer PCB is lower than dielectric dissipation factors of other dielectric layers other than the topmost dielectric layer.
Description
DESCRIPTION OF DRAWINGS
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MODE FOR INVENTION
[0051] Hereinafter, the objectives, other objectives, features and advantages of the present disclosure will be readily understood through the following preferred exemplary embodiments in conjunction with the accompanying drawings. However, the present disclosure is not limited to the exemplary embodiments described herein and may be embodied in other forms.
[0052] Rather, the exemplary embodiments introduced herein are provided so that the disclosed subject matter may be thorough and complete, and that the spirit of the present disclosure may be sufficiently conveyed to those skilled in the art.
[0053] The exemplary embodiments described and illustrated herein also include complementary exemplary embodiments thereof.
[0054] In this specification, the singular form also includes the plural form unless otherwise specified in the phrase. As used herein, “comprises” and/or “comprising” does not exclude the presence or addition of one or more other components in addition to the mentioned components.
[0055] Hereinafter, the present disclosure will be described in detail with reference to the drawings. In describing the specific exemplary embodiments below, various characteristic contents have been prepared to more specifically explain the disclosure and help understanding. However, a reader having enough knowledge in this field to understand the present disclosure may recognize that the present disclosure may be used without these various specific details. In some cases, it is mentioned in advance that in describing the present disclosure, parts that are commonly known and not largely related to the present disclosure are not described in order to avoid confusion in explaining the present disclosure.
[0056]
[0057] Such a transmission line 200 is composed of a dielectric layer 210, a metal layer 220 for signal transmission on an upper surface of the dielectric layers 210, and a metal layer 221 as a ground layer on a lower surface of the dielectric layer 210 corresponding to the metal layer 220. At a last end of the transmission line, a stripline 300 having no ground layer on a bottom of the dielectric layer protrudes and is positioned inside a waveguide 100, so as to be coupled thereto. Meanwhile, a metal layer 222 for a ground layer of the entire PCB is also formed on a lowermost bottom surface of the entire dielectric layers 210 and 211 constituting the multilayer PCB, that is, a bottom surface of the lowermost dielectric layer 211.
[0058] For impedance matching to reduce loss, each of these transmission lines such as CPWGs and microstrips has a different width of a metal layer that transmits signals, and accordingly the stripline protruding into the waveguide should also be planned with a design and a size, which reduce the loss.
[0059]
[0060] The transition structure between the transmission line of the multilayer PCB and the waveguide according to the exemplary embodiment of the present disclosure is configured to include: a waveguide 100 including an interior space 110 on one side thereof and having an inlet 120 configured to accommodate a part of a stripline 300; a transmission line 200 including a first ground layer 221 of the multilayer PCB composed of at least two or more dielectric layers 210 and 211; the stripline 300 extending from the transmission line 200 and protruding into the waveguide 100 through the inlet 120 of the waveguide 100; and a single via hole or a plurality of via holes 400 formed between the first ground layer 221 and a lowermost ground layer 222, wherein each via hole 400 is positioned at the inlet 120 of the waveguide 100.
[0061] More specifically, the transmission line 200 of the PCB is connected from an integrated circuit (not shown) to transmit input/output signals, and transmit the signals in a form of CPWG, microstrip, or the like. Such CPWG or microstrip is described as a general form of the configuration, but is not limited thereto.
[0062] Such a transmission line 200 is configured in a way that a partial area 300 extending and protruding toward the inside of the waveguide 100 is coupled to the waveguide 100, and as such, signals are transmitted to the inside of the waveguide 100 by means of the coupling of the stripline 300 that is the last end of the transmission line protruding into the waveguide 100. The strip line is formed to be spaced apart from an inner surface of an upper cover a-a′ of the waveguide, that is, a backshort 130 of the waveguide, by a predetermined space. Such a separation space becomes an important design factor of a transition structure in order to reduce transition loss.
[0063] In addition, since the transmission line and the stripline extending and protruding therefrom may be manufactured at the same time when the same PCB, that is, the same dielectric substrate layer is used, the transmission line and the stripline may be easily manufactured while reducing the cost.
[0064] For impedance matching to reduce loss, each of these transmission lines such as CPWG and microstrip has a different width of a metal layer 220 transmitting signals, and accordingly, the stripline 300 protruding into the waveguide 100 should also be planned with a design and a size, which reduce the loss.
[0065] In this case, in an area adjacent to the stripline 300 protruding from the transmission line 200 of the multilayer PCB, via holes 400 are formed between the ground layers of the transmission line of the multilayer PCB, that is, a first ground layer 221 from the top of the multilayer PCB and a bottommost ground layer 222 formed on the bottom surface of the multilayer PCB, so as to serve as a via fence, thereby reducing signal loss due to the second dielectric layer and effectively propagating signals toward an output unit of the waveguide 100.
[0066] Here, the via hole refers to a structure that electrically connects metal layers in multilayer wiring to each other by means of a hole formed to have a circular cross-section and provided with a metal layer coated on a side surface thereof in a vertical direction therein for electrical connections between the metal layers in the multilayer wiring in a common PCB process. In this way, only the side surface of the interior of the via hole is composed of the metal layer to electrically connect upper and lower metal layers to each other, but when necessary, the via hole may also be used by filling the inside thereof with metal. Such via holes are manufactured using in the common PCB manufacturing process, and is formed in a circular shape having a size of a diameter of several tens to hundreds of micrometers in the manufacturing process. Naturally, the via holes may also be manufacturable for use in a size greater than or equal to the said size, or smaller than or equal to the said size according to the manufacturing process. In addition, it is noted that as for the shape of the via holes, various shapes easy to be manufactured, the shapes having not only a circular cross section and the like, but also a rectangular cross section may also be usable.
[0067] These via holes 400 may be arranged in a line as shown in
[0068] Here, it is noted that the arrangement means that the plurality of via holes 400 is aligned in one direction.
[0069] A spacing between via holes 400 may also be a spacing of several tens to hundreds of pm depending on the manufacturing process. In particular, when the spacing of the via holes becomes 10 to 500 μm corresponding to a frequency domain of the ultra-high frequencies used and transmitted in such ultra-high frequency circuits, the effect caused by the spacing of the via holes may be increased.
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[0071] The configuration of the transition structure of the transmission line of the multilayer PCB and the waveguide is the same as shown in
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[0075] Here, it should be noted that the via pillar means a structure having a predetermined area, not the shape of a via hole 400.
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[0077] Via holes 400 are similarly applied between a corresponding ground layer of the transmission line and a ground layer of a bottom surface, that is, a first ground layer 221 and a third bottommost ground layer 222 of the multilayer PCB, so as to reduce transition loss due to PCB substrate layers, thereby effectively transmit signals.
[0078] As described above, these dielectric layers 210, 211, and 212 may all use the same dielectric material or, when necessary, may use heterogeneous dielectric materials by bonding heterogeneous materials. In particular, it is preferable to apply a dielectric layer, made of a material such as Teflon having low dielectric loss, to a first layer at the top, the first layer playing an important signal transmission role. In the case of the multilayer PCB in which heterogeneous dielectric materials are bonded in this way, some layers have particularly low dielectric loss (i.e., loss tangent), and a low-cost layer with good mechanical properties may be applied to a lower layer.
[0079] In addition, the dielectric layers constituting the multilayer PCB presented in the present disclosure may be composed of at least one or more different dielectrics, but it is preferable to make a dielectric dissipation factor of the top dielectric layer constituting the multilayer PCB to be low compared to dielectric dissipation factors of other dielectric layers other than the topmost dielectric layer.
[0080] In addition, although the multilayer PCB having three dielectric layers 210, 211, and 212 has been illustrated and described in
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[0082] In addition, although the multilayer PCB having the three dielectric layers 210, 211, and 212 has been illustrated and described in
[0083]
[0084] In a case of
[0085] In the case of
[0086] In the case of
[0087] In the case of
[0088] In the case of
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[0090] The exemplary embodiments described in the present specification and the configurations shown in the drawings are only the most preferred exemplary embodiments of the present disclosure, and do not represent all the technical ideas of the present disclosure, and accordingly, it should be appreciated that there may be equivalents and modifications at the time when the present application is filed.