DEVICE, SYSTEM AND METHOD FOR EFFICIENT COSET DECODER BY TRANSFORM

Abstract

A device, system and method for decoding. A noisy version of an error correction codeword may be received, for example, over a noisy communication channel or retrieved from a memory device (e.g. a flash memory device). One or more symbol probabilities may be transformed, from an initial domain to a transformed domain, the symbol probabilities being one or more individual symbols of the received error correction codeword were transmitted as one or more symbols in candidate transmitted error correction codewords. In the transformed domain, a plurality of the transformed symbol probabilities may be composed to generate a combined coset probability defining the likelihood that the transmitted error correction codeword is associated with the individual symbols belongs to a particular one of a plurality of candidate cosets. A plurality of the coset probabilities for the plurality of respective cosets may be inverse transformed from the transformed domain to the initial domain.

Claims

1. A method for decoding, the method comprising: receiving a noisy version of an error correction codeword; transforming, from an initial domain to a transformed domain, one or more symbol probabilities that one or more individual symbols of the received error correction codeword were transmitted as one or more symbols in candidate transmitted error correction codewords; in the transformed domain, composing a plurality of the transformed symbol probabilities to generate a combined coset probability defining the likelihood that the transmitted error correction codeword is associated with the individual symbols belongs to a particular one of a plurality of candidate cosets, wherein the plurality of candidate cosets are mutually exclusive subsets of a codebook defining all possible values of the error correction codeword; and inverse transforming, from the transformed domain to the initial domain, a plurality of the coset probabilities for the plurality of respective cosets.

2. The method of claim 1 comprising receiving the noisy version of an error correction codeword transmitted by a source device to a receiver device over a communication channel.

3. The method of claim 1 comprising reading the noisy version of an error correction codeword previously stored in a memory device by a memory controller.

4. The method of claim 1, wherein the memory device is a flash memory device.

5. The method of claim 1 comprising, in the initial domain, executing a maximum likelihood coset criterion to select the candidate coset that has a maximum one of the plurality of coset probabilities to reduce the set of the plurality of candidate cosets to a most likely coset in which the transmitted error correction codeword most likely belongs.

6. The method of claim 1 comprising executing a sequential coset decoder to iteratively execute the maximum likelihood coset criterion, wherein, in each current iteration, the sequential coset decoder selects a most likely coset of the coset selected in the previous iteration, wherein the most likely coset of the current iteration has a smaller number of candidate error correction codewords than the most likely coset of the previous iteration.

7. The method of claim 6 comprising executing the sequential coset decoder a number of iterations until the number of candidate error correction codewords in a final coset generated in a final iteration is below a threshold number.

8. The method of claim 6 comprising executing the sequential coset decoder a number of iterations until a duration of time estimated for decoding the candidate error correction codewords in a final coset generated in a final iteration is below a threshold duration of time.

9. The method of claim 1 comprising executing a maximum likelihood codeword criterion on the selected coset in order to determine a most likely transmitted error correction codeword in the most likely coset that has a maximum likelihood codeword criteria value.

10. The method of claim 1 comprising executing multiple decoder circuits, in series, wherein the output of a first of the multiple decoder circuits is sent in the transformed domain, without inverse transforming the output, to a second of the multiple decoder circuits.

11. The method of claim 10 comprising decoding a polar code, wherein the multiple decoder circuits generate multiple coset probabilities for multiple kernels of the polar code, respectively, and combining the multiple coset probabilities to generate a combined coset probability for the entire polar code.

12. The method of claim 1, wherein the coset probabilities are generated for coset by combining the individual symbol probabilities associated with codewords that have a syndrome associated with the coset.

13. The method of claim 12, wherein the coset probabilities are generated for a subset space of syndromes.

14. The method of claim 1, wherein the coset probabilities are generated in the transformed domain using fewer computations than would be used in the initial domain.

15. The method of claim 14 comprising reducing the number of computations from an order of at most n.Math.|F|.sup.k.sup.1 computations in the initial domain to an order of at most n+(k.sub.1k.sub.2) log(|F|)).Math.|F|.sup.k.sup.1.sup.-k.sup.2 computations in the transformed domain, where n is the code length, |F| is the size of the alphabet, and k.sub.1, k.sub.2 are the dimensions of a code and a coset of the code

16. The method of claim 1, wherein the transformed symbol probabilities are composed in the transformed domain using multiplication or addition computations representing convolution computations in the initial domain.

17. The method of claim 1, wherein the transforming is performed using a Hardamard transform.

18. The method of claim 1, wherein the transformed domain is a log domain and the plurality of coset probabilities are computed based on log likelihoods.

19. A device comprising: one or more memories to store a noisy version of an error correction codeword; and one or more processors to: transform, from an initial domain to a transformed domain, one or more symbol probabilities that one or more individual symbols of the received error correction codeword were transmitted as one or more symbols in candidate transmitted error correction codewords; in the transformed domain, compose a plurality of the transformed symbol probabilities to generate a combined coset probability defining the likelihood that the transmitted error correction codeword is associated with the individual symbols belongs to a particular one of a plurality of candidate cosets, wherein the plurality of candidate cosets are mutually exclusive subsets of a codebook defining all possible values of the error correction codeword, inverse transform, from the transformed domain to the initial domain, a plurality of the coset probabilities for the plurality of respective cosets.

20. The device of claim 19 comprising a receiver device for receiving the noisy version of an error correction codeword transmitted by a source device over a communication channel.

21. The device of claim 19 comprising a memory device including a memory controller, wherein the one or more processors read the noisy version of an error correction codeword previously stored in the memory device by the memory controller.

22. The device of claim 21, wherein the memory device is a flash memory device.

23. The device of claim 19, wherein the processors are configured to, in the initial domain, execute a maximum likelihood coset criterion to select the candidate coset that has a maximum one of the plurality of coset probabilities to reduce the set of the plurality of candidate cosets to a most likely coset in which the transmitted error correction codeword most likely belongs.

24. The device of claim 19, wherein the processors are configured to execute a sequential coset decoder to iteratively execute the maximum likelihood coset criterion, wherein, in each current iteration, the sequential coset decoder selects a most likely coset of the coset selected in the previous iteration, wherein the most likely coset of the current iteration has a smaller number of candidate error correction codewords than the most likely coset of the previous iteration.

25. The device of claim 19, wherein the processors are configured to execute a maximum likelihood codeword criterion on the selected coset in order to determine a most likely transmitted error correction codeword in the most likely coset that has a maximum likelihood codeword criteria value.

26. A non-transitory computer readable medium comprising instructions which when implemented on one or more processors in a maximum likelihood coset decoder cause the decoder to: receive a noisy version of an error correction codeword; transform, from an initial domain to a transformed domain, one or more symbol probabilities that one or more individual symbols of the received error correction codeword were transmitted as one or more symbols in candidate transmitted error correction codewords; in the transformed domain, compose a plurality of the transformed symbol probabilities to generate a combined coset probability defining the likelihood that the transmitted error correction codeword is associated with the individual symbols belongs to a particular one of a plurality of candidate cosets, wherein the plurality of candidate cosets are mutually exclusive subsets of a codebook defining all possible values of the error correction codeword; and inverse transform, from the transformed domain to the initial domain, a plurality of the coset probabilities for the plurality of respective cosets.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The subject matter regarded as the invention is particularly pointed out and distinctly claimed in the concluding portion of the specification. The invention, however, both as to organization and method of operation, together with objects, features, and advantages thereof, may best be understood by reference to the following detailed description when read with the accompanying drawings in which:

[0013] FIG. 1A is a schematic illustration of a communication system comprising a coset maximum likelihood decoder operating according to an embodiment of the invention;

[0014] FIG. 1B is a schematic illustration of a memory system comprising a coset maximum likelihood decoder operating according to an embodiment of the invention;

[0015] FIG. 1C is a flowchart of a method for performing coset maximum likelihood decoding using an internal transformation according to an embodiment of the invention;

[0016] FIG. 2 provides an example Hadamard transform and associated properties used according to an embodiment of the invention;

[0017] FIG. 3 provides an example fast Hadamard transform (FHT) and associated properties used according to an embodiment of the invention;

[0018] FIG. 4 provides an example transform operating over a binary space for functions defined over the real numbers, , according to an embodiment of the invention;

[0019] FIG. 5 schematically illustrates logical operations (e.g., software) or a circuit diagram (e.g., hardware) for performing operations and according to an embodiment of the invention;

[0020] FIG. 6 schematically illustrates logical operations (e.g., software) or a circuit diagram (e.g., hardware) for performing operations ab and ab according to an embodiment of the invention;

[0021] FIG. 7 is a flowchart of operations of a coset maximum likelihood decoder for codes over a field GF(p) according to an embodiment of the invention;

[0022] FIG. 8 is a flowchart of operations of a coset maximum likelihood decoder for codes over an extension field GF(p.sup.r) according to an embodiment of the invention;

[0023] FIG. 9 defines codes used in Example I according to an embodiment of the invention;

[0024] FIG. 10 provides a circuit to implement Example I according to an embodiment of the invention;

[0025] FIG. 11 schematically illustrates one or more circuits used to implement Example I defined in FIG. 10, using operations specified in FIG. 8, according to an embodiment of the invention;

[0026] FIG. 12 defines codes used in Example II according to an embodiment of the invention;

[0027] FIG. 13 schematically illustrates one or more circuits used to implement Example II according to an embodiment of the invention; and

[0028] FIG. 14 is a flowchart of a method for operating a coset maximum likelihood decoder according to an embodiment of the invention.

[0029] It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

[0030] Error Correcting Codes (ECC) may be used to mitigate noisy channels in communications. An optimal decoder may minimize an output block error rate by using maximum likelihood (ML) criterion (e.g., equations (1)-(2)). However, in many cases, implementing such maximum likelihood (ML) criterion is prohibitive because of the high complexity of the ML computations required to examine all possible candidate codewords in the codebook.

[0031] According to embodiments of the invention, a sequential decoder may implement a multi-step decoding process, where, in each step, the decoder may reduce the number of possible or candidate codewords to be evaluated for the ML criteria. A sequential coset decoder exploits the property that the ML candidate codewords in each sequential step i is always an element of a coset of the code of ML candidate codewords of the previous step i1. Cosets may be mutually exclusive (non-overlapping) subsets of a code including different codewords from a codebook of all possible error correction codewords. Each coset may include a distinct set of codewords, where the union of all cosets of the code is equal to the code and includes all possible codewords in the code. In one example, a coset may define a subset of the codebook or possible codewords set that is an affine linear space (described by a translation of a linear space by a constant vector). For example, the set of all binary vectors of length n with an even number of ones and the set of all binary vectors of length n with an odd number of ones are two cosets of the set of binary vectors. Example sequential coset decoders may be used for applications, such as, successive cancellation (SC) and belief propagation (BP), employed on general concatenated codes such as polar codes.

[0032] In each step, sequential coset decoders may select the most likely coset from the set of possible coset candidates based on one or more maximum likelihood criteria (e.g., equations (3)-(7)). For example, sequential coset decoders may calculate, for each coset, a numerical value or likelihood score and select the coset with the highest value. Embodiments of the invention may provide methods and apparatuses for efficient implementation of sequential coset decoders that reduce power, area and time of computations. These apparatuses and methods may be used in a variety of applications, including, for example, mobile applications, memory applications, and other suitable applications.

[0033] A method and apparatus according to embodiments of the present invention is provided having an efficient implementation of coset decoding based on a transformation of the input likelihoods into an isomorphic structure that allows fast processing, for example, of coset likelihoods (e.g., equations (8)-(11)). After this processing is performed an inverse transform may retrieve the results in the required format (e.g., equation (13)-(14)). Using this format the most probable coset may be selected according (e.g. according to equation (3)).

[0034] According to some embodiments of the present invention, multiple coset decoders or circuits may be used, for example, in series, where the output of a first coset decoder circuit is an input to a second coset decoder circuit. Thus, the coset likelihood processing of the first coset decoder circuit is an intermediate step in a calculation that is provided to the additional second coset decoder circuit. In such embodiments, the likelihood data output from the first coset decoder circuit may remain in the transform space and the inverse transform operation may be eliminated so the input to the second coset decoder circuit includes the processed results of the transformed input. Transform space results may continue to be iteratively transferred to an additional one or more circuits, for example, until the likelihood values of cosets is needed, in which case an inverse transform may be performed.

[0035] Various transformations may be used according to embodiments of the present invention. The transformation may include an isomorphic transformation (e.g., an invertible transformation in which the transformed elements are equivalent under isomorphism), a bijective transformation (e.g., a one-to-one correspondence between elements of the transformed domain and the initial domain), a Fourier transform, a fast Fourier transform, a Hadamard transform, a fast Hadamard transform, or any transform in which a convolution operation in the original domain is simplified in the transform domain. Further embodiments of the present invention may perform a log of the above transformations to operate in the log domain, such that the input to the decoder is the logarithm of the likelihood and a log of the transform is calculated. Other transformations may be used.

[0036] The following notations and conventions are used herein. For any natural number E, the term [l].sub. may denote the set of size l, {0, 1, 2, . . . , l1}. Vectors may be denoted by bold letters and random variables may be denoted by capital letters (e.g., random vectors may be denoted by bold upper-case letters). For ji, u.sub.j.sup.i=[u.sub.j, u.sub.j+1, . . . . , u.sub.i] may denote a sub-vector of vector u of length ij+1 (if i<j, then u.sub.j.sup.i=[ ], the empty vector, and its length is 0). Vectors described herein are assumed to be row-vectors, although column vectors, sequences, or other data structures may be used. Column vectors are generated from row vectors u by the transpose operation, u.sup.T.

[0037] Given a set of possible symbol values F, an error correction code (ECC) (denoted as C) of length n symbols may be a subset of an n-dimensional field F.sup.n. The rate of C may be defined, for example, as

[00001]$R=\frac{{\log }_2.Math..Math.C.Math.}{n.Math.{\log }_2.Math..Math.F.Math.},$

based on the size or magnitude of the code |C|, the size of the field |F| and the length of the code n. For example, as the codeword length n increases, the rate R decreases and the speed decreases for communicating or transferring information. If the set of possible signal values F is a field and C is a linear space in F.sup.n, C is a linear code over F. Such a code C may be defined, in one example, by a generating matrix B having, e.g., k=R.Math.n rows and n columns, such that C={v.Math.B|vF.sup.k)}. The parameter k may denote the code dimension, e.g., such that |C|=|F|.sup.k (the code dimension k is equal to the base |F| logarithm of the size of the code). A dual space of a linear code C may be denoted as C.sup. and may be defined as a plurality of all vectors in F.sup.n that are orthogonal to all the codewords in C. Thus, the dual space C.sup. is orthogonal to its code space C such that any codeword c.sup.C.sup. is orthogonal to any codeword cC, e.g., c.sup..Math.c=0. Codewords c.sup. of the dual space C.sup. may be generated by a dual space generating matrix H (e.g., a parity check matrix of C) that may have, for example, n columns and nk rows, such that cC if and only if c.Math.H.sup.T.Math.=0. A syndrome s of a length n vector v may be defined, for example, as s=v.Math.H.sup.T. Thus, the syndrome of codewords cC is, for example, zero. A syndrome may measure the result of applying the parity check equations (e.g., columns of H) to the values of a codeword v. When all the parity check equations are satisfied (e.g., v.Math.H.sup.T is equal to the zero vector), then codeword v is a codeword in C.

[0038] Consider a channel carrying signals x.fwdarw.y in which a signal xX is transmitted using a transmitter over the channel and a noisy version of the signal yY is received at a receiver. The channel may be memoryless, meaning that the channel noise at one time for one transmission x.sub.i.fwdarw.y.sub.i is independent of the channel noise at another time for another transmission x.sub.j.fwdarw.y.sub.j. A maximum likelihood (ML) codeword decoder may determine for each received channel observation vector y, the most probable transmitted codeword x, for example, by maximizing the following likelihood:

Pr(Y.sub.0.sup.n-1=y.sub.0.sup.n-1|X.sub.0.sup.n-1=x.sub.0.sup.n-1)=.sub.j=0.sup.n-1Pr(Y.sub.j=y.sub.j|X.sub.j=x.sub.j)(1).

This likelihood defines the probability or likelihood of receiving a channel observation vector y if a codeword x is sent over the channel. The maximum likelihood codeword decoder may be defined, for example, as:

{circumflex over (x)}=argmax.sub.x.sub.0.sub.n-1.sub.CPr(Y.sub.0.sup.n-1=y.sub.0.sup.n-1|X.sub.0.sup.n-1=x.sub.0.sup.n-1)(2),

to detect the transmitted codeword {circumflex over (x)}=x.sub.0.sup.n-1C that maximizes this probability, e.g., equation (1). If each codeword in an ECC C is sent over the channel with same probability (e.g., the system has no preference or bias for certain codewords over others, such as preferring 0's over 1's in a binary system), then this maximum likelihood criterion corresponds to a minimum block error probability Pr({circumflex over (X)}X) defining a minimum probability of error that the estimated codeword {circumflex over (x)} is incorrect. If codewords in an ECC C are transmitted with bias, then the maximum likelihood criterion above may be replaced with Pr(Y.sub.0.sup.n-1=y.sub.0.sup.n-1|X.sub.0.sup.n-1=x.sub.0.sup.n-1) Pr(X.sub.0.sup.n-1=x.sub.0.sup.n-1) to take the preference into account. In such a case, the criterion may be referred to as the maximum posteriori probability (MAP) criterion.

[0039] According to some embodiments of the invention, C.sup.(1) and C.sup.(2) may be two linear codes in a space F.sup.n. C.sup.(1) may be a set of all possible codewords of length n and may contain C.sup.(2), for example, C.sup.(2) C.sup.(1), where C.sup.(2) may be referred to as a sub-code of C.sup.(1). k.sub.1 and k.sub.2 may be used to denote the code dimensions of C.sup.(1) and C.sup.(2), respectively. may be used to denote a codeword C.sup.(1). A coset of C.sup.(2) in C.sup.(1) induced by codeword may be defined, for example, as {+c|cC.sup.(2)}. This coset may be denoted as +C.sup.(2) or C.sup.(2)+. Because linear spaces are closed under addition, and both codeword and sub-code C.sup.(2) are contained in C.sup.(1), their sum, coset +C.sup.(2), is also contained in C.sup.(1), for example, +C.sup.(2) C.sup.(1). Since C.sup.(1) has |F|.sup.k.sup.l elements and C.sup.(2) has |F|.sup.k.sup.2 elements, according to the Lagrange theorem, the cosets of C.sup.(2) partition C.sup.(1) into

[00002]$\frac{.Math.C^{\left(1\right)}.Math.}{.Math.C^{\left(2\right)}.Math.}$

distinct codeword subsets. Furthermore, all the vectors in the same coset have the same syndrome. In other words, if x+C.sup.(2), wF.sup.n and H is a parity check matrix of C.sup.(2), then x.Math.H.sup.T=w.Math.H.sup.T if and only if w+C.sup.(2).

[0040] Embodiments of the invention may exploit this syndrome equivalence to identify cosets and thus reduce the maximum likelihood codeword decoder to operate over a smaller coset of the code. This may reduce the relatively high number of computations associated with computing probabilities for all codewords in C.sup.(1) (in maximum likelihood codeword decoding) to a relatively smaller number of computations associated with computing probabilities for the relatively fewer codewords in the maximum likelihood coset of C.sup.(2) in C.sup.(1) (in maximum likelihood coset decoding), thereby reducing computational effort and increasing decoding efficiency. Whereas the maximum likelihood codeword decoder detects the exact codeword that was transmitted, the maximum likelihood coset decoder detects the coset in C.sup.(2) to which the transmitted codeword belongs. Let C.sup.(1)/C.sup.(2) be the set of cosets of C.sup.(2) in C.sup.(1) also known as the factor group of C.sup.(2) in C.sup.(1). The maximum likelihood coset decoder may be defined, for example, as:

{circumflex over (A)}=argmax.sub.AC.sub.(1).sub./C.sub.(2).sub.x.sub.0.sub.n-1.sub.APr(Y.sub.0.sup.n-1=y.sub.0.sup.n-1|X.sub.0.sup.n-1=x.sub.0.sup.n-1).(3)

[0041] In case the channel is memoryless, the maximum likelihood coset decoder of equation (3) requires

[00003]$.Math.C^{\left(1\right)}.Math.-\frac{.Math.C^{\left(1\right)}.Math.}{.Math.C^{\left(2\right)}.Math.}={.Math.F.Math.}^{k_1}-{.Math.F.Math.}^{k_1-k_2}$

additions and |C.sup.(1)|.Math.(n1)=|F|.sup.k.sup.1(n1) multiplications. An alternative to computing equation (3) may be derived using a parity check matrix of C.sup.(2), denoted as H. Let S be the set of syndromes corresponding to cosets of C.sup.(2) in C.sup.(1), e.g., S={s|s=x.Math.H.sup.T,xC.sup.(1)}. This results in the following equation:

[00004]$\begin{array}{cc}\underset{x.Math..Math.s.t..Math.H.Math.x^T=s}{\overset{}{.Math.}}.Math.\underset{i=0}{\overset{n-1}{.Math.}}.Math.\mathrm{Pr}\left(Y_i=y_i|X_i=x_i\right)=\underset{x_{n-1}F}{\overset{}{.Math.}}.Math.\mathrm{Pr}\left(Y_{n-1}=y_{n-1}|X_{n-1}=x_{n-1}\right).Math.\left(\underset{x_0^{n-2}.Math.{\left(H^{\left[n-2\right]}\right)}^T=s-x_{n-1}.Math.{\left(H_{n-1}\right)}^T}{\overset{.Math.x_0^{n-2}.Math.s.t.}{.Math.}}.Math.\underset{j=0}{\overset{n-2}{.Math.}}.Math.\mathrm{Pr}\left(Y_j=y_j|X_j=x_j\right)\right),& \left(4\right)\end{array}$

where H.sub.j is the j.sup.th column in the matrix H, and H.sup.[j] is the matrix that contains columns 0 . . . j of H. Using the notation, g.sub.j(s)=Pr(Y.sub.j=y.sub.j|X.sub.j=x.sub.j) if there exists x.sub.jF such that s=x.sub.j.Math.(H.sub.j).sup.T; otherwise g.sub.j(s)=0. Further denoting,

[00005]$\begin{array}{cc}.Math.g^{\left(j\right)}\left(s\right)=\underset{x_0^j.Math.{\left(H^{\left[j\right]}\right)}^T=s}{\overset{}{\stackrel{x_0^j.Math..Math.s.t.}{.Math.}}}.Math.\underset{i=0}{\overset{j}{.Math.}}.Math.\mathrm{Pr}\left(Y_i=y_i|X_i=x_i\right),.Math..Math.\mathrm{results}.Math..Math.\mathrm{in}.Math.\text{:}.Math..Math..Math.g^{\left(n-1\right)}\left(s\right)=\underset{x.Math..Math.s.t..Math.x.Math.H^T=s}{\overset{}{.Math.}}.Math.\underset{i=0}{\overset{n-1}{.Math.}}.Math.\mathrm{Pr}\left(Y_i=y_i|X_i=x_i\right)=\underset{s^{}{F}^{n-k}}{\overset{}{.Math.}}.Math.g_{\left(n-1\right)}\left(s^{}\right).Math.g^{\left(n-2\right)}\left(s-s^{}\right).& \left(5\right)\end{array}$

[0042] Equation (5) represents the maximum likelihood coset criterion as a convolution operation, e.g., between g.sup.(n-2)() and g.sub.(n-1)(), denoted as g.sub.(n-1)*g.sup.(n-2), where,

g.sup.(n-1)=g.sub.0*g.sub.1*g.sub.2* . . . *g.sub.n-1(6).

To calculate g.sup.(n-1)(s) for all syndromes sF.sup.n-k.sup.2, at most (n1).Math.|F|.sup.n-k.sup.2(|F|1) addition and (n1)|F|.sup.n-k.sup.2.sup.+1 multiplications may be executed using cosets of C.sup.(2). This upper-bound is not tight since not all the syndromes of cosets of C.sup.(2) are of considered, rather than only those that are also in C.sup.(1). Careful analysis results in smaller number of calculations (dependent of C.sup.(1) and C.sup.(2)). In any case the complexity is not higher than |F|.sup.k.sup.1|F|.sup.k.sup.1.sup.-k.sup.2 additions and |C.sup.(1)|.Math.(n1)=|F|.sup.k.sup.1.Math.(n1) used to compute equation (3) above.

[0043] Coset decoders shrink the target set of candidate codewords from an initial relatively large code C.sup.(1) to a smaller coset +C.sup.(2) partition of C.sup.(1), thereby reducing the number of maximum likelihood computations used to evaluate the target codewords. This reduction may be sequentially repeated multiple times to iteratively reduce or narrow the size of the target coset and the associated number of maximum likelihood computations using a sequential codeword decoder.

[0044] Sequential codeword decoders contain a plurality of sequential decoding steps such that, in each step, the size or number of candidates in each coset is decreased. Let C.sup.(1), C.sup.(2), . . . , C.sup.(m) be a chain of nested linear codes such that C.sup.(i+1) is a sub-code of C.sup.(i), for i=1, 2, . . . , m1. A codeword sequential decoder for C.sup.(1), induced by this chain of nesting may be defined, for example, as follows:

[0045] Step (i): A codeword {circumflex over ()}.sup.(i) may be received as an output of a previous step (i1), for example, where i2, and {circumflex over ()}.sup.(1)=0. A codeword from the coset {circumflex over ()}.sup.(i)+C.sup.(i) may be used to determine a next sequential coset {circumflex over ()}.sup.(i+1)+C.sup.(i+1), for example, using the following maximum likelihood sequential coset decoder criterion:

[00006]$\begin{array}{cc}\hat{A}={\arg .Math.\max }_{A.Math.{}^{C\left(i\right)}.Math./C^{\left(i+1\right)}}.Math.\underset{x_0^{n-1}A}{\overset{}{.Math.}}.Math.\mathrm{Pr}\left(Y_0^{n-1}=y_0^{n-1}|X_0^{n-1}=x_0^{n-1}+{\hat{}}^{\left(i\right)}\right),& \left(7\right)\end{array}$

where {circumflex over ()}.sup.(i+1) may be selected such that {circumflex over ()}.sup.(i+1)+C.sup.(i+1)={circumflex over ()}.sup.(i)+.

[0046] Step (i) may be repeated sequentially, e.g., for 1im2, for some integer m. In each sequential step (i), the input coset {circumflex over ()}.sup.(i)+C.sup.(i) may be reduced to a relatively smaller coset {circumflex over ()}.sup.(i+1)+C.sup.(i+1). In each step (i) of the sequential decoder, the size of the coset may decrease, e.g., by a multiplicative factor of

[00007]$\frac{.Math.C^{\left(i\right)}.Math.}{.Math.C^{\left(i+1\right)}.Math.},$

and the number of maximum likelihood coset computations may also decrease, e.g., by the same factor. At a certain iteration, the size of the final coset {circumflex over ()}.sup.(m)+C.sup.(m) may be sufficiently small that the computational effort required for ML codeword decoding (computing individual likelihoods for all candidate codewords in the coset) is minimal, reduced, or below threshold, thereby outweighing the benefit of further reducing the coset. The step (i) iteration may stop and the process may proceed to step (m), for example, when the size of the final coset {circumflex over ()}.sup.(m)+C.sup.(m) is sufficiently small or below threshold, the number of computations used for ML codeword decoding is sufficiently small or below threshold, and/or the time estimated for executing codeword decoding is a sufficiently small or below threshold (e.g., to allow real-time decoding applications such as communications). In one example, the decoder may switch from sequential coset decoding (step (i)) to codeword decoding (step (m)) when the number of codeword decoding computations is less than or equal to the number of coset decoding computations (or a fraction or multiple thereof).

[0047] Step (m) may perform codeword ML decoding on coset {circumflex over ()}.sup.(m)+C.sup.(m). Because the coset {circumflex over ()}.sup.(m)+C.sup.(m) has a sufficiently small number of codewords, this ML codeword computation may be executed quickly and efficiently. In some examples, the number of codewords in a sufficiently small coset and the number of computations required in step m may vary, e.g., 10, 100, 1000, but is generally fewer than 1,000-10,000. In other examples, other threshold numbers of codewords or steps may be used.

[0048] Examples of codes decoded using coset ML decoders may include general concatenated codes (GCC) ECCs and general polar codes. General concatenated codes (GCC) ECCs are an example in which coset decoders may be applied on inner-codes. General polar codes are a sub-ensemble of the GCC in which concatenation is recursive, e.g., the outer-codes themselves are GCCs. As such, decoding operations for polar codes, e.g. successive cancellation (SC) and belief propagation (BP), may include coset ML decoders as sub-operations within the decoding process. These example codes and operations are not intended to be limiting.

[0049] Some embodiments of the invention may operate in the log domain. In such embodiments, the above likelihoods or probabilities may be measured in the log domain, for example, using log-likelihoods (LLs) such as log.sub.2 (Pr(Y=y|X=x)) or normalized versions thereof such as log-likelihood ratios (LLRs). The above calculations may also be performed in the log domain, which may in some cases improve numerical stability. In such embodiments, multiplication in equation (5) may be replaced by log-likelihood additions; additions in equation (5) may be performed in the log domain using a max*(,) operator, e.g., where max*(,)=max(,)+log.sub.2(1+2.sup.||).

[0050] One bottleneck of coset ML decoders is the coset likelihood calculations, e.g., equations (3), (6) and (7). In particular, the convolution operations in equation (5) are relatively complex and often delay decoding processes. Embodiments of the invention may reduce decoding complexity by, prior to processing, transforming the likelihoods from an initial domain to a transform domain to simplify the coset likelihood computations. For example, received likelihoods may be transformed into a transform domain where the convolution operations are replaced by much simpler multiplication operations, or a log transform domain where the convolution operations are replaced by much simpler addition operations, thereby decrease the computational complexity and increase decoding speed. Let C.sup.(1) and C.sup.(2) be two linear codes of length n over alphabet F, with dimensions k.sub.1, k.sub.2 such that k.sub.1>k.sub.2. Assume that C.sup.(2) is a subcode of C.sup.(1) and we would like to calculate the coset likelihoods in (3). Using the convolution method (direct method) requires O(n.Math.|F|.sup.k.sup.1) operations. On the other hand, using at least one embodiment of the invention requires O((n+(k.sub.1k.sub.2).Math.log(|F|)).Math.|F|.sup.k.sup.1.sup.-k.sup.2). Computational efficiency may also be increased by a circuit that combines and reuses operations, e.g., and operations as shown in FIGS. 5-6.

[0051] Reference is made to FIG. 1A, which schematically illustrates a system comprising a maximum likelihood coset decoder operating according to an embodiment of the invention. The system may include one or more source transmitter(s) 110 and one or more receiver(s) 112. Transmitter(s) 110 and receiver(s) 112 may communicate wirelessly or via a wired connection. For wireless communication, transmitter(s) 110 and receiver(s) 112 may include one or more antenna(s) 114 and 116, respectively, for transmitting and/or receiving signals wirelessly over one or more communication channel(s). Receiver(s) 112 may receive one or more noisy error correction codeword(s) transmitted by source transmitter(s) 110 over wired or wireless communication channel(s) and may use a decoder 126 to decode the codeword(s) to reconstruct the transmitted signal.

[0052] Transmitter(s) 110 and receiver(s) 112 may include one or more controller(s) or processor(s) 118 and 120, respectively, configured for executing operations or computations disclosed herein and one or more memory unit(s) 122 and 124, respectively, configured for storing data such as inputs or outputs from each of the operations or computations and/or instructions (e.g., software) executable by a processor, for example for carrying out methods as disclosed herein. Processor(s) 120 may decode a noisy version of the codeword sent from transmitter(s) 110 by first transforming, from an initial domain to a transformed domain, one or more symbol probabilities that one or more individual symbols of the received error correction codeword were transmitted as one or more symbols in candidate transmitted error correction codewords. In the transformed domain, processor(s) 120 may compose a plurality of the transformed symbol probabilities to generate a combined coset probability defining the likelihood that the transmitted error correction codeword is associated with the individual symbols belongs to a particular one of a plurality of candidate cosets. The plurality of candidate cosets may be mutually exclusive subsets of a codebook defining all possible values of the error correction codeword. Processor(s) 120 may inverse transforming, from the transformed domain to the initial domain, a plurality of the coset probabilities for the plurality of respective cosets. Processor(s) 120 may use the plurality of the coset probabilities for ML coset decoding, sequential ML coset decoding, approximated ML codeword decoding, polar code decoding, or other operations.

[0053] Processor(s) 118 and 120 may include, for example, a central processing unit (CPU), a digital signal processor (DSP), a microprocessor, a controller, a chip, a microchip, an integrated circuit (IC), or any other suitable multi-purpose or specific processor or controller. Processor(s) 118 and 120 may individually or collectively be configured to carry out embodiments of a method according to the present invention by for example executing software or code. Memory unit(s) 122 and 124 may include, for example, random access memory (RAM), dynamic RAM (DRAM), flash memory, volatile memory, non-volatile memory, cache memory, buffers, registers, short term memory, long term memory, or other suitable memory units or storage units. Processor(s) 120 may be part of a general-purpose processor executing special-purpose decoding software or a special-purpose hardware unit that is a dedicated decoder 126.

[0054] Transmitter(s) 110 and receiver(s) 112 may include one or more input/output devices, such as a monitor, screen, speaker or audio player, for displaying, playing or outputting to users results provided by the decoder (e.g., data communicated by transmitter(s) 110 decoded by decoder 126) and an input device (e.g., such as a mouse, keyboard, touchscreen, microphone, or audio recorder) for example to record communication, control the operations of the system and/or provide user input or feedback, such as, selecting one or more encoding or decoding parameters, such as, decoding speed, decoding accuracy, a number or threshold number of iterations for a sequential decoder, a threshold size of a coset that may be used for codeword decoding, a threshold amount of time or duration allowable for coset decoding, codeword decoding, or total decoding, a threshold maximum time delay allowable between the time of receiving a signal and the time of decoding the signal, etc.

[0055] Reference is made to FIG. 1B, which schematically illustrates a memory system comprising a maximum likelihood coset decoder operating according to an embodiment of the invention. In various embodiments, the memory system may be a flash memory system or another memory system, such as, an electromechanical magnetic discs (e.g. hard disk drives), magnetic tapes and volatile electronic memories (e.g. SDRAM and DRAM), comprising an ECC encoder and decoder. While FIG. 1B illustrates a flash memory system, this system and its components may also be used for these other memory systems. Each of one or more components in FIG. 1B may use its own independent processor(s) or any combination of some or all components in FIG. 1B may use the same processor(s).

[0056] In FIG. 1B, host 150 may represent a client of a memory system, such as a flash memory system 156. Host 150 may run user applications 152 over an operating system 151. User applications 152 may communicate with memory system 156, for example, using low level drivers 153 that send commands to memory system 156 over a memory interface, such as a flash memory interface 154. Typical commands include commands to store user data in a specified memory location (e.g., identified by an address) and to retrieve user data from a specified memory location of memory system 156. Memory interface 154 may communicate with a memory controller, such as a flash memory controller 158, for example, using a host interface 160 over a memory bus 155.

[0057] Memory controller 158 performs the following tasks: (a) to provide the most suitable interface and protocol for both the host 150 and the memory system 156; (b) to efficiently handle data, maximize transfer speed, and maintain data integrity and information retention. In order to carry out such tasks, some embodiments of the invention implement an application specific device, for example, embedding one or more processor(s) (e.g. 176 and 180, usually 8-16 bits), together with dedicated hardware or software to handle timing-critical tasks. Generally speaking, memory controller 158 can be divided into multiple parts (e.g., parts 160, 162, 164 and 170), which are implemented either in hardware or in firmware.

[0058] Describing components of memory system 156 from top-to-bottom in FIG. 1B, the first component is host interface 160, which implements industry-standard protocol(s) (e.g., Peripheral Component Interconnect Express (PCIe), Serial Attached SCSI (SAS), Serial AT Attachment (SATA), etc.), thus ensuring both logical and electrical interoperability between memory system 156 (e.g., flash memory cards or Solid State Drives (SSDs)) and hosts 150. Host interface 160 may include a mixture of hardware (e.g., buffers, drivers, etc.) and firmware (e.g., permanent software executed by an embedded processor to perform functions such as command decoding, which may decode a command sequence invoked by host 150 and may handle the data flow to/from memory units or dies, such as a flash memory dies 174. The second component of memory system 156 in FIG. 1B is a (e.g., flash) translation layer 162 that translates between logical memory addresses used by host 150 and physical memory locations of the memory dies 174. Specifically, flash translation layer 162 may perform tasks, such as, wear leveling management, garbage collection and bad block management. Flash translation layer 162 may use general purpose processor(s) or dedicated processing hardware 163 and internal memory 165 to perform its tasks. The next component of memory system 156 in FIG. 1B is ECC unit 164, which includes both an ECC encoder 166 and ECC decoder 168. ECC encoder 166 encodes data by adding redundancy (ECC) to the data before storing the data in one of the memory dies 174 and also reads noisy or distorted versions of the codeword. ECC decoder 168 decodes or eliminates the noise from that codeword, thereby allow retrieval of the original data stored at the host 150. Memory controller 158 may communicate with physical memory dies 174 using an interface layer, such as a flash interface layer 170. Physical memory dies 174 may store data by altering the physical state of memory cells contained inside those dies. Commands and data may be sent between controller 156 and a plurality of memory dies 174 over a physical bus 172, also referred to as a channel 172. A single channel may include a plurality of memory dies 174, and interface layer 170 may include a plurality of (m) channels 172. Interface layer 170 may support access (e.g., storage and/or retrieval) to several channels simultaneously or in parallel. Such architectures of multiple dies 174 and/or multiple channels 172 may increase the read and program throughput, relative to a singular channel or singular die structure, which may also be used. In addition, memory controller 158 may include a plurality of ECC unit 164. Each one of ECC unit 164 may be dedicated for a set of one or more channels 172 (e.g., exclusively encoding/decoding data to/from memory dies 174 on only those dedicated channels 172). In other embodiments, ECC units 164 are not dedicated to any specific channel 172, and may decode/encode any codeword as it becomes available regardless of the memory destination or source of the codeword. In such a case, a controlling unit may route encode/decode requests between ECC units 164 and channels 172.

[0059] Memory controller 158 may include one or more controller(s) or processor(s) 176 and 180 for implementation of the ECC encoder 166 and the ECC decoder 168, respectively, configured for executing operations or computations disclosed herein and one or more memory unit(s) 178 and 182, respectively, configured for storing data such as inputs or outputs from each of the operations or computations and/or instructions (e.g., software) executable by a processor, for example for carrying out methods as disclosed herein. Processor(s) 180 may decode a noisy version of the codeword that was computed by the encoder processor 176 by first transforming, from an initial domain to a transformed domain, one or more symbol probabilities that one or more individual symbols of the received error correction codeword were programmed as one or more symbols in candidate programmed error correction codewords. In the transformed domain, processor(s) 180 may compose a plurality of the transformed symbol probabilities to generate a combined coset probability defining the likelihood that the transmitted error correction codeword is associated with the individual symbols belongs to a particular one of a plurality of candidate cosets. The plurality of candidate cosets may be mutually exclusive subsets of a codebook defining all possible values of the error correction codeword. Processor(s) 180 may inverse transform, from the transformed domain to the initial domain, a plurality of the coset probabilities for the plurality of respective cosets. Processor(s) 180 may use the plurality of the coset probabilities for ML coset decoding, sequential ML coset decoding, approximated ML codeword decoding, polar code decoding, or other operations.

[0060] Processor(s) 176 and 180 may include, for example, a central processing unit (CPU), a digital signal processor (DSP), a microprocessor, a controller, a chip, a microchip, an integrated circuit (IC), or any other suitable multi-purpose or specific processor or controller. Processor(s) 176 and 180 may individually or collectively be configured to carry out embodiments of a method according to the present invention by for example executing software or code. Memory unit(s) 178 and 182 may include, for example, random access memory (RAM), dynamic RAM (DRAM), flash memory, volatile memory, non-volatile memory, cache memory, buffers, registers, short term memory, long term memory, or other suitable memory units or storage units.

[0061] Reference is made to FIG. 1C, which is a flowchart of a method for performing coset maximum likelihood decoding using an internal transformation according to an embodiment of the invention. Operations described herein may be executed using components or devices of FIG. 1A and/or FIG. 1B, for example, one or more receiver processor(s) 120 and/or decoder(s) 126 of FIG. 1A and/or one or more ECC decoder 168 processor(s) 180 of FIG. 1B or other devices.

[0062] In operation 101, one or more processor(s) may receive an input to the decoder, for example, one or more individual symbol probabilities measure the likelihoods that one or more individual symbols x of the transmitted error correction codeword X.sub.j were received as one or more symbols y.sub.j in the received noisy error correction codeword Y.sub.j, or y.sub.0.sup.n-1 (also known as the channel observations vector), e.g., Pr(Y.sub.j=y.sub.j|X.sub.j=x) for each xF and 0jn1. Alternatively or additionally, the processor(s) may compute one or more log likelihoods, e.g., log.sub.2 (Pr(Y.sub.j=y.sub.j|X.sub.j=x)) or log-likelihood ratios log.sub.2 (Pr(Y.sub.j=y.sub.j|X.sub.j=0))log.sub.2(Pr(Y.sub.j=y.sub.j|X.sub.j=x)) for xF\{0}. Let C.sup.(1) and C.sup.(2) be linear codes over field F of dimensions k.sub.1, k.sub.2 such that k.sub.1>k.sub.2 and C.sup.(2) is a subcode of C.sup.(1).

[0063] In operation 102, one or more processor(s) may perform a transformation of the individual symbol probabilities, for example, to uniquely represent the likelihoods in a transformed space. The transformation may include an isomorphic transformation, a bijective transformation, a Fourier transform, a fast Fourier transform, a Hadamard transform, a fast Hadamard transform, etc. Other transformations may be used.

[0064] In operation 103, one or more processor(s) may compose the plurality of transformed individual symbols probabilities to generate a combined coset probability for each of a plurality of cosets of a code. Each coset probability may define a likelihood that the transmitted error correction codeword associated with the individual symbols belongs to a particular one of a plurality of candidate cosets. In one example, operation 103 may generate a plurality of |F|.sup.k.sup.1.sup.-k.sup.2 coset probabilities, e.g., .sub.x.sub.0.sub.n-1.sub.APr(Y.sub.0.sup.n-1=y.sub.0.sup.n-1|X.sub.0.sup.n-1=x.sub.0.sup.n-1), for each coset A of C.sup.(2) in C.sup.(1). Alternatively or additionally, the output may be given, e.g., as |F|.sup.k.sup.1.sup.-k.sup.2 log likelihoods or |F|.sup.k.sup.1.sup.-k.sup.21 log-likelihood ratios. Operation 103 may repeat for a number of iterations using a sequential coset decoder to iteratively reduce the size of the coset. Composing the plurality of transformed individual symbols probabilities in the transformed space in operation 103 may convert the convolution operations used in the original domain (e.g., equation (10)) to multiplication and/or addition operations (e.g., equation (11) or its log-domain equivalent), thereby significantly reducing the total number of operations required for computing coset probabilities, as compared with processing in the original space.

[0065] In operation 104, one or more processor(s) may perform an inverse transformation on the plurality of coset probabilities for the plurality of respective cosets to generate the plurality of corresponding coset probabilities in the original domain.

[0066] In operation 105, one or more processor(s) may perform post processing on the inverse transformed data. Post processing is done to convert the output of the inverse transform to what is expected at the next stage. An example may be when the output on 106 is expected to be LLR. In one embodiment of the inverse transform outputs LLs and by appropriate normalization 105 converts it to LLRs. In other embodiments, other normalizations may be used for example to scale the output to a particular range such as a dynamic range.

[0067] In operation 106, the decoder may send the plurality of coset probabilities in the original domain, for example, via a wire, to a next operation or circuit that performs the next stage, such as, ML coset decoding (e.g., according to equation (3)), sequential ML coset decoding, ML codeword decoding (e.g., according to equation (2)), polar code decoding or other operations in order to complete the decoding operation.

[0068] According to some embodiments of the invention, multiple decoder circuits as described in reference to FIG. 1C may be coupled, e.g., in series, as a chain of decoder circuits or looped decoding operations. Moreover, outputs of multiple decoder circuits may be permuted or interleaved to generate a modified output to be passed as input to other circuits. The data output from operation 106 of a first process, processor or decoder, may be used as an input in operation 101 to a second process, processor or decoder (that may correspond to a different code than the first process). In an example in which the chain of circuits is used for decoding polar codes, each circuit may perform likelihood calculations on smaller sub-codes, referred to as kernels, within the polar codes, the results of which are then composed to decode the larger polar codes. The first circuit may skip the inverse transform operation 104 and perform the post-processing operation 105 and output operation 106 in the transform domain, and the second circuit may thus skip the transformation operation 102. Such a chain of circuits as described in reference to FIG. 1C may include a sequence of as many circuits as required. In one embodiment, only the final circuit or process in the chain may perform the inverse transformation 104. An example of an application for such a chain of decoders may be found, for example, in an intermediate step of likelihood calculations of successive cancellation algorithm operating on polar codes.

[0069] Reference is made to FIG. 2, which includes an example Hadamard transform and associated properties used according to an embodiment of the invention. Let p be a prime number and let the set [p].sub. denote {0, 1, . . . , p1}. This set [p].sub. may be a finite field under the operation of addition and multiplication, of p elements (modulo p), and is denoted GF(p). A function (b) 201 (e.g. symbol probability function (b)=Pr(Y=y|X.Math.=b), where b,([p].sub.).sup.m), may be defined from ([p].sub.).sup.m (an m-length vector, where each index has a value between 0 and p1)) to a field e.g., of complex numbers, . A Hadamard transformation F() 202 may also be defined from ([p].sub.).sup.m to . For vectors and b, .Math.b.sup.T=.sub.i=0.sup.m-1.sub.i.Math.b.sub.i, where multiplication and summation are defined as GF(p) operations. Property 204 is an orthogonality property, e.g., between functions

[00008]$e^{-\frac{2.Math.}{p}.Math.\left(.Math.b^T\right)}.Math..Math.\mathrm{and}.Math..Math.e^{\frac{2.Math.}{p}.Math.\left(.Math.b^{{}^T}\right)},$

where may be the argument of the functions, b and b may be constants, and .sub.x,y=1 if and only if x=y and otherwise .sub.x,y=0. Equation 205 may define an inverse transformation. Property 206 is a convolution property, e.g., if g() is a convolution of two functions .sub.1(),.sub.2(), then its Hadamard transform G is equal to multiplications of the Hadamard transforms of .sub.1(), .sub.2 (). Property 207 is a composite function property defining that if g(b)=(b.Math.), where is an invertible matrix of m rows and m columns over [p].sub., then the Hadamard transform of g() equals F(.Math.(.sup.1).sup.T), where F() is the Hadamard transform of (). Note that the inverse of the matrix F may be calculated over GF(p). Property 208 handles the case of a function g(b) where g(b)=({tilde over (b)}) if b={tilde over (b)}.Math. where is a full rank matrix of l rows and m columns, b, are of length m and {tilde over (b)} is of length l where (lm). In other cases g(b)=0. The Hadamard transform of g may be equal in this case to F(.Math..sup.T).

[0070] Further in accordance with at least one embodiment of the present invention, computation of the Hadamard transform and its inverse may be executed using a fast Hadamard transform (FHT) as shown in FIG. 3. The fast Hadamard transform is similar to the fast Fourier transform (FFT). Such fast transforms generally use on the order of N log(N) additions and multiplications, where N=p.sup.m.

[0071] Reference is made to FIG. 3, which includes an example fast Hadamard transform (FHT) and associated properties used according to an embodiment of the invention. Equation 301 shows that the Hadamard transform of (b) may be presented as a linear combination of p Hadamard transforms of smaller sizes defined in 302. F.sup.(b)(.sub.1.sup.m-1) may be the Hadamard transform of .sup.(b)(b.sub.1.sup.m-1)([b b.sub.1.sup.m-1]) for b[p].sub.. A closer look at this expression reveals that F(.sub.0.sup.m-1) may be derived by a Hadamard transform of size p (denoted in equation 303 as T operator) on the function g(b)F.sup.(b)(w.sub.1.sup.m-1).

[0072] Reference is made to FIG. 4, which includes an example transform operating over a binary field (p=2) for functions defined over the real numbers, , according to an embodiment of the invention. As such, equations 401-405 are a special case of equations 201-205, respectively. In the binary case, the transform, e.g., Hadamard transform, contains only additions and subtractions. The equations of FIG. 4 may be adapted to be performed in the log-domain. In the log-domain, input equation 401 may be replaced with log.sub.2 ((b)), and the decoder may compute the logarithm of its transform log.sub.2 (F()). Signs should be accounted for when dealing with logarithms. As a consequence, logarithm results may be denoted, for example, by a two-tuple (sign, magnitude). If a denotes a logarithm number and sign(a){0,1} and mag(a), then 2.sup.a(1).sup.sign(a).Math.2.sup.mag(a).

[0073] Reference is made to FIG. 5, which schematically illustrates logical operations (e.g., software) or a circuit diagram (e.g., hardware) for performing operations and according to an embodiment of the invention. The and operators 502 and 501 respectively are defined in FIG. 5. The calculation of those operators may depend on the sign() of operands, a and b. In one example, ab is calculated according to 503 if the operands have the same sign, e.g., sign(a)=sign(b); and otherwise is calculated according to 504. Conversely, in one example, ab is calculated according to 504 if sign(a)=sign(b); and otherwise is calculated according to 503. When operating in the log domain, the and operators 502 and 501 may replace standard addition and subtraction operations, respectively, in the non-log or linear domain.

[0074] Reference is made to FIG. 6, which schematically illustrates logical operations (e.g., software) or a circuit diagram (e.g., hardware) for performing operations ab and ab according to an embodiment of the invention. The Hadamard transform may use both operations ab and ab. FIG. 6 shows how these two operations may be computed simultaneously or in parallel, by reusing redundant calculations, to reduce the circuit computations by a factor of at least two. This circuit is denoted as AddSub 600.

[0075] In FIG. 6, thick lines may represent magnitude values in this circuit (see e.g. the inputs to the MAX circuit and the maxMag output in 601), whereas thin lines may represent lines that carry a single bit value (see e.g. the maxID output signal of the MAX circuit in 601). In an example operating in the log-domain, the circuit may receive as input two log representations of numbers a, b (e.g., represented by their magnitudes and signs, such as, mag(a), mag(b), sign(a), sign(b)). The circuit may simultaneously output the result of the both operations ab and ab (e.g., represented by their magnitudes and signs, such as, mag(ab),mag(ab),sign(ab),sign(ab)). Inputs e.g. mag(a) and mag(b) may be input into circuit block 601, which may output e.g. maxMag=max(mag(a), mag(b)) and maxID=0 if mag(a)=maxMag and maxID=1 otherwise. Inputs e.g. mag(a) and mag(b) may be input into circuit block 602, which may output e.g. |mag(a)mag(b)|. Circuit block 602's output may be input into blocks 603 and 604 that outputs approximations of log.sub.2(1+2.sup.|mag(a)mag(b)|) and log.sub.2(12.sup.|mag(a)mag(b)|). Circuit blocks 603 and 604's outputs may be added to maxMag in circuit blocks 605 and 606, such that the output of circuit block 605 is e.g. approximately max(mag(a), mag(b))+log.sub.2(1+2.sup.mag(a)mag(b)|) and the output of circuit block 606 is e.g. approximately max(mag(a), mag(b))+log.sub.2(12.sup.|mag(a)mag(b)|). Circuit blocks 605 and 606's two outputs may be input into Permute circuit block 607, which either leaves them in the same order if a select input 608 is null or zero (0); and otherwise it permutes or swaps them. In one embodiment, the select input 608 equals xorSign=xor(sign(a), sign(b)) and the permute circuit block 607 swaps the input values if and only if the signs of operands, a and b are different (not swapping the input values if the signs are the same).

[0076] Certain embodiments of the present invention may use a circuit as described in FIG. 6 to perform the log of the Hadamard transform for a field of size 2 for the binary case (e.g., for (b): {0,1}.fwdarw. as described in FIG. 4). In one example, this computation may also be equal to the log of the inverse Hadamard transform, e.g., up to an additive constant. Based on the recursive implementation of the fast Hadamard transform, a circuit implementing the Hadamard transform of (b): {0,1}.sup.m.fwdarw. may perform m.Math.2.sup.m-1 iterations of the circuit of FIG. 6. Similarly, a circuit implementing the inverse Hadamard transform may perform the same number of iterations of the circuit of FIG. 6.

[0077] In some embodiments, a transmitter (e.g., transmitter 110 of FIG. 1A) may transmit one or more codewords x([p].sub.).sup.n and a receiver (e.g., receiver 112 of FIG. 1A) may receive one or more channel observations vectors y.sup.n over a memoryless channel. In other embodiments, a memory controller (e.g., 158 of FIG. 1B) may program or store one or more codewords x([p].sub.).sup.n in memory die(s) (e.g., 174 of FIG. 1B) and the same (or different) memory controller may read one or more channel observations vectors y.sup.n corresponding to the stored codewords. C.sup.(1) and C.sup.(2) may be two linear codes of length n over [p].sub., with dimensions k.sub.1, k.sub.2 respectively, such that C.sup.(2)C.sup.(1) and k.sub.1>k.sub.2. Let H([p].sub.).sup.(n-k.sup.2.sup.)n be the parity check matrix of C.sup.(2). The following n functions g.sub.j(s): ([p].sub.).sup.n-k.sup.2.fwdarw., for 0jn1 may define the symbol probabilities that one or more individual symbols b of the received or read error correction codeword X associated with codewords that have a syndrome s were received as one or more symbols y.sub.j in received noisy error correction codewords Y.sub.j, for example, as.

[00009]$\begin{array}{cc}{g}_j\left(s\right)=\{\begin{array}{cc}\mathrm{Pr}\left(Y_j=y_j|X=b\right)& s={\left(b.Math.H_j\right)}^T\\ 0& o.w.\end{array}.& \left(8\right).\end{array}$

In order to calculate the coset probabilities:

g(s)=.sub.x s.t. H.Math.x.sub.T.sub.=s.sub.j=0.sup.n-1Pr(Y.sub.j=y.sub.j|X.sub.j=x.sub.j)(9),

the following convolution may be performed between the symbol probabilities (g.sub.j(s)).sub.j=0, 1, 2, . . . , n-1, e.g.:

g(s)=(g.sub.0*g.sub.1*g.sub.2* . . . *g.sub.n-1)(s).(10).

[0078] Embodiments of the present invention may also calculate a transform of symbol probabilities g.sub.j(s), denoted as G.sub.j(), simplifying the convolution operation for the coset probability of (10) to the following multiplication operation in the transform space:

G()=G.sub.0()G.sub.1()G.sub.2().Math. . . . .Math.G.sub.n-1().(11).

[0079] If operating in the log-transform space, the convolution operation of the coset probability of (10) would be simplified to an addition operation in the transform space:

log.sub.2(G())=log.sub.2(G.sub.0()+log.sub.2(G.sub.1())+log.sub.2(G.sub.2()+ . . . +log.sub.2(G.sub.n-1()).

[0080] The transform G.sub.j() may be computed (e.g., in operation 102 of FIG. 1C), for example, using property 208 of FIG. 2, where l=1, m=nk.sub.2, =(H.sub.j).sup.T and .sub.j(b)=Pr(Y=y.sub.j|X=b). So for each transformed symbol probability G.sub.j(), a Hadamard transform of size p may be calculated (e.g., the Hadamard transform of .sub.j(b)) and its values may be converted to G.sub.j() according to equation 208.

[0081] After the coset probability in equation (11), or its log-domain equivalent, is calculated, the inverse Hadamard transform may be computed for retrieving the coset probability g(s) corresponding to syndrome s in the initial domain (e.g., in operation 104 of FIG. 1C).

[0082] In some embodiments of the invention, C.sup.(1) may be a partial space or sub-space of the field with dimension, k.sub.1<n. In such cases, decoding over then entire space may provide an over-inclusive set of syndromes. In many cases, the subset of interesting syndromes S (e.g., representing cosets of C.sup.(2) in C.sup.(1)) may be selected using, for example, the following condition:

A(0,1, . . . nk.sub.21),|A|=nk.sub.2(k.sub.1k.sub.2)=nk.sub.1(12). [0083] s.t. sS, iA, s.sub.i=0,

[0084] A subset of the indices of the syndromes, A, may be generated such that all the syndromes of C.sup.(2) in C.sup.(1) are zeros over these indices. It may be assumed that A={0, 1, . . . , nk.sub.1} without loss of generality. Accordingly, the coset probability g(s) may be computed for only the subset of A in which s.sub.0.sup.n-k.sup.1.sup.-1=0, for example, as:

[00010]$\begin{array}{cc}g\left(\left[0,s_{n-k_1}^{n-k_2-1}\right]\right)=\frac{1}{p^{k_1-k_2}}.Math.\underset{{}_{n-k_1}^{n-k_2-1}{\left(\left[p\right].Math.\_\right)}^{k_1-k_2}}{\overset{}{.Math.}}.Math.\tilde{G}\left({}_{n-k_1}^{n-k_2-1}\right).Math.\exp \left(\frac{2.Math.}{p}.Math.{}_{n-k_1}^{n-k_2-1}.Math.{\left(s_{n-k_1}^{n-k_2-1}\right)}^T\right),& \left(13\right)\\ .Math.\mathrm{where},& \\ .Math.\tilde{G}\left({}_{n-k_1}^{n-k_2-1}\right)=\frac{1}{p^{n-k_1}}.Math.\underset{{}_0^{n-k_1-1}{\left(\left[p\right].Math.\_\right)}^{n-k_1}}{\overset{}{.Math.}}.Math.G\left(\left[{}_0^{n-k_1-1}.Math.{}_{n-k_1}^{n-k_2-1}\right]\right)& \left(14\right)\\ .Math.\tilde{G}\left({}_{n-k_1}^{n-k_2-1}\right).Math.\text{:}.Math..Math.{\left(\left[p\right].Math.\_\right)}^{k_1-k_2}->.& \end{array}$

Some embodiments may compute {tilde over (G)}(.sub.n-k.sub.1.sup.n-k.sup.2.sup.-1) and then perform an inverse Hadamard transform of size p.sup.k.sup.1.sup.-k.sup.2 as described in reference to FIG. 7.

[0085] Reference is made to FIG. 7, which is a flowchart of operations of a coset maximum likelihood decoder for codes over a field GF(p) according to an embodiment of the invention. Operation 701 defines as input likelihoods corresponding to the received channel vector y. Specifically, Pr(Y=y.sub.j|X=b) may be the probability that the channel outcome is y.sub.j given that signal b was transmitted. Operation 701 further defines the output of operations 702-705, which are the likelihoods of cosets, corresponding to equation (9).

[0086] In operation 702, one or more processor(s) may perform a Hadamard transform on the input symbol probabilities, e.g., equation (8), to generate a Hadamard transform probabilities F.sub.j() of size p.

[0087] In operation 703, one or more processor(s) may compute the coset probabilities G() based on those symbols e.g., defined by equation (11), in the transform domain. In one example, the processor(s) may compute G.sub.j() in 703 using property 208 in FIG. 2. G () may be the transform of g(s) s([p].sub.).sup.n-k.sup.2. Since candidate cosets exists over a reduced subset space of syndromes S([p].sub.).sup.n-k.sup.2, operation 704 may be executed to compute value of g(s) for only that reduced subset space.

[0088] In operation 704, one or more processor(s) may compute the coset probability for the subset space of syndromes {tilde over (G)}(.sub.n-k.sub.1.sup.n-k.sup.2), e.g., defined by equation (14), in the transform domain. This computation may be used to reduce the complexity of the inverse transform used in operation 705.

[0089] In operation 705, one or more processor(s) may perform a Hadamard inverse transform, e.g., equation (13), of size p.sup.k.sup.1.sup.-k.sup.2, to return the coset likelihoods to the initial domain.

[0090] Other operations or orders of operations may be executed.

[0091] Certain embodiments of the invention operate on extension fields of GF(p), e.g., GF(p.sup.r). In some embodiments, a transmitter (e.g., receiver 110 of FIG. 1A) may transmit one or more codewords in the extension fields x(GF(p.sup.r)).sup.n and a receiver (e.g., receiver 112 of FIG. 1A) may receive one or more channel observations vectors y.sup.n over a memoryless channel. In other embodiments, a memory controller (e.g. 158 of FIG. 1B) may program or store one or more codewords in the extension fields x(GF(p.sup.r)).sup.n in memory die(s) (e.g., 174 of FIG. 1B) and the same (or different) memory controller may read one or more channel observations vectors y.sup.n corresponding to the stored codewords. C.sup.(1) and C.sup.(2) may be two linear codes in the extension fields (GF(p.sup.r)).sup.n, of dimensions k.sub.1, k.sub.2 respectively, such that C.sup.(2) C.sup.(1) and k.sub.1>k.sub.2. H(GF(p.sup.r)).sup.(n-k.sup.2.sup.)n may be the parity check matrix of C.sup.(2). The following n functions g.sub.j(s): (GF(p.sup.r)).sup.n-k.sup.2.fwdarw., for 0jn1 may be defined, for example, as:

[00011]$\begin{array}{cc}{g}_j\left(s\right)=\{\begin{array}{cc}\mathrm{Pr}\left(Y_j=y_j|X=b\right)& s={\left(b.Math.H_j\right)}^T\\ 0& o.w.\end{array}.& \left(15\right)\end{array}$

[0092] Embodiments of the invention may reduce this problem to the GF(p) scenario, for example, using the observation that every code of length n over the extension field GF(p.sup.r) can be represented as a code of length n.Math.r over the field GF(p). This representation may be defined such that for each codeword cGF(p.sup.r).sup.n, a matching codeword {tilde over (c)}GF(p).sup.rn may be defined, such that {tilde over (c)}.sub.j.Math.r.sup.(j+1).Math.r-1 is the Cartesian representation of c.sub.j, for all 0jn1.

[0093] An equivalent parity check matrix {tilde over (H)}(GF(p)).sup.r(n-k.sup.2.sup.)rn may be defined such that for all codewords xGF(p.sup.r).sup.n, if the syndrome of x is x.Math.H.sup.T=s then {tilde over (x)}.Math.{tilde over (H)}.sup.T={tilde over (s)}.sup.T, where {tilde over (x)}GF(p.sup.r).sup.n is the GF(p) representation of x and {tilde over (s)}GF(p).sup.r(n-k.sup.2.sup.) is the GF(p) representation of the syndrome vector s. The operations performed over the extension field GF(p.sup.r) are shown, for example, in FIG. 8.

[0094] Reference is made to FIG. 8, which is a flowchart of operations of a coset maximum likelihood decoder for codes over an extension field GF(p.sup.r) according to an embodiment of the invention. Operation 801 defines inputs to be likelihoods corresponding to the received channel vector y. Specifically, Pr(Y=y.sub.j|X=b) is the probability that the channel outcome is y.sub.j given that signal b was transmitted. Operation 801 further defines the output of operations 802-805, which are the likelihoods of cosets, corresponding to equation (9).

[0095] In operation 802, one or more processor(s) may perform a Hadamard transform on the input, e.g., equation (15), to generate a Hadamard transform F.sub.j() of size p.sup.r.

[0096] In operation 803, one or more processor(s) may compute equation (11) in the transform domain. In one example, the processor(s) may compute G.sub.j() in 803 using property 208 in FIG. 2, where l=r, m=(nk.sub.2)r, =[{tilde over (H)}.sub.jr, {tilde over (H)}.sub.jr+1, . . . , {tilde over (H)}.sub.(j+1)r-1] and ({tilde over (b)})=Pr(Y.sub.j=y.sub.j|X.sub.j={tilde over (b)}). A Hadamard transform of size p.sup.n-k.sup.2 may be calculated for each G.sub.j(). G() may be the transform of g(s) s([p].sub.).sup.n-k.sup.2. Since candidate codewords exist over a reduced subset space S([p].sub.).sup.n-k.sup.2, operation 804 may be executed to compute value of g(s) for only that reduced subset space.

[0097] In operation 804, one or more processor(s) may compute equation (14) in the transform domain. This computation may be used to reduce the complexity of the inverse transform used in step 805.

[0098] In operation 805, one or more processor(s) may perform a Hadamard inverse transform, e.g., equation (13), of size p.sup.(k.sup.1.sup.-k.sup.2.sup.)r.

[0099] Other operations or orders of operations may be executed.

[0100] Examples according to some embodiments of the present invention are described as follows.

Example I

[0101] Reference is made to FIG. 9, which defines codes used in Example I according to an embodiment of the invention. In 901, code C.sup.(1) may be defined as an entire space of vectors of length four over GF(2.sup.2). Accordingly, code C.sup.(1) has dimension, e.g., k.sub.1=4. Code C.sup.(2) may be a sub-code of C.sup.(1) defining a subspace of GF(2.sup.2), e.g., having dimension k.sub.2=3. Code C.sup.(2) may be defined by generating matrix B or, alternatively, by a parity-check matrix H.

[0102] In 902, the field GF(2.sup.2) may be defined using a zero of the primitive polynomial p(x)=x.sup.2+x+1, which may be denoted as . Consequently, in this example, there are four elements in the field (denoted by bold face fonts), 0, 1, and .sup.2. These elements may also be represented in Cartesian form as binary two tuples, for example, [0 0], [1 0], [0 1] and [1 1], respectively. Each element in the field may be assigned a number, symbol, or other representative value, such as, ordinal numbers 0, 1, 2, 3, respectively, in round brackets in 902, for example, to simplify their representation.

[0103] 904 provides an example conversion from parity-check matrix H into a binary matrix {tilde over (H)}{0,1}.sup.28. The conversion may be performed by converting the elements in H into a 22 matrix according to 903. Vectors over GF(2.sup.2) may be converted to binary vectors by replacing each element in them by its binary Cartesian representation. In 905, an example is provided of a vector xGF(2.sup.2).sup.4 that is converted into a binary vector {tilde over (x)} of length eight bits. Vector x belongs to a coset of C.sup.(1) having syndrome, e.g., s=x.Math.H.sup.T=.sup.2. Indeed, multiplying binary vector {tilde over (x)} with {tilde over (H)}.sup.T generates syndrome .sup.2's binary representation [1 1].

[0104] Reference is made to FIG. 10, which provides a circuit to implement Example I according to an embodiment of the invention. In FIG. 10, the circuit may be used to implement a fast Hadamard transform over the log domain, where the fast Hadamard transform has example size of four (4).

[0105] In 1001, an input is defined by log-likelihoods, e.g., log.sub.2(Pr(Y.sub.j=y.sub.j|X.sub.j=i)), where y.sub.j is a j.sup.th measurement received over a communication channel, and i is an ordinal notation of the field elements (e.g., specified in 902 in round brackets). An output may be the four values of g({tilde over (s)}) that equal (e.g., up to a multiplicative constant) the log likelihoods of cosets of C.sup.(2). As shown in 1002, the summation (inside the logarithm) is performed over all vectors in the GF(2.sup.2).sup.4 field having their syndrome equal to sGF(2.sup.2) which have a binary representation {tilde over (s)} (the argument of the function). In 1003, the calculations of the Hadamard transform of size 4 are defined in terms of operations and . Function .sub.j({tilde over (b)})=Pr(Y=y.sub.j|X.sub.j=b) is transformed to F.sub.j() where {tilde over (b)} is the binary representation of b in GF(2.sup.2). In 1004, a fast Hadamard transform may be performed using AddSub circuits 1005, e.g., as specified in FIG. 6. The circuit is provided with inputs, a and b, represented by the sign magnitude representation, and generates outputs ab and ab.

[0106] Reference is made to FIG. 11, which schematically illustrates one or more circuits used to implement Example I defined in 1001, using operations specified in FIG. 8.

[0107] A first set of circuits 1101 may transform log-likelihoods {LL.sub.i,j}=.sub.i=0,1,2,3 to log of the Hadamard transforms, denoted {.sub.i,j}.sub.i=0,1,2,3 for j=0,1,2,3 defined in 1003. The convolution property in an initial space in equation (4), simplified to a multiplication property in the transformed space in equation (11), may be implemented by additions in the log-domain transform space represented by 1102. The following may be computed according to property 208 of FIG. 2:

[00012]$\begin{array}{cc}G\left(\right)=F_0\left(\right).Math.F_1\left(\right).Math.F_2\left(\right).Math.F_3\left(.Math.\left[\begin{array}{cc}1& 1\\ 1& 0\end{array}\right]\right),{\left\{0,1\right\}}^2.& \left(16\right)\end{array}$

[0108] Operating in the log-domain, multiplications are replaced by additions, which may result in 1102. In the log-domain, addition of two numbers a and b, e.g., represented by their signs and magnitudes, may be performed according to the following formulae:

a+b=c

mag(c)=mag(a)+mag(b);sign(c)=xor(sign(a),sign(b)).(17)

[0109] Finally, in 1103, an inverse Hadamard transform may be performed. The inverse Hadamard transform may be performed, for example, by entering {}).sub.i=0,1,2,3 elements subtracted by 2 (corresponding to dividing by 4 in the log.sub.2 () domain).

Example II

[0110] Reference is made to FIG. 12, which defines codes used in Example II according to an embodiment of the invention. In 1201, codes C.sup.(1) may be defined as a linear space over GF(2.sup.2) of dimension k.sub.1=3. Code C.sup.(1) may be defined by a generating matrix B.sub.1. Code C.sup.(2) may be a sub-code of C.sup.(1) defining a subspace of dimension k.sub.2=2. Code C.sup.(2) may be defined by a generating matrix B, or alternatively by a parity-check matrix H. Note that there are 4 cosets of C.sup.(2) in C.sup.(1).

[0111] In 1202, the field GF(2.sup.2) may be defined as in Example I (e.g., in 902 of FIG. 9). Substituting each field element in parity-check matrix H by a 22 binary matrix according to 1203 may result in a binary representation of the parity matrix in 1204, denoted by H. In 1205, an example is provided of a vector xGF(2.sup.2).sup.4 that is converted to binary vector {tilde over (x)} of length eight bits. Vector x belongs to a coset of C.sup.(1) having syndrome, e.g., s=x.Math.H.sup.T)=[0, 1]. Indeed, multiplying binary vector {tilde over (x)} with {tilde over (H)}.sup.T generates syndrome [0, 1]'s binary representation [0 0 1 0].

[0112] Reference is made to FIG. 13, which schematically illustrates one or more circuits used to implement Example II according to an embodiment of the invention.

[0113] In 1301, an input is defined by log-likelihoods log.sub.2(Pr(Y.sub.j=y.sub.j|X=i)), where y.sub.j is a j.sup.th measurement received over a communication channel, and i is an ordinal notation of the field elements (e.g., specified in 1202 in round brackets). An output may be the four values of g({tilde over (s)}) that equal (e.g., up to a multiplicative constant) the log likelihood of the cosets of C.sup.(2) in C.sup.(1). As shown in 1302, the summation (inside the logarithm) is performed over all vectors in GF(2.sup.2).sup.4 having their syndrome equal to sGF(2.sup.2).sup.2 that have a binary representation {tilde over (s)} (the argument of the function). There are four possible cosets syndromes in {0}.sup.2{0,1}.sup.2, e.g., of the form [0 0 b.sub.0 b.sub.1], where b.sub.0, b.sub.1 {0,1}. In 1303, a first set of circuits may transform log-likelihoods {LL.sub.i,j}.sub.i=0,1,2,3 to {.sub.i,j}.sub.i=0,1,2,3 for j=0,1,2,3. Using the convolution property, e.g., equation (11), may be represented by an addition property in the log-domain transform space represented by 1304. The following may be computed according to property 208 of FIG. 2:

[00013]$\begin{array}{cc}G\left(\right)=F_0\left(.Math.A_0\right).Math.F_1\left(.Math.A_1\right).Math.F_2\left(.Math.A_2\right).Math.F_3\left(.Math.A_3\right),{\left\{0,1\right\}}^4,& \left(18\right)\\ \mathrm{where},& \\ A_0={\left[\begin{array}{cc}{\tilde{H}}_0& {\tilde{H}}_1\end{array}\right]}^T=\left[\begin{array}{cccc}1& 0& 1& 1\\ 0& 1& 1& 0\end{array}\right];.Math..Math.A_1={\left[\begin{array}{cc}{\tilde{H}}_2& {\tilde{H}}_3\end{array}\right]}^T=\left[\begin{array}{cccc}1& 0& 1& 0\\ 0& 1& 0& 1\end{array}\right];.Math..Math.A_2={\left[\begin{array}{cc}{\tilde{H}}_4& {\tilde{H}}_5\end{array}\right]}^T=\left[\begin{array}{cccc}1& 0& 0& 0\\ 0& 1& 0& 0\end{array}\right];.Math..Math.A_3={\left[\begin{array}{cc}{\tilde{H}}_6& {\tilde{H}}_7\end{array}\right]}^T=\left[\begin{array}{cccc}1& 1& 1& 0\\ 1& 0& 0& 1\end{array}\right].& \left(19\right).\end{array}$

[0114] Operating in the log-domain, multiplications are replaced by additions, which may result in 1304. Performing the inverse Hadamard transform on all 16 values of .sub.i,j may result in the log-likelihood of all of the cosets of C.sup.(2) in GF(2.sup.2).sup.4. The set of candidate values may be reduced to a subset of interesting syndromes S, e.g., representing four cosets in C.sup.(1). As a consequence, operation 804 from FIG. 8 may be performed in 1305. In 1306, the inverse Hadamard transform may be performed, for example, by entering {.sub.i}.sub.i=0,1,2,3 elements subtracted by 2 (corresponding to dividing by 4 in the log.sub.2 () domain).

[0115] Reference is made to FIG. 14, which is a flowchart of a method for operating a coset maximum likelihood decoder according to an embodiment of the invention. Operations described in reference to FIG. 14 may be performed using devices, for example, described in reference to FIG. 1A or FIG. 1B, although other systems and devices may be used. In one example, operations 1400-1450 may be performed using one or more receiver processor(s) 120 of FIG. 1A. In another example, operations 1400-1450 may be performed using one or more ECC decoder processor(s) 180 of FIG. 1B.

[0116] In operation 1400, one or more processor(s) (e.g., receiver processor(s) 120 of FIG. 1A) may receive a noisy version of an error correction codeword that has been transmitted by a source device (e.g., transmitter 110 of FIG. 1A) to a receiver device (e.g., receiver 112 of FIG. 1A) over a communication channel. In another embodiment, in operation 1400, one or more processor(s) (e.g., memory controller decoder processor(s) 180 of FIG. 1B) may receive a noisy version of an error correction codeword that was previously programmed into memory die(s) (e.g., 174 of FIG. 1B) by a memory controller (e.g., 158 of FIG. 1B) using an ECC encoder processor (e.g. 176 of FIG. 1B).

[0117] In operation 1410, the processor(s) may transform one or more symbol probabilities (e.g., equation (1)) from an initial domain to a transformed domain. The symbol probabilities may measure the likelihood that one or more individual symbols of the received error correction codeword were transmitted as one or more symbols in candidate transmitted error correction codewords. The processor(s) may receive or compute those symbol probabilities. The transformation may be an isomorphism, a bijection, a Fourier transform, a fast Fourier transform, a Hadamard transform, a fast Hadamard transform, or any transform in which a convolution operation in the original domain is simplified in the transform domain. In dome embodiments, the transformed domain may be a log domain and the plurality of coset probabilities in operation 1420 may be computed based on log likelihoods.

[0118] In operation 1420, in the transformed domain, the processor(s) may compose a plurality of the transformed symbol probabilities (e.g., as in equation (11) or its log-domain equivalent) to generate a combined coset probability defining the likelihood that the transmitted error correction codeword is associated with the individual symbols belongs to a particular one of a plurality of candidate cosets. The plurality of candidate cosets may be mutually exclusive subsets of a codebook defining all possible values of the error correction codeword. The coset probabilities may be generated for each coset by combining the individual symbol probabilities associated with codewords that have a syndrome associated with the coset. In some embodiments, a reduced subset space of syndrome subset may be considered and the coset probabilities may be generated for the subset space of syndromes. The coset probabilities may be generated in the transformed domain using multiplication or addition computations representing convolution computations in the initial domain. These coset probabilities may be generated using fewer computations than would be used in the initial domain. In one embodiment, the number of computations may be reduced from an order of n.Math.|F|.sup.k.sup.1 computations in the initial domain to an order of n+(k.sub.1k.sub.2).Math.log(|F|)).Math.|F|.sup.k.sup.1.sup.-k.sup.2 computations in the transformed domain, where n is the code length, |F| is the size of the alphabet, and k.sub.1, k.sub.2 are the dimensions of a code and a coset of the code. Such a reduction may decrease the duration of time used to generate coset probabilities and/or thus decode codewords, reduce memory and processing power designated for generating coset probabilities and storing intermediate results, and thereby increase and improve decoding performance and speed.

[0119] In one embodiment, the processor(s) may execute multiple decoder circuits, in series, wherein the output of a first of the multiple decoder circuits is sent in the transformed domain, without inverse transforming the output, to a second of the multiple decoder circuits. The multiple decoder circuits may be used to decode a polar code, wherein the multiple decoder circuits generate multiple coset probabilities for multiple kernels of the polar code, respectively, and the processor(s) combine the multiple coset probabilities to generate a combined coset probability for the entire polar code.

[0120] In operation 1430, the processor(s) may inverse transform a plurality of coset probabilities for the plurality of respective cosets from the transformed domain to the initial domain.

[0121] In operation 1440, in the initial domain, the processor(s) may execute a maximum likelihood coset criterion (e.g., as in equation (3)) to select the candidate coset that has a maximum one of the plurality of coset probabilities. Operation 1440 may reduce the set of the plurality of candidate cosets to a most likely coset in which the transmitted error correction codeword most likely belongs. Operation 1440 may repeat or iterate for a plurality of iterations to execute a sequential coset decoder. A sequential coset decoder may iteratively execute the maximum likelihood coset criterion. In each current iteration, the sequential coset decoder selects a most likely coset of the coset selected in the previous iteration, wherein the most likely coset of the current iteration has a smaller number of candidate error correction codewords than the most likely coset of the previous iteration. The sequential coset decoder may iterate a number of times, for example, until the number of candidate error correction codewords in a final coset generated in a final iteration is below a threshold number and/or until a duration of time estimated for decoding the candidate error correction codewords in a final coset generated in a final iteration is below a threshold duration of time.

[0122] In operation 1450, after selecting a final most likely coset, the processor(s) may execute a maximum likelihood codeword criterion on the selected coset in order to determine a most likely transmitted error correction codeword in the coset selected in operation 1440 that has a maximum likelihood.

[0123] Other operations or orders of operations may be used.

[0124] In accordance with an embodiment of present invention, executed in parallel as used herein may refer to executed substantially concurrently, simultaneously, or during completely or partially overlapping time intervals. For example, operations ab and ab may be executed in parallel as shown in FIG. 6. Executed in series as used herein may refer to executed sequentially, one-after-another or at substantially different, non-concurrently, or completely or partially non-overlapping time intervals. For example, each of multiple circuits or iterations of a sequential coset decoder may be executed in series.

[0125] In the foregoing description, various aspects of the present invention have been described. For purposes of explanation, specific configurations and details are set forth in order to provide a thorough understanding of the present invention. However, it will also be apparent to a person of ordinary skill in the art that the present invention may be practiced without the specific details presented herein. Furthermore, well-known features may be omitted or simplified in order not to obscure the present invention.

[0126] Unless specifically stated otherwise, as apparent from the foregoing discussions, it is appreciated that throughout the specification discussions utilizing terms such as processing, computing, calculating, determining, or the like, refer to the action and/or processes of a computer or computing system, or similar electronic computing device, that manipulates and/or transforms data represented as physical, such as electronic, quantities within the computing system's registers and/or memories into other data similarly represented as physical quantities within the computing system's memories, registers or other such information storage, transmission or display devices.

[0127] In accordance with any of the aforementioned embodiments of the invention, systems and methods may be software-implemented using dedicated instruction(s) or, alternatively, hardware-implemented using designated circuitry and/or logic arrays.

[0128] In accordance with any of the aforementioned embodiments of the invention, systems and methods may be executed using an article such as a computer or processor readable non-transitory storage medium, or a computer or processor storage medium, such as for example a memory (e.g. one or more memory unit(s) 122 and 124 of FIG. 1A or 178 and 182 of FIG. 1B), a disk drive, or a flash memory, for encoding, including or storing instructions which when executed by a processor or controller (e.g., one or more controller(s) or processor(s) 118 and 120 of FIG. 1A or 176 and 180 of FIG. 1B), carry out methods disclosed herein.

[0129] Different embodiments are disclosed herein. Features of certain embodiments may be combined with features of other embodiments; thus certain embodiments may be combinations of features of multiple embodiments.

[0130] Although the particular embodiments shown and described above will prove to be useful for the many distribution systems to which the present invention pertains, further modifications of the present invention will occur to persons skilled in the art. All such modifications are deemed to be within the scope and spirit of the present invention as defined by the appended claims.