Efficient Hybrid Buck-Boost Converter

Abstract

A power converter configured to generate an output voltage at an output node of the power converter based on an input voltage received at an input node of the power converter is presented. In particular, the power converter may comprise a first switching element coupled between the input node and a first intermediate node. The converter also has an inductive element coupled between a second intermediate node and the output node, a second switching element with one port being coupled to the second intermediate node and a third switching element and a fourth switching element coupled in series between the output node and a reference node. The converter also has a flying capacitive element coupled between the first intermediate node and a third intermediate node between the third and fourth switching elements and a fifth switching element coupled between the first and second intermediate nodes.

Claims

1. A power converter configured to generate an output voltage at an output node of the power converter based on an input voltage received at an input node of the power converter, the power converter comprising: a first switching element coupled between the input node and a first intermediate node; an inductive element coupled between a second intermediate node and the output node; a second switching element with one port being coupled to the second intermediateb node; a third switching element and a fourth switching element coupled in series between the output node and a reference node; a flying capacitive element coupled between the first intermediate node and a third intermediate node between the third and fourth switching elements; and a fifth switching element coupled between the first and second intermediate nodes.

2. The power converter according to claim 1, wherein the inductive element is coupled to the capacitive element through the fifth switching element.

3. The power converter according to claim 1, wherein another port of the second switching element is coupled to the reference node.

4. The power converter according to claim 3, comprising a buck operation mode.

5. The power converter according to claim 4, wherein, during a magnetizing phase of the buck operation mode: the first, fourth and fifth switching elements are in an ON state, and the second and third switching elements are in an OFF state; and wherein the flying capacitive element is charged during the magnetizing phase of the buck operation mode.

6. The power converter according to claim 4, wherein, during a demagnetizing phase of the buck operation mode: the first, second and fourth switching elements are in an ON state, and the third and fifth switching elements are in an OFF state; and wherein the flying capacitive element is charged during the demagnetizing phase of the buck operation mode.

7. The power converter according to claim 6, wherein, during the demagnetizing phase of the buck operation mode, a voltage across the third switching element equals the output voltage.

8. The power converter according to claim 3, comprising a boost operation mode.

9. The power converter according to claim 8, wherein, during a magnetizing phase of the boost operation mode: the third and fifth switching elements are in an ON state, and the first, second and fourth switching elements are in an OFF state.

10. The power converter according to claim 8, wherein, during a demagnetizing phase of the boost operation mode: the first, fourth and fifth switching elements are in an ON state, and the second and third switching elements are in an OFF state.

11. The power converter according to claim 1, wherein another port of the second switching element is coupled to the third intermediate node.

12. The power converter according to claim 11, comprising a buck operation mode.

13. The power converter according to claim 12, wherein, during a demagnetizing phase of the buck operation mode: the first, second and fourth switching elements are in an ON state, and the third and fifth switching elements are in an OFF state; and wherein the flying capacitive element is charged during the demagnetizing phase of the buck operation mode.

14. The power converter according to claim 12, wherein the inductive element is demagnetized through the second and fourth switching elements that are serially coupled.

15. The power converter according to claim 13, wherein, during the demagnetizing phase of the buck operation mode, a voltage across the third switching element equals the output voltage.

16. The power converter according to claim 11, wherein, during a magnetizing phase of a boost operation mode of the power converter, a voltage across the second switching element equals the input voltage.

17. A method for operating a power converter for generating an output voltage at an output node of the power converter based on an input voltage received at an input node of the power converter, the method comprising: providing and coupling a first switching element between the input node and a first intermediate node; providing and coupling an inductive element between a second intermediate node and the output node; providing a second switching element and coupling one port of the second switching element to the second intermediate node; providing a third switching element and a fourth switching element and coupling the third and fourth switching elements in series between the output node and a reference node; providing and coupling a flying capacitive element between the first intermediate node and a third intermediate node between the third and fourth switching elements; and providing and coupling a fifth switching element between the first and second intermediate nodes.

18. The method according to claim 17, further comprising coupling another port of the second switching element to the reference node.

19. The method according to claim 18, further comprising: during a magnetizing phase of a buck operation mode of the power converter, switching the first, fourth and fifth switching elements to an ON state, and switching the second and third switching elements to an OFF state, for charging the flying capacitive element.

20. The method according to claim 18, further comprising: during a demagnetizing phase of a buck operation mode of the power converter, switching the first, second and fourth switching elements to an ON state, and switching the third and fifth switching elements to an OFF state, for charging the flying capacitive element.

21. The method according to claim 18, further comprising: during a magnetizing phase of a boost operation mode of the power converter, switching the third and fifth switching elements to an ON state, and switching the first, second and fourth switching elements to an OFF state.

22. The method according to claim 18, further comprising: during a demagnetizing phase of a boost operation mode of the power converter, switching the first, fourth and fifth switching elements to an ON state, and switching the second and third switching elements to an OFF state.

23. The method according to claim 17, further comprising coupling another port of the second switching element to the third intermediate node.

24. The method according to claim 23, further comprising: during a demagnetizing phase of a buck operation mode of the power converter, switching the first, second and fourth switching elements to an ON state, and switching the third and fifth switching elements to an OFF state, for charging the flying capacitive element.

25. The method according to claim 23, further comprising demagnetizing the inductive element through the second and fourth switching elements that are serially coupled.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Example embodiments of the disclosure are explained below with reference to the accompanying drawings, wherein like reference numbers indicate like or similar elements, and wherein

[0038] FIG. 1 schematically illustrates an example of a conventional buck-boost power converter topology,

[0039] FIG. 2 schematically illustrates an example of an improved hybrid buck-boost power converter topology,

[0040] FIGS. 3A-3C schematically illustrate examples of switching phases of the hybrid buck-boost power converter of FIG. 2,

[0041] FIG. 4 schematically illustrates an example of simulation results of the hybrid buck-boost power converter of FIG. 2,

[0042] FIG. 5 schematically illustrates an example of a hybrid buck-boost power converter according to embodiments of the present disclosure,

[0043] FIGS. 6A-6C schematically illustrate examples of switching phases of the hybrid buck-boost power converter of FIG. 5,

[0044] FIG. 7 schematically illustrates an example of another hybrid buck-boost power converter according to embodiments of the present disclosure,

[0045] FIG. 8 schematically illustrates an example of a demagnetizing phase of the hybrid buck-boost power converter of FIG. 7,

[0046] FIG. 9 schematically illustrates an example of simulation results of the hybrid buck-boost power converter of FIG. 7 in comparison with those of the hybrid buck-boost power converters of FIGS. 2 and 5, and

[0047] FIG. 10 is a flowchart schematically illustrating an example of a method of operating a hybrid buck-boost power converter according to embodiments of the disclosure.

DESCRIPTION

[0048] As indicated above, identical or like reference numbers in the present disclosure may, unless indicated otherwise, indicate identical or like elements, such that repeated description thereof may be omitted for reasons of conciseness. Also, any switching elements/devices mentioned in this disclosure may be transistor devices, such as MOSFETs, or any other suitable switching devices. In some of the figures the switching devices may be simplified, but they should be understood as the same or similar switching devices as shown in other figures.

[0049] As indicated above, FIG. 1 schematically illustrates an example of a conventional buck-boost (BuBo) power converter topology 100. In particular, as can be understood and appreciated by the skilled person, switches S1, S2 and S3 are generally involved in the buck (step-down) operation of the power converter 100; while on the other hand, switches S1, S3 and S4 are generally involved in the boost (step-up) operation of the power converter.

[0050] As such, it may be understood that a major drawback for the power efficiency of such a BuBo topology as shown in FIG. 1 lies generally in the presence of two switches, i.e., switches S1 and S3, in the main current path from V.sub.IN to V.sub.OUT through the inductor L. This may also be seen as a fundamental reason for which the conventional BuBo converter 100 might typically be considered to be less efficient of a buck-only or boost-only topology.

[0051] FIG. 2 schematically illustrates an example of a hybrid buck-boost power converter topology 200 with improved efficiency compared to that of FIG. 1. The main reason for such improvement is generally the use of only one switch, i.e., S1, in the main current path during its operation phases.

[0052] Now, reference is also made to FIGS. 3A-3C, wherein the exemplary switching phases of the power converter 200 of FIG. 2 are schematically illustrated.

[0053] In particular, as will be understood and appreciated by the skilled person, the buck operation may generally cycle through the phases as shown in FIGS. 3B and 3C. Broadly speaking, it may be simply seen as equivalent or similar to that in a conventional buck operational phase involving switches S1 and S2.

[0054] The relationship between V.sub.IN and V.sub.OUT may be expressed by:

[00001]$\begin{array}{cc}\begin{array}{cc}\frac{V_{\mathrm{OUT}}}{V_{\mathrm{IN}}}=D& \mathrm{with}D\in \left[0,1\right]\end{array}& \left(1\right)\end{array}$

[0055] On the other hand, the boost operation may generally cycle through the phases of FIGS. 3A and 3B. Particularly, similar to that in a conventional buck operational phase, the boost operation of the hybrid power converter 200 may also involve switches S1, S3 and S4.

[0056] The relationship between V.sub.IN and V.sub.OUT may then become:

[00002]$\begin{array}{cc}\begin{array}{cc}\frac{V_{\mathrm{OUT}}}{V_{\mathrm{IN}}}=\frac{1}{1-D}& \mathrm{with}D\in \left[0,1\right]\end{array}& \left(2\right)\end{array}$

[0057] Additionally, it may also be understood that the (complete) buck-boost operation may cycle through all phases of FIGS. 3A, 3B and 3C, wherein all switches S1, S2, S3 and S4 may be involved.

[0058] It should nevertheless be noted that, in order to guarantee the correct operations of the power converter 200, at least the switches S1 and S4 would require to be implemented as bulk switches (or back-to-back switches, not shown in the figures). As will be understood and appreciated by the skilled person, depending on the implementation of the switching devices, e.g., in the examples of MOSFET, the back-to-back configuration may refer to the configuration of two devices that are in series and either they have their drain terminals connected or their source terminals connected. The consequence (and most important property) of such back-to-back configuration is that their bulk diodes point in opposite directions. Notably, an illustrative example of a bulk-switching scheme (body switching) is also schematically shown in the power converter 200 of FIGS. 2 and 3A-3C, wherein switch S1 is implemented as switches S1B1 and S1B2 and switch S4 is implemented as switches S4B1 and S4B2.

[0059] To be more specific, during the buck demagnetizing phase (as indicated by arrow 331 in FIG. 3C), the voltage of node CX (right to the flying capacitor C.sub.FLY) would generally go below GND to -V.sub.IN, and therefore the switch S4B1 would have to be closed. Further, during the boost magnetizing phase (as indicated by arrow 311 in FIG. 3A), the voltage of node LX (left to the inductor L) would generally go above V.sub.IN to V.sub.IN+V.sub.OUT, and therefore the switch S1B1 would have to be closed in that case.

[0060] Accordingly, the voltage rating (which, in the examples of MOSFET, may be measured based on the maximum V.sub.DS voltage V.sub.DS_max) for each switching device is exemplarily summarized in the below Table 1 together with corresponding phase during which V.sub.DS_max is applied across the respective devices. Notably, as can be understood and appreciated by the skilled person, the voltage ratings summarized below may be deduced from the corresponding voltages at respective nodes (or ports) of the switching devices during the respective operation phases, some of which (e.g., voltages V.sub.LX, and V.sub.CX at nodes LX and CX) are exemplarily shown in FIGS. 3A-3C.

TABLE-US-00001 TABLE 1 Voltage rating of the switching devices of the converter 200 in FIGS. 2 and 3. Switch Phase w/V.sub.DS.sub.—.sub.max V.sub.DS.sub.—.sub.max S1 Boost mag V.sub.OUT S2 Boost mag V.sub.IN + V.sub.OUT S3 BuBo demag V.sub.IN + V.sub.OUT S4 Boost mag V.sub.OUT

[0061] As can be seen from the voltage ratings summarized in the above Table 1, both switches S2 and S3 would exhibit V.sub.DS_max that equals V.sub.IN+V.sub.OUT, which may, in some possible implementation scenarios, be considered too high.

[0062] As noted above, a higher voltage rating would generally translate into a higher R.sub.SP for the device and, in turn, into a larger silicon area for a given target R.sub.ON of a switching device (e.g., a FET).

[0063] Notably, in the converter 200 of FIGS. 2 and 3A-3C the use of the flying capacitor C.sub.FLY for magnetizing the inductor L would generally introduce a limitation on the maximum achievable V.sub.OUT during its boost operation. The limitation is generally a consequence of the charge conservation on C.sub.FLY. To be more specific, the charge removed from the capacitor C.sub.FLY during the boost magnetizing phase (as shown in FIG. 3A) is added during the boost demagnetizing phase (as shown in FIG. 3B). Therefore, the current I.sub.FLY flowing in C.sub.FLY during the demagnetizing phase could be expressed as (by applying charge conservation principle on C.sub.FLY):

[00003]$\begin{array}{cc}\begin{array}{cc}\frac{I_{FLY}}{I_L}=\frac{D}{1-D}& \mathrm{with}D\in \left[0,1\right]\end{array}& \left(3\right)\end{array}$

[0064] Broadly speaking, equation (3) would generally indicate that, in order to keep I.sub.FLY<I.sub.L, the duty cycle D of the switches should then be limited to 0.5. On the other hand, for value of D>0.5, I.sub.FLY would generally experience a steep increase.

[0065] FIG. 4 schematically illustrates an example of simulation results of the hybrid buck-boost power converter 200 of FIG. 2.

[0066] Particularly, FIG. 4 shows the maximum theoretical V.sub.OUT achievable (that is, in the presently shown examples, assuming no non-overlap time between the two boost phases, R.sub.ON of 20 mΩ for all switches, equivalent series resistance (ESR) of 5 mΩ, and DC resistance (DCR) of 20 mΩ) for different values of output load resistance R.sub.OUT of the converter 200 of FIG. 2 at V.sub.IN=2.5 V. More specifically, in the examples of FIG. 4, diagram 410 generally refers to the ideal scenario, whereas diagrams 420, 430, 440 and 450 refer to simulation results based on R.sub.OUT set to be 20 Ω, 15 Ω, 10 Ω and 5 Ω, respectively.

[0067] Because of the increase in I.sub.FLY for increasing duty cycle values, the voltage across the C.sub.FLY would generally be progressively reduced by the IR drop on the R.sub.ON of switches S1 and S4 and on the ESR of C.sub.FLY. This would generally contribute to lower the maximum V.sub.OUT achievable by the boost for a given R.sub.OUT.

[0068] Now reference is made to FIG. 5, which schematically illustrates an example of a hybrid buck-boost power converter 500 according to embodiments of the present disclosure.

[0069] In particular, compared to the power converter 200 of FIG. 2, the hybrid buck-boost power converter 500 as shown in FIG. 5 may be seen as to generally introduce a further switching device S1b (i.e., the claimed fifth switching device) that is coupled (e.g., connected or directly coupled) between the LX node of the inductor L and the CY node of the flying capacitor C.sub.FLY. Put differently, it may also be seen as the flying capacitor C.sub.FLY being coupled between one intermediate node that is arranged between the switches S1a and S1b, and another intermediate node that is arranged between the switches S3 and S4. As can be seen from the example as shown in FIG. 5, switches S1a and S1b are connected in a back-to-back configuration, i.e., their body diodes pointing in opposite directions, as explained earlier.

[0070] Now, with reference to FIGS. 6A-6C, the exemplary switching phases of the power converter 500 of FIG. 5 will be schematically illustrated.

[0071] Broadly speaking, the operation of this power converter topology 500 is generally the same as or similar to that of the converter 200 as shown in FIG. 2. However, it is to be noted that the power converter 500 would generally not rely on body switching or back-to-back devices, and thus could use lower voltage rated devices, as will be illustrated in more detail below.

[0072] In particular, the buck operation may generally cycle through the phases of FIGS. 6B and 6C, which may be seen as equivalent or similar to that of a conventional buck operation involving switches S1b and S2. To be more specific, during the magnetizing phase (indicated by arrow 621) of the buck operation mode as shown in FIG. 6B, switches S1a, S1b and S4 are set in the ON state (e.g., the conductive state), while switches S2 and S3 are set in the OFF state (e.g., the non-conductive state). Moreover, during the demagnetizing phase (indicated by arrow 631) of the buck operation mode as shown in FIG. 6C, switches S1a, S2 and S4 are set in the ON state (e.g., the conductive state), while switches S3 and S1b are set in the OFF state (e.g., the non-conductive state). Notably, as illustrated above, switches S1a and S4 are closed in both the magnetizing and demagnetizing phases as shown in FIGS. 6B and 6C, so that C.sub.FLY is connected between V.sub.IN and GND, thereby being charged or re-charged in both phases (indicated by arrows 622 and 632, respectively).

[0073] On the other hand, the boost operation may generally cycle through the phases of FIGS. 6A and 6B. Particularly, the boost magnetizing phase may generally involve switches S1b and S3 (indicated by arrow 611), whilst the boost demagnetizing phase may generally involve switches S1a and S1b instead (indicated by arrow 621). To be more specific, during the magnetizing phase of the boost operation mode, switches S1b and S3 are switched to the ON state, while switches S1a, S2 and S4 are switched in the OFF state. Correspondingly, during the demagnetizing phase of the boost operation mode, switches S1a, S1b and S4 are switched to the ON state, while switches S2 and S3 switching elements are switched to the OFF state. It is to be noted that the flying capacitor C.sub.FLY is also (re-)charged via S1a and S4 switches (indicated by arrow 622) during the boost demagnetizing phase.

[0074] Finally, the (complete) buck-boost operation may generally cycle through all phases of FIGS. 6A, 6B and 6C and involves all switches, as can be understood and appreciated by the skilled person. Thus, repeated description thereof may be omitted for the sake of conciseness.

[0075] Furthermore, FIG. 7 schematically illustrates an example of another hybrid buck-boost power converter 700 according to embodiments of the present disclosure, which may also be seen as a (further improved) variant of the buck-boost power converter 500 as shown in FIGS. 5 and 6A-6C. Notably, as will become apparent in the detailed description below, broadly speaking, this variant would generally allow the use of low voltage rated devices for all switches.

[0076] In particular, as can be seen from FIG. 7, the topology of the hybrid buck-boost power converter 700 is generally the same as that of the hybrid buck-boost power converter 500 is FIG. 5, except for that, instead of coupling switch S2 between node LX and GND (or any other suitable node with a reference potential), the switch S2 is now coupled (e.g., connected) between node LX of the inductor and node CX of the flying capacitor C.sub.FLY.

[0077] This proposed hybrid variant topology 700 generally operates the same as the topology 500 as shown in FIGS. 6A to 6C, with the exception of the buck demagnetizing phase (as exemplarily shown in FIG. 8) involving both switches S2 and S4 (as indicated by arrow 831). Put differently, during the buck demagnetizing phase, the inductor L and the switches S2 and S4 may be seen as being coupled in series between the output node and the reference node (i.e., GND in the present example), thereby demagnetizing the inductor L. To be more specific, during the demagnetizing phase of the buck operation mode, switches S1a, S2 and S4 are switched to the ON state, while switches S1b and S3 are switched to the OFF state. Similar as shown in FIG. 6C, the flying capacitor C.sub.FLY is also (re-)charged during the demagnetizing phase of the buck operation mode (as indicated by arrow 832).

[0078] Similar to Table 1, the respectively voltage ratings for the switching devices of both hybrid converter topologies 500 and 700 are summarized and shown in below Table 2. Similar as Table 1, the voltage ratings summarized below in Table 2 may also be readily deduced from the corresponding voltages at respective nodes (or ports) of the switching devices during the respective operation phases, some of which (e.g., voltages V.sub.LX, V.sub.CX and V.sub.CY at nodes LX, CX and CY) are exemplarily shown in FIGS. 6A-6C.

TABLE-US-00002 TABLE 2 Voltage rating of the switching devices of the converters 500 and 700. V.sub.DS.sub.—.sub.max Switch Phase w/V.sub.DS.sub.—.sub.max BuBo 500 BuBo 700 S1a Bo/BuBo mag V.sub.OUT V.sub.OUT S1b BuBo demag V.sub.IN V.sub.IN S2 Bo/BuBo mag V.sub.IN + V.sub.OUT V.sub.IN S3 BuBo demag V.sub.OUT V.sub.OUT S4 Boost mag V.sub.OUT V.sub.OUT

[0079] Particularly, as can be clearly seen from the voltage ratings summarized for the power converter topology 500 as shown in the above Table 2, in comparison with those of Table 1, the voltage rating for switch S3 during the buck (or buck-boost) demagnetization phase is now reduced from V.sub.IN+V.sub.OUT (in the power converter topology 200 of Table 1) to V.sub.OUT (in power converter topology 500 of Table 2).

[0080] However, it is noted that the voltage rating for switch S2 during the boost (or buck-boost) magnetization phase is nevertheless still maintained at V.sub.IN+V.sub.OUT in both topologies 200 and 500, as shown in Tables 1 and 2, respectively. On the other hand, with the (improved) variant topology 700 of FIG. 7, this voltage rating, i.e., for switch S2 during the boost (or buck-boost) magnetization phase, is now also reduced from V.sub.IN+V.sub.OUT (in the power converter topology 200 of Table 1 or the power converter topology 500 of Table 2) to V.sub.OUT (in the power converter topology 700 of Table 2).

[0081] As indicated above already, thanks to the reduced V.sub.DS_max for the switches as shown in Table 2, switching devices with lower R.sub.SP can be used to lower silicon area while achieving higher V.sub.OUT for a given R.sub.OUT and V.sub.IN, or lower V.sub.IN for a given V.sub.OUT and R.sub.OUT.

[0082] The power converter topology 500 (and also 700) as proposed in the present disclosure also provides several additional advantages. For example, in the converters 500/700 of the present disclosure, the peak current-mode control scheme would generally be simpler to implement because it can rely on current sensing on switch S1b (see for example FIG. 5) where only I.sub.L flows during the boost magnetizing (as exemplified in FIG. 6A) and the buck-boost bypass/buck magnetizing phases (as exemplified in FIG. 6B). On the other hand, in the converter 200, both I.sub.FLY and I.sub.L would generally flow through switch S1 during the buck-boost bypass/buck magnetizing phase (as exemplified in FIG. 3B).

[0083] It should be further noted that the (re-)charge current I.sub.FLY flows through S1a and S4 when C.sub.FLY is (re-)charged. Therefore, switch S1b can be used for current sensing when peak current-mode control is used. This is generally in contrast with the architecture 200 in FIG. 2 where both I.sub.L and I.sub.FLY flow in switch S1 during the boost magnetizing and buck magnetizing/buck-boost bypass phase (as exemplified in FIG. 3B). Furthermore, it is also to be noted that the hybrid buck-boost architecture 500 of FIG. 5 and the minor variant 700 of FIG. 7 generally have the same trade-off explained for the architecture 200 of FIG. 2 between V.sub.OUT_max and R.sub.OUT because of the charge conservation on C.sub.FLY, as will also be understood and appreciated by the skilled person.

[0084] Similar to FIG. 4, FIG. 9 schematically illustrates an example of simulation results of the hybrid buck-boost power converter 700 of FIG. 7 in comparison with those of the hybrid buck-boost power converters 200 and 500 of FIGS. 2 and 5. Specifically, the exemplary simulation results in FIG. 9 mainly present comparison of the trade-off between V.sub.OUT_max and R.sub.OUT for the converter topologies 200, 500 and 700 operated in boost mode. In particular, the simulations are performed in an analogous or similar manner as those in FIG. 4 (e.g., with the assumption of V.sub.IN of 2.5 V, DCR of 20 mΩ, ESR of 5 mΩ, etc.). The table below summarizes the impedance used for the different switches in the three topologies during the exemplary simulation. Since the three converters 200, 500 and 700 generally follow the same (or similar) operation phases, the impedance seen by the inductor current during each phase in the three converters 200, 500 and 700 is matched.

TABLE-US-00003 TABLE 3 Impedances used during the simulation of FIG. 9. R.sub.ON [mΩ] Switches BuBo 200 BuBo 500 BuBo 700 S1 20 — — S1a — 10 10 S1b — 10 10 S2 20 20 10 S3 20 10 10 S4 20 20 10

[0085] To be more specific, it is started by assuming in the converter 200 the same impedance for all switches. The R.sub.ON of switches S1a and S1b is such that the path between V.sub.IN and node L.sub.X during the buck magnetizing phase has the same impedance of that exhibited in the converter 200 during the same phase. In the hybrid topologies 500 and 700 switch S3 is now in series with switch S1b during the boost magnetizing phase. Therefore, the impedance of switches S3 and S1b has been halved in the hybrid topologies 500 and 700. Finally, in the hybrid variant topology 700 the sum of switches S2 and S4 impedances is equal to the impedance of switch S4 in the converter 200. Therefore, the current path impedance during the buck demagnetizing phase is the same among the compared converters 200, 500 and 700.

[0086] As a result, in the examples of FIG. 9 diagrams 910 and 940 schematically show simulation results of the power converter 700 with R.sub.OUT being set to 20 Ω and 5 Ω, respectively; diagrams 920 and 950 schematically show simulation results of the power converter 500 with R.sub.OUT being set to 20 Ω and 5 Ω, respectively; and diagrams 930 and 960 schematically show simulation results of the power converter 200 with R.sub.OUT being set to 20 Ω and 5 Ω, respectively.

[0087] Notably, despite the devices used in the hybrid topologies 500 and 700 generally target smaller impedances, they occupy less silicon area because they can use switching devices (e.g., FETs) rated for lower V.sub.DS voltage, as illustrated above. That is, for ˜30% lower area, the proposed hybrid converter 500 (or 700) may generally show that for the same R.sub.OUT and same V.sub.IN conditions the proposed hybrid converter 500 (or 700) may reach higher V.sub.OUT_max values. For R.sub.OUT=20 Ω and V.sub.IN=2.5 V, the proposed hybrid converter 500 (or 700) may achieve a V.sub.OUT_max of ˜0.74 V and ˜1.6 V higher than that of the converter 200, respectively.

[0088] It is also to be noted that, even though not explicitly shown in the figures, in order for correctly operating the switching devices therein, the power converter topologies may further comprise a suitable control unit for generating the corresponding control signals, as will be understood and appreciated by the skilled person.

[0089] Finally, FIG. 10 is a flowchart schematically illustrating an example of a method 1000 of operating a hybrid buck-boost power converter according to embodiments of the disclosure. The hybrid buck-boost power converter may correspond to the power converter 500 as shown in FIG. 5 or the power converter 700 as shown in FIG. 7. The method 1000 comprises, at step S1010, providing and coupling (e.g., connecting or directly coupling) a first switching element (or switching device) between the input node and a first intermediate node. The method 1000 further comprises, at step S1020, providing and coupling (e.g., connecting or directly coupling) an inductive element (e.g., an inductor) between a second intermediate node and the output node. The method 1000 yet further comprises, at step S1030, providing a second switching element and coupling (e.g., connecting or directly coupling) one port (or terminal) of the second switching element (e.g., a drain port of a MOSFET) to the second intermediate node. The method 1000 also comprises, at step S1040, providing a third switching element and a fourth switching element, and coupling (e.g., connecting or directly coupling) the third and fourth switching elements in series between the output node and a reference node. The reference node may be ground (GND), or any other suitable reference node, as will be understood and appreciated by the skilled person. In addition, the method 1000 also comprises, at step S1050, providing and coupling (e.g., connecting or directly coupling) a flying capacitive element (e.g., a flying capacitor) between the first intermediate node and a third intermediate node that is arranged between the third and fourth switching elements. Finally, the method 1000 comprises, at step S1060, providing and coupling (e.g., connecting or directly coupling) a fifth switching element between the first and second intermediate nodes. Notably, any switching elements/devices mentioned in this disclosure may be transistor devices, such as FETs, MOSFETs, etc., or any other suitable switching devices, as will be understood and appreciated by the skilled person.

[0090] It should be noted that the apparatus features described above correspond to respective method features that may however not be explicitly described, for reasons of conciseness. The disclosure of the present document is considered to extend also to such method features. In particular, the present disclosure is understood to relate to methods of operating the circuits described above, and/or to providing and/or arranging respective elements of theses circuits.

[0091] It should further be noted that the description and drawings merely illustrate the principles of the proposed circuits and methods. Those skilled in the art will be able to implement various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope. Furthermore, all examples and embodiment outlined in the present document are principally intended expressly to be only for explanatory purposes to help the reader in understanding the principles of the proposed method. Furthermore, all statements herein providing principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.