DISPLAY DEVICE
20240423012 ยท 2024-12-19
Inventors
- Wooyong Sung (Yongin-si, KR)
- Sooyoun Kim (Yongin-si, KR)
- Seunghun Kim (Yongin-si, KR)
- Junghan Seo (Yongin-si, KR)
- Hyoungsub Lee (Yongin-si, KR)
- Moonwon Chang (Yongin-si, KR)
- Seunggun Chae (Yongin-si, KR)
- Wonwoo Choi (Yongin-si, KR)
Cpc classification
H10K59/124
ELECTRICITY
H10K59/8731
ELECTRICITY
H10K77/00
ELECTRICITY
International classification
Abstract
A display device includes: a substrate defining an opening and including a display area and a non-display area between the opening and display area, a pixel array including a plurality of pixels in the display area, each of the pixels having a pixel electrode, an opposite electrode facing the pixel electrode, and an intermediate layer between the pixel electrode and opposite electrode, a plurality of data lines bypassing the opening in the non-display area, first and second insulating layers, which cover the plurality of data lines, a conductive layer between the first and second insulating layers, and a thin film encapsulation layer covering the pixel array, the thin film encapsulation layer including at least one organic encapsulation layer and at least one inorganic encapsulation layer, and wherein, in the non-display area, a first groove is defined by the first insulating layer, the conductive layer, and the second insulating layer.
Claims
1. A display device comprising: a substrate comprising a first surface and a second surface opposite to the first surface, the substrate having a first opening that passes from the first surface to the second surface; a display area defined by a plurality of light-emitting diodes arranged on the first surface of the substrate, the display area surrounding the first opening in the substrate; a non-display area between the first opening in the substrate and the display area, the non-display area surrounding the first opening in the substrate; a first groove disposed in the non-display area; a second groove disposed in the non-display area, wherein the second groove is arranged between the first groove and the first opening in the substrate; and a thin film encapsulation layer on the plurality of light-emitting diodes, the thin film encapsulation layer comprising a first inorganic encapsulation layer, a second inorganic encapsulation layer, and an organic encapsulation layer between the first inorganic encapsulation layer and the second inorganic encapsulation layer, wherein the organic encapsulation layer comprises: a first portion overlapping the plurality of light-emitting diodes and the first groove; and a second portion spaced apart from the first portion and arranged between the first opening in the substrate and the first portion.
2. The display device of claim 1, wherein the second portion of the organic encapsulation layer overlaps the second groove.
3. The display device of claim 1, wherein the first inorganic encapsulation layer and the second inorganic encapsulation layer extend to the non-display area, respectively, and a part of the second inorganic encapsulation layer is in direct contact with a part of the first inorganic encapsulation layer in a sub-area between the first portion and the second portion of the organic encapsulation layer.
4. The display device of claim 1, wherein: the first groove is defined in a first multi-layer structure comprising an organic insulating layer and a conductive layer on the organic insulating layer, and the first groove is defined in a second multi-layer structure comprising an organic insulating layer and a conductive layer on the organic insulating layer.
5. The display device of claim 4, wherein the conductive layer of the first multi-layer structure comprises a first protrusion that extends toward the first groove beyond a first point at which a bottom surface of the conductive layer of the first multi-layer structure and a lateral surface of the organic insulating layer of the first multi-layer structure meet, and wherein the conductive layer of the second multi-layer structure comprises a second protrusion that extends toward the second groove beyond a second point at which a bottom surface of the conductive layer of the second multi-layer structure and a lateral surface of the organic insulating layer of the second multi-layer structure meet.
6. The display device of claim 5, further comprising an upper organic insulating layer on the first protrusion or the second protrusion.
7. The display device of claim 5, wherein the plurality of light-emitting diodes comprises a first plurality of light-emitting diode, the first plurality of light-emitting diode comprises a pixel electrode, an opposite electrode, and an intermediate layer between the pixel electrode and the opposite electrode, and wherein the intermediate layer comprises a plurality of sub-layers, and at least one of the plurality of sub-layers extends to the non-display area and includes portions that are separated by the first protrusion and the second protrusion.
8. The display device of claim 1, wherein the substrate has a second opening that passes from the first surface to the second surface and is spaced apart from the first opening.
9. The display device of claim 1, further comprising an electronic element corresponding to the first opening in the substrate, the electronic element comprises a camera, an acoustic element, or a sensor.
10. A display device comprising: a substrate comprising a first surface and a second surface opposite to the first surface, the substrate having a first opening that passes from the first surface to the second surface; a display area defined by a plurality of light-emitting diodes arranged on the first surface of the substrate, the display area surrounding the first opening in the substrate; a non-display area between the first opening in the substrate and the display area; a plurality of grooves disposed in the non-display area; and a thin film encapsulation layer on the plurality of light-emitting diodes, the thin film encapsulation layer comprising a first inorganic encapsulation layer, a second inorganic encapsulation layer, and an organic encapsulation layer between the first inorganic encapsulation layer and the second inorganic encapsulation layer, wherein the organic encapsulation layer comprises: a first portion overlapping the plurality of light-emitting diodes and a first groove of the plurality of grooves; and a second portion spaced apart from the first portion and being between the first opening in the substrate and the first portion, wherein the first inorganic encapsulation layer and the second inorganic encapsulation layer extend to the non-display area, respectively, and a part of the second inorganic encapsulation layer is in direct contact with a part of the first inorganic encapsulation layer in a sub-area of the non-display area.
11. The display device of claim 10, wherein the sub-area in which the part of the second inorganic encapsulation layer and the part of the first inorganic encapsulation layer are in direct contact with each other is between the first portion and the second portion of the organic encapsulation layer.
12. The display device of claim 10, wherein the first groove has an undercut shape.
13. The display device of claim 10, wherein the plurality of grooves further comprises a second groove spaced apart from the first groove.
14. The display device of claim 13, wherein the second portion of the organic encapsulation layer overlaps the second groove.
15. The display device of claim 10, wherein the first groove is defined in a multi-layer structure comprising an organic insulating layer and a conductive layer on the organic insulating layer.
16. The display device of claim 15, wherein the conductive layer of the multi-layer structure comprises a first protrusion that extends toward the first groove beyond a first point at which a bottom surface of the conductive layer and a lateral surface of the organic insulating layer meet.
17. The display device of claim 16, further comprising an upper organic insulating layer on the first protrusion of the conductive layer.
18. The display device of claim 16, wherein the plurality of light-emitting diodes comprises a first plurality of light-emitting diode, the first plurality of light-emitting diode comprises a pixel electrode, an opposite electrode, and an intermediate layer between the pixel electrode and the opposite electrode, and wherein the intermediate layer comprises a plurality of sub-layers, and at least one of plurality of the sub-layers extends to the non-display area and includes portions that are separated by the first protrusion.
19. The display device of claim 10, wherein the substrate has a second opening that passes from the first surface to the second surface and is spaced apart from the first opening.
20. The display device of claim 10, further comprising an electronic element corresponding to the first opening in the substrate, the electronic element comprises a camera, an acoustic element, or a sensor.
Description
BRIEF DESCRIPTION OF DRAWINGS
[0029]
[0030]
[0031]
[0032]
[0033]
[0034]
[0035]
[0036]
[0037]
[0038]
[0039]
[0040]
[0041]
[0042]
MODE OF DISCLOSURE
[0043] Since the present disclosure may have various modifications and several embodiments, embodiments are shown in the drawings and will be described in detail. Effects, features, and a method of achieving the same will be specified with reference to the embodiments described below in detail together with the attached drawings. However, the embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein.
[0044] Hereinafter, the present disclosure will be described in detail by explaining the embodiments of the present disclosure with reference to the attached drawings, and like reference numerals in the drawings denote like elements and thus their repeated description may be omitted.
[0045] It will be understood that although the terms first, second, etc. may be used herein to describe various components, these components should not be limited by these terms and are only used to distinguish one component from another.
[0046] As used herein, the singular forms a, an and the are intended to include the plural forms as well, unless the context clearly indicates otherwise.
[0047] It will be further understood that the terms includes, including, has and/or having used herein specify the presence of stated features or components, but do not preclude the presence or addition of one or more other features or components.
[0048] It will be understood that when a layer, region, or component is referred to as being formed on, another layer, region, or component, it may be directly or indirectly formed on the other layer, region, or component. That is, for example, intervening layers, regions, or components may be present.
[0049] Sizes of elements in the drawings may be exaggerated or reduced for convenience of description. In other words, since sizes and thicknesses of components in the drawings are arbitrarily illustrated for convenience of description, the following embodiments are not limited thereto.
[0050] When a certain embodiment may be implemented differently, a specific process order may be performed differently from the described order. For example, two consecutively described processes may be performed substantially at the same time or performed in an order opposite to the described order.
[0051] It will be understood that when a layer, region, or component is referred to as being connected to another layer, region, or component, it may be directly connected to the other layer, region, or component or may be indirectly connected to the other layer, region, or component with another layer, region, or component interposed therebetween. For example, it will be understood that when a layer, region, or component is referred to as being connected to or electrically connected to another layer, region, or component, it may be directly electrically connected to the other layer, region, or component or may be indirectly connected or electrically connected to other layer, region, or component with other layer, region, or component interposed therebetween.
[0052] Display devices may include an organic light-emitting display device, an inorganic electroluminescence (EL) display device (or an inorganic light-emitting display device), a quantum dot light-emitting display device, or the like. Hereinafter, as a display device according to an embodiment of the present disclosure, an organic light-emitting display device is described as an example. However, the display device of the present disclosure is not limited thereto, and various types of display devices may be used.
[0053]
[0054] Referring to
[0055] The pixel P may emit red, green, blue, or white light through the organic light-emitting diode. The pixel P in the present disclosure may be understood as a pixel that emits light of any one of red, green, blue, and white, as described above. The display area DA may be covered with an encapsulation member and thus may be protected from external air or moisture.
[0056] An opening OP may be provided inside the display area DA. The opening OP may be surrounded by pixels P. The opening OP may be an area for a separate electronic element for the function of the display device 1 or an area for separate electronic elements to add new functions. For example, when the display device 1 includes an electronic element such as a camera, an acoustic element, or a sensor for recognizing a distance, a fingerprint, or the like, the electronic element may be arranged to overlap the opening OP.
[0057] The non-display area NDA may include a first non-display area NDA1 adjacent to an inner edge of the display area DA, and a second non-display area NDA2 adjacent to an outer edge of the display area DA. The first non-display area NDA1 and the second non-display area NDA2 may be spaced apart from each other with the display area DA therebetween.
[0058] The first non-display area NDA1 is an area that does not provide an image, and may be located between the opening OP and the pixel array of the display area DA. The first non-display area NDA1 may surround the opening OP. The first non-display area NDA1 may be surrounded by the pixel array of the display area DA. In the first non-display area NDA1, wiring lines for providing electrical signals to pixels P adjacent to the opening OP may bypass the opening OP, and the wiring lines may be bent along the edge of the opening OP.
[0059] The second non-display area NDA2 is an area that does not provide an image, and a driver (e.g., a scan driver, a data driver, etc.) and a wiring line for transmitting an electrical signal or power that is transmitted to each pixel P may be arranged in the second non-display area NDA2.
[0060]
[0061]
[0062] Referring to
[0063] The second thin film transistor T2 is a switching thin film transistor and is connected to a scan line SL and a data line DL, and may be configured to transfer a data voltage input from the data line DL to the first thin film transistor T1 in response to a switching voltage input from the scan line SL. The storage capacitor Cst may be connected to the second thin film transistor T2 and a driving voltage line PL and may store a voltage corresponding to a difference between a voltage transferred from the second thin film transistor T2 and a first power voltage ELVDD supplied to the driving voltage line PL.
[0064] The first thin film transistor T1 is a driving thin film transistor and may be connected to the driving voltage line PL and the storage capacitor Cst and may control a driving current flowing through the organic light-emitting diode OLED from the driving voltage line PL in response to the voltage value stored in the storage capacitor Cst. The organic light-emitting diode OLED may emit light having certain brightness by using the driving current. An opposite electrode (e.g., a cathode) of the organic light-emitting diode OLED may receive a second power voltage ELVSS.
[0065] Although it is shown in
[0066]
[0067] Referring to
[0068] The data lines DL are electrically connected to a data driver 1100. The data driver 1100 may be of a chip on panel (COP) type and arranged in the second non-display area NDA2 (see
[0069] Some of the data lines DL located around the opening OP may be bent to bypass the opening OP along the edge of the opening OP in the first non-display area NDA1.
[0070] Although not shown in
[0071]
[0072] Referring to
[0073] The substrate 100 may have a multi-layer structure including a base layer and a barrier layer. In this regard,
[0074] The first and second base layers 101 and 103 may each include a polymeric resin, such as polyethersulphone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalide (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC), or cellulose acetate propionate (CAP).
[0075] The first and second barrier layers 102 and 104 may each include silicon oxide, silicon nitride, or the like. In a non-limiting embodiment of the present disclosure, the first barrier layer 102 may be a multi-layer including an amorphous silicon layer and a silicon oxide layer to improve adhesion between neighboring layers, and the second barrier layer 104 may be a silicon oxide layer. However, the present disclosure is not limited thereto.
[0076] A buffer layer 110 formed to prevent impurities from penetrating into a semiconductor layer of a thin film transistor may be arranged on the substrate 100. The buffer layer 110 may include an inorganic insulating material such as silicon nitride or silicon oxide, and may be a single layer or a multi-layer including the inorganic insulating material described above. In some embodiments, the second barrier layer 104 of the substrate 100 may be understood as a portion of the buffer layer 110 having a multi-layer structure.
[0077] First and second thin film transistors T1 and T2, the storage capacitor Cst, and the like may be arranged on the buffer layer 110.
[0078] The first thin film transistor T1 may be a driving thin film transistor and may include a semiconductor layer Act1, a gate electrode G1, a source electrode S1, and a drain electrode D1. The second thin film transistor T2 may be a switching thin film transistor and may include a semiconductor layer Act2, a gate electrode G2, a source electrode S2, and a drain electrode D2. The source electrode S2 of the second thin film transistor T2 may be understood as a portion of the data line DL described above with reference to
[0079] The semiconductor layers Act1 and Act2 may each include polysilicon. Alternatively, the semiconductor layers Act1 and Act2 may each include amorphous silicon, an oxide semiconductor, or an organic semiconductor.
[0080] The gate electrodes G1 and G2 may each include a low-resistance metal material. For example, the gate electrodes G1 and G2 may each include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like, and may each include a multi-layer or a single layer including the material.
[0081] The gate insulating layer 130 is between the semiconductor layers Act1 and Act2 and the gate electrodes G1 and G2, respectively, and the gate insulating layer 130 may include an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, or hafnium oxide.
[0082] The source electrodes S1 and S2 and the drain electrodes D1 and D2 may each include a material having good conductivity. For example, the source electrodes S1 and S2 and the drain electrodes D1 and D2 may each include a conductive material including Mo, Al, Cu, Ti, or the like, and may each include a multi-layer or a single layer including the material. In a non-limiting embodiment, the source electrodes S1 and S2 and the drain electrodes D1 and D2 may each include a multi-layer of Ti/Al/Ti.
[0083] The storage capacitor Cst includes a lower electrode C1 and an upper electrode C2 overlapping each other with a first interlayer insulating layer 150 therebetween. The storage capacitor Cst may overlap the first thin film transistor T1. In this regard,
[0084] The first and second interlayer insulating layers 150 and 170 may each include an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, or hafnium oxide.
[0085] A pixel circuit including the first and second thin film transistors T1 and T2 and the storage capacitor Cst is covered by the first insulating layer 180. The first insulating layer 180 is a planarization insulating layer and may include an organic insulating material, such as a general-purpose polymer (e.g., polymethylmethacrylate (PMMA) or polystyrene (PS)), a polymer derivative having a phenolic group, an acryl-based polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or a blend thereof.
[0086] An organic light-emitting diode OLED is arranged on the first insulating layer 180. A pixel electrode 210 of the organic light-emitting diode OLED is disposed on the first insulating layer 180, but the edge of the pixel electrode 210 is covered by a second insulating layer 190, which is a pixel-defining layer. The pixel electrode 210 may include a conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In.sub.2O.sub.3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). In another embodiment, the pixel electrode 210 may include a reflective layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), Iridium (Ir), chromium (Cr), or a compound thereof. In another embodiment, the pixel electrode 210 may further include a layer including ITO, IZO, ZnO, or In.sub.2O.sub.3 above or below the above-described reflective layer.
[0087] The second insulating layer 190 includes an opening exposing the top surface of the pixel electrode 210, but covers the edge of the pixel electrode 210. The second insulating layer 190 may include an organic insulating material, such as a general-purpose polymer (e.g., PMMA or PS), a polymer derivative having a phenolic group, an acryl-based polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or a blend thereof. As an embodiment, the first and second insulating layers 180 and 190 may each include polyimide. Alternatively, the second insulating layer 190 may include an inorganic insulating material, or both an inorganic insulating material and an organic insulating material.
[0088] An intermediate layer 220 includes an emission layer. The emission layer may include a high molecular weight or low molecular weight organic material that emits light of a certain color. The intermediate layer 220 may include at least one functional layer, that is, at least one of a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), or an electron injection layer (EIL).
[0089] Some of the plurality of layers constituting the intermediate layer 220, for example, the functional layer(s), may be arranged not only in the display area DA but also in the first non-display area NDA1, and may disconnected in the first non-display area NDA1 by first and second grooves 410 and 420 to be described later.
[0090] An opposite electrode 230 is arranged to face the pixel electrode 210 with the intermediate layer 220 therebetween. The opposite electrode 230 may include a conductive material having a low work function. For example, the opposite electrode 230 may include a (semi)transparent layer including Ag, Mg, A1, Pt, Pd, Au, Ni, Nd, Ir, Cr, lithium (Li), calcium (Ca), or an alloy thereof. Alternatively, the opposite electrode 230 may further include a layer including ITO, IZO, ZnO, or In.sub.2O.sub.3 on the (semi) transparent layer including the aforementioned material.
[0091] The organic light-emitting diode OLED is covered with a thin film encapsulation layer 300. The thin film encapsulation layer 300 may include at least one organic encapsulation layer and at least one inorganic encapsulation layer.
[0092] The first and second inorganic encapsulation layers 310 and 330 may each include one or more inorganic insulating materials selected from aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride and may be formed by chemical vapor deposition (CVD). The organic encapsulation layer 320 may include a polymer-based material. Examples of the polymer-based material may include acryl-based resin, epoxy-based resin, polyimide, and polyethylene.
[0093] Referring to
[0094] The first area A1 is an area for securing a cutting margin in a process of removing the substrate 100 and a stacked structure thereon, which correspond to the opening area OA, in order to form the opening OP, and the second area A2 is an area having a valley structure to prevent side moisture permeation. The second groove 420 may be located in the second area A2. The second groove 420 may be defined in the substrate 100 and a multi-insulating layer on the substrate 100.
[0095] The third area A3 is an area in which data lines DL that bypass along the edge of the opening OP are arranged around the opening OP. The data lines DL located in the third area A3 may be alternately arranged with an insulating layer therebetween. For example, adjacent data lines DL may be respectively arranged below and above with an insulating layer (e.g., the second interlayer insulating layer 170) therebetween, thereby reducing the distance (pitch) between the adjacent data lines DL. Through this structure, the width of the third area A3 may be reduced, and the width of the first non-display area NDA1 may also be reduced.
[0096] In a process of manufacturing a display device having the opening OP, a process of removing the substrate 100 and the stacked structure thereon, which correspond to the opening area OA, is performed as described above. In this case, the removing process may be performed using laser. As an impact is transmitted due to the removing process for forming the opening OP, lifting of the thin film encapsulation layer 300 may occur, and the lifting phenomenon of the thin film encapsulation layer 300 is likely to occur in the third area A3 where a bonding force with the thin film encapsulation layer 300 is relatively weak. However, according to an embodiment of the present disclosure, because the first groove 410 is located in the third area A3, a bonding force between the thin film encapsulation layer 300 and a structure thereunder may be enhanced to thereby prevent or reduce the lifting phenomenon of the thin film encapsulation layer 300. The first groove 410 is located on the data lines DL. The first groove 410 may overlap the data lines DL.
[0097] Referring to
[0098] The first groove 410 may be formed to have a certain depth along a depth direction of the multi-layer ML. The first groove 410 may be formed by removing portions of the second insulating layer 190, the conductive layer 185, and the first insulating layer 180. The first groove 410, which is formed while portions of the second insulating layer 190, the conductive layer 185, and the first insulating layer 180 are opened, may have a different width depending on the location thereof.
[0099] A first width W1 of an open area (opening) of the conductive layer 185 is less than a second width W2 of an open area (opening) of the first insulating layer 180 below the conductive layer 185. A third width W3 of an open area of the second insulating layer 190 may be greater than the first width W1. In other words, an inner edge of the conductive layer 185 may extend further toward the central axis of the first groove 410 than inner edges of the first and second insulating layers 180 and 190. The first groove 410 may be formed using a laser or through an etching (dry/wet) process.
[0100] In
[0101] When the intermediate layer 220 and the opposite electrode 230 are formed on the substrate 100 having the first groove 410 as shown in
[0102] The intermediate layer 220 and the opposite electrode 230 may be deposited by an evaporation method using a mask. In this case, the intermediate layer 220 and the opposite electrode 230 are disconnected by an eave structure (undercut structure) formed by the conductive layer 185, which is a layer extending toward the central axis of the first groove 410, and the first insulating layer 180 thereunder. The first groove 410 entirely surrounds the opening OP in the first non-display area NDA1, as shown in
[0103] Because the first inorganic encapsulation layer 310 has relatively excellent step coverage unlike the intermediate layer 220 and the opposite electrode 230, the first inorganic encapsulation layer 310 may be continuously formed without disconnection to cover the entire inner surface of the first groove 410, as shown in
[0104] A portion of the organic encapsulation layer 320 may be located in the first groove 410. As at least one of the intermediate layer 220 or the opposite electrode 230 is disconnected by the first groove 410 and the first inorganic encapsulation layer 310 and the organic encapsulation layer 320 fill the inner space of the first groove 410, peeling of the thin film encapsulation layer 300, which may occur in an opening forming process, may be effectively prevented. A bonding force between the thin film encapsulation layer 300 and a structure thereunder, that is, the first groove 410, may be further increased by the shape (anchor shape) of the first groove 410 having a different width depending on the location thereof.
[0105] Referring to
[0106] The second groove 420 is defined in a multi-insulating layer MIL. The multi-insulating layer MIL may include the substrate 100, the buffer layer 110, the gate insulating layer 130, the first interlayer insulating layer 150, and the second interlayer insulating layer 170, which are described above with reference to
[0107] The second groove 420 may be formed to have a certain depth in a depth direction of the multi-insulating layer MIL. For example, the second groove 420 may be formed by partially removing the second interlayer insulating layer 170, the first interlayer insulating layer 150, the gate insulating layer 130, the buffer layer 110, the second barrier layer 104, and the second base layer 103.
[0108] In an embodiment, a stacked body (hereinafter, referred to as an upper layer) including the second interlayer insulating layer 170, the first interlayer insulating layer 150, and the gate insulating layer 130 may be removed in a process of forming a contact hole for contact between the source electrodes S1 and S2 or drain electrodes D1 and D2 and the semiconductor layers Act1 and Act2 in the display area DA described with reference to
[0109] A fourth width W4 of an open area of the middle layer is less than a fifth width W5 of an open area of the lower layer under the middle layer. A sixth width W6 of an open area of the upper layer may be greater than the fourth width W4. In other words, the inner edge of the middle layer may extend further toward the central axis of the second groove 420 than the inner edges of the lower and upper layers.
[0110] When the intermediate layer 220 and the opposite electrode 230 are formed on the substrate 100 having the second groove 420 as shown in
[0111] Because the first inorganic encapsulation layer 310 has relatively excellent step coverage as described above, the first inorganic encapsulation layer 310 may be continuously formed without disconnection to cover the entire inner surface of the second groove 420, as shown in
[0112] When a plurality of second grooves 420 are located as shown in
[0113] Although the first groove 410 described with reference to
[0114]
[0115] Referring to
[0116]
[0117] Referring to
[0118] As shown in
[0119] As described above, a thin film encapsulation layer (i.e., the thin film encapsulation layer 300 in
[0120] Although
[0121] Although
[0122] Although