NEGATIVE CAPACITANCE TOPOLOGICAL QUANTUM FIELD-EFFECT TRANSISTOR

20250006821 ยท 2025-01-02

    Inventors

    Cpc classification

    International classification

    Abstract

    Disclosed herein is A structure comprising: a top gate electrode and a bottom gate electrode, a channel layer formed from a channel material with a band gap modulable by electric field, the channel layer being electrically insulated from the top gate electrode and the bottom gate electrode and being located adjacent to at least one layer of a negative capacitance material.

    Claims

    1. A structure comprising: a top gate electrode and a bottom gate electrode, a channel layer formed from a channel material with a band gap modulable by electric field, the channel layer being electrically insulated from the top gate electrode and the bottom gate electrode and being located adjacent to at least one layer of a negative capacitance material.

    2. A structure comprising: a top gate electrode and a bottom gate electrode, a planar channel layer located between the top gate electrode and the bottom gate electrode, the planar channel layer being separated from the top gate electrode by a first insulating layer and separated from the bottom gate electrode by a second insulating layer; wherein the planar channel layer is formed from a channel material with a band gap modulable by electric field; wherein at least one of the first insulating layer and the second insulating layer are formed from a negative capacitance material.

    3. The structure of claim 2, wherein both of the first insulating layer and the second insulating layers are formed from the ferroelectric material.

    4. The structure of claim 2, wherein the negative capacitance material exhibits negative capacitance and wherein the channel material exhibits positive capacitance, and the combined capacitance of the channel layer, the first insulating layer, and second insulating layer is greater than 0.

    5. The structure of claim 2, wherein the first insulating layer and the second insulating layer are each in physical contact with the planar channel layer, the first insulating layer being arranged on a first side of the planar channel layer and the second insulating layer being arranged on a second side of the planar channel layer.

    6. The structure of claim 1, wherein the top gate and the bottom gate are operable independently of one another.

    7. The structure of claim 1, wherein the structure further comprises a source electrode in electrical contact with the channel layer, and a drain electrode spaced apart from the source electrode and in electrical contact with the channel layer.

    8-9. (canceled)

    10. The structure of claim 1, wherein the top gate electrode and the bottom gate electrode are configured to apply an electric field across the channel layer in a direction perpendicular to a plane of the channel layer.

    11. The structure of claim 1, wherein the channel material is selected from the group consisting of: few-layer graphene, a two-dimensional semiconductor, or a topological material.

    12-16. (canceled)

    17. The structure of claim 2, wherein the planar channel layer is in the form of a thin film having a thickness of less than 10 nm.

    18. The structure of claim 1, wherein the structure is a field effect transistor or a component thereof.

    19. A method of operating a structure according to claim 1, the method comprising: applying or modulating a gate voltage to the top gate electrode and/or the bottom gate electrode to generate or vary an electric field across the channel layer in a direction perpendicular to a plane of the channel layer to alter the bandgap of the channel material in the channel layer.

    20. The method of claim 19, wherein altering the bandgap of the channel layer further comprises switching the channel material between a trivial state and a non-trivial or topological state.

    21. (canceled)

    22. An electrical device comprising the structure according to claim 1.

    23. The structure of claim 2, wherein the top gate and the bottom gate are operable independently of one another.

    24. The structure of claim 2, wherein the structure further comprises a source electrode in electrical contact with the channel layer, and a drain electrode spaced apart from the source electrode and in electrical contact with the channel layer.

    25. The structure of claim 2, wherein the top gate electrode and the bottom gate electrode are configured to apply an electric field across the channel layer in a direction perpendicular to a plane of the channel layer.

    26. The structure of claim 2, wherein the channel material is selected from the group consisting of: few-layer graphene, a two-dimensional semiconductor, or a topological material.

    27. The structure of claim 2, wherein the structure is a field effect transistor or a component thereof.

    28. An electrical device comprising the structure according to claim 2.

    Description

    BRIEF DESCRIPTION OF DRAWINGS

    [0043] FIG. 1: Schematic of negative capacitance topological quantum field-effect transistor. (a) Structure of the device. (b) Electrostatic potential energy as a function of distance across the device in on (V.sub.b=V.sub.t=0) and off (V.sub.b>0, V.sub.t<0) states.

    [0044] FIG. 2: Band diagrams in on (topological insulator, upper diagram) and off (conventional insulator, lower diagram) states. The conducting helical edge states of the topological insulator are shown in the upper diagram.

    [0045] FIG. 3: Schematic band diagrams of the unipolar NC-TQFET as a function of gate voltage applied to a single gate V.sub.g.

    [0046] FIG. 4: Bandgap as a function of gate voltage for a bilayer graphene (BLG)-ferroelectric transistor (S*=1), and a NC-TQFET with similar properties modelled on bismuthene with strong spin-orbit coupling (S*=0.568). The modeling results assuming the experimentally measured electric-field-dependent bandgap values for BLG from optical spectroscopy and electronic transport are also shown, along with a tight-binding calculation. The remanent polarization P.sub.r=27.5 C/cm.sup.2 corresponds to La-doped HfO.sub.2, and P.sub.r=130 C/cm.sup.2 corresponds to tetragonal-like BiFeO.sub.3.

    DESCRIPTION OF EMBODIMENTS

    [0047] The invention broadly relates to a structure comprising: a top gate electrode and a bottom gate electrode, a channel layer formed from a channel material with a band gap modulable by electric field (such as a topological material), the channel layer being electrically insulated from the top gate electrode and the bottom gate electrode and being located adjacent to at least one layer of a negative capacitance material.

    [0048] The inventors have found that this structure can be used to form a topological quantum field effect transistor (TQFET) with reduced sub-threshold swing as compared with a similar transistor without the negative capacitance material.

    [0049] In particular, TQFETs are electric-field effect transistors, where the barrier to conduction is created through an electric field, rather than raising an existing potential barrier in the channel as per conventional metal-oxide-semiconductor field-effect transistors (MOSFET). Thus, a TQFET can take full advantage of electric field amplification by negative capacitance, whereas this is not possible with a conventional MOSFET since the electric field is zero in the channel in the subthreshold region.

    [0050] In more detail, a conventional MOSFET has a capacitance between channel and gate which is large compared to other parasitic capacitances to the channel. In the subthreshold regime, the capacitance between channel and gate is large compared to the quantum capacitance of the channel. Under these conditions, when a gate voltage is applied, i.e. an electrochemical potential difference between gate and channel, this raises the chemical potential of the channel by the same amount, while hardly changing the electrostatic potential of the channel (the electrochemical potential difference is the sum of these two). Thus, the electrostatic potential difference between gate and channel is minimal, and there is very little electric field induced by the gate voltage. Thus, in a conventional MOSFET, because the electric field is near zero in the subthreshold regime, the device cannot benefit from amplification of the electric field through the use of a negative capacitance in series with a positive capacitance.

    [0051] In contrast, in a TQFET, electric field is used to modify the bandgap of a channel material. In the subthreshold regime, the increased bandgap will act as an increased activation barrier to electron flow. This is completely different to a MOSFET: rather than using the chemical potential change to create a barrier in a semiconductor with a fixed bandgap, the electric field changes the bandgap in a channel with a fixed chemical potential.

    [0052] The inventors have found that TQFET devices can benefit from amplification of the electric field through the use of a negative capacitance in series with a positive capacitance. This can be accomplished by nearly balancing the positive capacitance of the channel itself with the negative capacitance of a ferroelectric to produce a net positive capacitance (noting that the net positive capacitance ensures that there is no spontaneous and hysteretic polarization of the negative capacitance material). The electric field amplification becomes very large when this balance is near perfect. Advantageously, this amplification of the electric field means that the change in bandgap will be larger for a given change in gate voltage, and thus the subthreshold swing will be smaller.

    [0053] The invention will be generally described below in relation to a preferred embodiment thereof in the form of a negative capacitance topological quantum field effect transistor (NC-TQFET).

    [0054] FIG. 1a is an illustration of an NC-TQFET according to one embodiment of the invention. The NC-TQFET 100 includes independent top 102 and bottom gates 104, a channel formed from a 2D layer of a topological insulator (TI) 106 sandwiched between ferroelectric layers 108 and 110, and source electrode 112 and drain electrode 114 in electrical contact with channel 106.

    [0055] The inventors have found that the combined structure of ferroelectric (negative capacitance) and 2D TI (positive capacitance) amplifies the electric field in the 2D TI layer as illustrated in FIG. 1b. FIG. 1b shows the electrostatic potential energy as a function of distance across the device in on state where there is zero voltage applied to bottom gate 104 and top gate 102 (e.g. V.sub.b=V.sub.t=0), and off state where the voltage applied to bottom gate 104 is greater than zero and the voltage applied to top gate 102 is less than zero (e.g. V.sub.b>0, V.sub.t<0).

    [0056] FIG. 2 shows band diagrams for the TI in on (topological insulator, upper diagram) and off (conventional insulator, lower diagram) states. With reference to FIG. 2, the NC-TQFET is in the on state when the two top gate voltages V.sub.b=V.sub.t=0; the potential across the ferroelectric/2D TI/ferroelectric structure is constant, the electric field in the 2D TI is zero, and the 2D TI is in a topological state. Applying gate voltages V.sub.b>0, V.sub.t<0 places the NC-TQFET in the off state, amplifying the electric field in the 2D TI, and opening a conventional bandgap and producing the potential profile shown in the off state in the lower diagram of FIG. 2.

    [0057] The NC-TQFET described above is ambipolar, turned off by either V.sub.b>0, V.sub.t<0 or V.sub.b<0, V.sub.t>0. Ideally an FET device should operate with a single gate as a unipolar transistor. This situation is realized by grounding one gate and applying a gate voltage to the other. Furthermore, if the NC-TQFET channel is connected to semiconducting source/drain leads, unipolar conduction results. FIG. 3 illustrates schematic band diagrams of the unipolar NC-TQFET as a function of gate voltage applied to a single gate V.sub.g. At V.sub.g=0 the electric field is zero and the device is on. At V.sub.g<0 the electric field is non-zero, opening a bandgap, and the net effect of the two gates is to shift the overall potential by and amount V.sub.g/2. This allows a bandgap eV/S* to be opened at a gate voltage V.

    [0058] To estimate the electric field amplification in the device illustrated in FIG. 1a, the electric field-polarization E-P relationship for the ferroelectric layer can be approximated as E=2.sub.FEP+4.sub.FEP.sup.3 where .sub.FE<0 and .sub.FE>0 are parameters that characterize the ferroelectric. A negative value of a indicates a bistable P(E) relationship i.e. ferroelectricity. The TI layer has E=2.sub.TIP with .sub.TI=+1/(2) corresponding to a linear dielectric. A relationship between the gate voltage applied across the FE/TI/FE stack, V.sub.g, and the surface potential difference across the TI, .sub.s:

    [00001] V g = ( 1 + a 1 ) s + a 2 s 3 .

    where .sub.1=.sub.FE/.sub.TI and .sub.2=(4.sub.FE/.sub.TI.sup.3)t.sub.FE.sup.2 where t.sub.FE is the ferroelectric total thickness (twice the thickness of top and bottom layer). The maximum electric field amplification is when .sub.FE/.sub.TI=1 or t.sub.FE=(2|.sub.FE|C.sub.TI).sup.1. Then V.sub.g=((2.sub.FEC.sub.TI.sup.2)/(|.sub.FE))*.sub.s.sup.3=((C.sub.TI.sup.2)/(Pr.sup.2))*.sub.s.sup.3 where P.sub.r=sqrt(/(2)) is the remanent polarization.

    [0059] Modelling was conducted considering bilayer graphene (BLG) as the channel material since this BLG has an experimentally characterized electric-field-dependent bandgap. However, the skilled person will appreciate that the results of this modelling are applicable to a range of topological insulator materials. For the ferroelectric negative capacitance material, La-doped HfO.sub.2 was selected for which an assumed value of P.sub.r=27.5 C/cm.sup.2 was used. As above, the skilled addressee will appreciate that a range of other ferroelectric materials could be used, and particularly those based on HfO.sub.2/ZrO.sub.2.

    [0060] For a material with negligible spin-orbit coupling such as bilayer graphene, S*=1. The electric field is reduced by dielectric screening in the BLG layer by a dielectric constant K. Furthermore, the separation of the atoms in the sublattice t.sub.v is smaller than the van der Waals thickness of the layer t.sub.TI, which further reduces the sublattice potential difference by an amount t.sub.v/t.sub.TI, such that .sub.v=(t.sub.v/t.sub.TI).sub.s, and dE.sub.g/d.sub.s. For BLG, t.sub.v/t.sub.TI=0.5, =3.6, S*=1 predicts dE.sub.g/d.sub.s=0.139 which is very close to experimentally measured values from optical spectroscopy and electronic transport. The BLG capacitance C.sub.s=0.048 F/m.sup.2 (assuming =3.6, t.sub.TI=6.68 A) allows E.sub.g(V.sub.g) to be calculated for the ferroelectric/BLG/ferroelectric structure (see the solid lower curve in FIG. 4).

    [0061] Certain materials, such as honeycomb Xene lattices of heavy atoms, experience a strong Rashba spin-orbit interaction due to the gate electric field. As a result, S* can be less than 1. The inventors have found S*<0.75 in existing materials and estimate S* as low as 0.57 in functionalized Bi (see Table 1 below).

    TABLE-US-00001 TABLE 1 Strength of atomic spin orbit interaction (SOI) , Slater-Koster parameter Vsp and sub-threshold swing S* for TQFET based on group-IV and V Xenes (eV) V.sub.sp S* Free atom Normalised Experimental (eV) .sub.R 0 Graphene 0.006 0.009 5.580 0.999 [0.999] Silicene 0.028 0.044 () 0.044 2.54 0.999 [0.999] Germanene 0.2 0.29 (0.2) 0.29 2.36 0.996 [0.993] Stanene 0.6 0.8 (0.48) 0.77 1.953 0.961 [0.934] Arsenene 0.26 (0.36) 0.421 1.275 0.978 [0.955] Antimonene 0.6 (0.8) 0.973 1.170 0.904 [0.802] Bismuthene 1.5 2.25 1.3 0.707 [0.568] Assuming dz z and sin 1 for quasi-planar/low-buckled honeycomb lattice). Similar to other group-IV and V elements, a normalization factor of 3/2 is assumed for bismuthene compared to the free atomic SOI.

    [0062] Modelling results for an NC-TQFET which is a strongly spin-orbit coupled version of BLG with similar screening properties but S*=0.57, equivalent to the spin-orbit parameters for bismuthene, yield an E.sub.g(V.sub.g) given by the solid upper curve in FIG. 4.

    [0063] FIG. 4 also allows a comparison between the modelled NC-TQFET with a hypothetical low voltage Complementary metal-oxide-semiconductor device (CMOS LV) which corresponds to a gate-all-around field effect transistor (GAAFET) at the 2018 node (metal-1 half-pitch F=15 nm). CMOS LV characteristics are V.sub.g=0.3 V, on current I.sub.on=3.2 A, on-off ratio I.sub.on/I.sub.off=1.310.sup.4, intrinsic device switching energy E.sub.int=3.62 aJ and intrinsic delay time =3.8 ps. For the purpose of the comparison, the inventors have assumed that the off current is I.sub.off=I.sub.onexp(E.sub.g/kT) where the I.sub.on is the current at E.sub.g=0, kT=26 meV is the thermal energy at room temperature, which corresponds to E.sub.g=245 meV. From FIG. 4 it can be seen that BLG has E.sub.g=245 meV at V.sub.g=0.213 V, only a modest improvement over CMOS LV. However, the modelled bismuthene NC-TQFET has E.sub.g=245 meV at V.sub.g=0.030 V. This represents an order-of-magnitude improvement over CMOS LV.

    [0064] For the purpose of the modelling, the inventors have further assumed that the NC-TQFET has a width F and gate length F=15 nm. The on-state occurs at zero bandgap, where the BLG is a massive Dirac semimetal with a conductivity approximately 4 e.sup.2/h and conductance 155 S. Drain voltage V.sub.d=V.sub.g=0.030 V gives I.sub.on=4.6 A, similar to CMOS LV. The gate charge Q is 6.010.sup.17 C=374 e, where e is the elemental charge, and the intrinsic switching energy E.sub.int=()QV.sub.g=0.45 aJ. The channel resistance R=6.45 kOhms, and gate capacitance C=Q/V.sub.g=2000 aF, giving the switching time =(RC)=13 ps. The intrinsic switching energy of 0.45 aJ is almost an order of magnitude lower than CMOS LV.

    [0065] As shown in FIG. 4, if a ferroelectric with a higher remnant polarization is used, such as BiFeO.sub.3 (P.sub.r=130 C/cm.sup.2) then a larger bandgap may be achieved at smaller gate voltages (dotted lines).

    [0066] The NC-TQFET points to a general strategy to realize a new type of low-voltage transistor. The operating parameters of such a transistor are set by the materials parameters of the 2D TI and ferroelectric layers, and there appears to be no fundamental lower bound to the subthreshold swing for such a device.

    [0067] It will be understood that the invention disclosed and defined in this specification extends to all alternative combinations of two or more of the individual features mentioned or evident from the text or drawings. All of these different combinations constitute various alternative aspects of the invention.