PROCESS FOR MANUFACTURING AN ELECTROLUMINESCENT DEVICE

Abstract

A process for manufacturing an electroluminescent device, comprising: (a) using a stack comprising, successively: a substrate having a surface; matrix arrays of pixels formed on the surface of the substrate, of columnar shape; an encapsulating layer arranged to cover the matrix arrays of pixels; a dielectric layer formed on the encapsulating layer; (b) performing a directional etch along the normal to the surface of the substrate, of a portion of the dielectric layer extending between the pixels of the matrix arrays of pixels; the dielectric layer having a portion remaining at the end of step (b); and (c) performing a selective chemical etch of the remaining portion of the dielectric layer with a chemical etchant that permits selective etching of the remaining portion of the dielectric layer with respect to the encapsulating layer.

Claims

1. A process for manufacturing an electroluminescent device, comprising: a) using a stack comprising, successively: a substrate, having a surface; matrix arrays of pixels formed on the surface of the substrate, the pixels having a columnar shape and extending along the normal to the surface of the substrate; an encapsulating layer arranged to cover the matrix arrays of pixels; and a dielectric layer formed on the encapsulating layer; b) performing a directional etch along the normal to the surface of the substrate, of a portion of the dielectric layer extending between the pixels of the matrix arrays of pixels, the dielectric layer having a portion remaining at an end of the step b); and c) performing a selective chemical etch of the remaining portion of the dielectric layer, the step c) being performed with a chemical etchant that permits selective etching of the remaining portion of the dielectric layer with respect to the encapsulating layer.

2. The process according to claim 1, further comprising a step d) of forming at least one colored resin on the encapsulating layer at the end of the step c), said at least one coloured resin being customized for filtration of an emission spectrum of an underlying pixel.

3. The process according to claim 1, wherein: the step b) is carried out performed with a photolithography mask having patterns arranged to face the pixels of the matrix arrays of pixels; and the step c) is preceded by a step c.sub.0) of removing the photolithography mask.

4. The process according to claim 1, wherein the step b) is preceded by the following steps: b.sub.01) forming a trench between adjacent matrix arrays of pixels that has a bottom wall and side walls; and b.sub.02) depositing a barrier layer on the bottom wall and on the side walls, the barrier layer being made of a material selected according to the chemical etchant with which the step c) is performed, so as to obtain an etch stop layer during performance of the step c).

5. The process according to claim 1, wherein the chemical etchant with which the step c) is performed is vapour-phase hydrofluoric acid.

6. The process according to claim 5, wherein the barrier layer deposited during the step b.sub.02) is made of at least one material selected from aluminium (Al), alumina (Al.sub.2O.sub.3), and aluminium nitride (AlN).

7. The process according to claim 5, wherein the step b) is preceded by a step b.sub.03) of filling the trench with tungsten at the end of the step b.sub.02).

8. The process according to claim 1, wherein the step b) is preceded by an initial directional etch along the normal to the surface of the substrate, of a surface portion of the dielectric layer so as to reach a position in the stack situated above the pixels of the matrix arrays of pixels, at a distance from the encapsulating layer.

9. The process according to claim 1, wherein the encapsulating layer of the stack used in the step a) is made of at least one material selected from aluminium (Al), alumina (Al.sub.2O.sub.3), and aluminium nitride (AlN).

10. The process according to claim 1, wherein the dielectric layer of the stack used in the step a) is made of silicon dioxide.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Other features and advantages will become apparent from the detailed description of various embodiments of the invention, the description being accompanied by examples and references to the appended drawings.

[0051] FIG. 1 is a schematic cross-sectional view illustrating step a) of a process according to the invention.

[0052] FIG. 2 is a schematic cross-sectional view illustrating step b.sub.01) of a process according to the invention.

[0053] FIG. 3 is a schematic cross-sectional view illustrating step b.sub.02) of a process according to the invention.

[0054] FIG. 4 is a schematic cross-sectional view illustrating the application of a photolithography mask for the etching of the barrier layer.

[0055] FIG. 5 is a schematic cross-sectional view illustrating the etching of the barrier layer.

[0056] FIG. 6 is a schematic cross-sectional view illustrating the removal of the photolithography mask illustrated in FIG. 4.

[0057] FIG. 7 is a schematic cross-sectional view illustrating the application of a photolithography mask for the directional etch in step b) of a process according to the invention.

[0058] FIG. 8 is a schematic cross-sectional view illustrating the directional etch in step b) of a process according to the invention.

[0059] FIG. 9 is a schematic cross-sectional view illustrating step c.sub.0) of removing the photolithography mask illustrated in FIG. 7.

[0060] FIG. 10 is a schematic cross-sectional view illustrating the selective etch in step c) of a process according to the invention.

[0061] FIG. 11 is a schematic cross-sectional view, illustrating an initial directional etch of a surface portion of the dielectric layer that can be carried out before step b).

[0062] FIG. 12 is a schematic cross-sectional view illustrating step d) of a process according to the invention.

[0063] FIG. 13 is a schematic cross-sectional view illustrating step b.sub.03) of a process according to the invention.

[0064] It should be noted that, for the sake of legibility and ease of understanding, the drawings described above are schematic and not necessarily to scale. The cross sections are made normal to the surface of the substrate.

DETAILED DESCRIPTION OF EMBODIMENTS

[0065] For the sake of simplicity, elements that are identical or that perform the same function in the various embodiments have been designated with the same references.

[0066] The invention provides a process for manufacturing an electroluminescent device, comprising the following steps: [0067] a) using a stack comprising, successively: [0068] a substrate 1, having a surface 10; [0069] matrix arrays of pixels 2 formed on the surface 10 of the substrate 1, the pixels 2 having a columnar shape and extending along the normal to the surface 10 of the substrate 1; [0070] an encapsulating layer 3 arranged to cover the matrix arrays of pixels 2; [0071] a dielectric layer 4 formed on the encapsulating layer 3; [0072] b) performing a directional etch along the normal to the surface 10 of the substrate 1, of a portion of the dielectric layer 4 extending between the pixels 2 of the matrix arrays of pixels 2; the dielectric layer 4 having a portion 40 remaining at the end of step b); [0073] c) performing a selective chemical etch of the remaining portion 40 of the dielectric layer 4, step c) being carried out with a chemical etchant that permits selective etching of the remaining portion 40 of the dielectric layer 4 with respect to the encapsulating layer 3.

Step a)

[0074] As shown in FIG. 1, the stack used in step a) comprises successively: [0075] a substrate 1, having a surface 10; [0076] matrix arrays of pixels 2 formed on the surface 10 of the substrate 1, the pixels 2 having a columnar shape and extending along the normal to the surface 10 of the substrate 1; [0077] an encapsulating layer 3 arranged to cover the matrix arrays of pixels 2; [0078] a dielectric layer 4 formed on the encapsulating layer 3.

[0079] The substrate 1 is advantageously made of a semiconductor material. By way of non-limiting example, the substrate 1 may be made of silicon (Si).

[0080] By way of non-limiting example, the pixels 2 may be nanowires, in particular gallium nitride (GaN) nanowires. The pixels 2 advantageously form periodic patterns.

[0081] The encapsulating layer 3 of the stack used in step a) is advantageously made of at least one material selected from aluminium (Al), alumina (Al.sub.2O.sub.3) and aluminium nitride (AlN). At least one material is understood to mean that the encapsulating layer 3 may be made of a multilayer material comprising at least one material selected from aluminium (Al), alumina (Al.sub.2O.sub.3) and aluminium nitride (AlN). The encapsulating layer 3 of the stack used in step a) may have a thickness of the order of 1 m.

[0082] The dielectric layer 4 of the stack used in step a) is advantageously made of silicon dioxide (SiO.sub.2). The dielectric layer 4 of the stack used in step a) may have a thickness of between 8 m and 10 m.

Step b)

[0083] As illustrated in FIG. 8, the directional etch performed during step b) is a directional etch along the normal to the surface 10 of the substrate 1, of a portion of the dielectric layer 4 extending between the pixels 2 of the matrix arrays of pixels 2.

[0084] By way of non-limiting example, the directional etch carried out during step b) is a dry plasma etch. When the dielectric layer 4 is made of silicon dioxide, step b) may be carried out using a fluorine-containing plasma, such as a carbon tetrafluoride (CF.sub.4) plasma.

[0085] As illustrated in FIGS. 7 and 8, step b) is advantageously carried out with a photolithography mask M1 having patterns arranged to face the pixels 2 of the matrix arrays of pixels 2. In other words, the patterns of the photolithography mask M1 lie above the pixels 2 of the matrix arrays of pixels 2.

[0086] The dielectric layer 4 has a portion 40 remaining at the end of step b). The remaining portion 40 of the dielectric layer 4 extends beneath the patterns of the photolithography mask M1.

[0087] Step b) is advantageously preceded by the following steps: [0088] b.sub.01) forming a trench 5 (as illustrated in FIG. 2) between adjacent matrix arrays of pixels 2 that has a bottom wall 50 and side walls 51; [0089] b.sub.02) depositing a barrier layer 6 (as illustrated in FIG. 3) on the bottom wall 50 and on the side walls 51, the barrier layer 6 being made of a material selected according to the chemical etchant with which step c) is carried out, so as to obtain an etch stop layer during performance of step c).

[0090] The side walls 51 of the trench 5 are formed by the dielectric layer 4. The bottom wall 50 of the trench 5 is formed by the surface 10 of the substrate 1. By way of non-limiting example, step b.sub.01) may be carried out by a dry plasma etch. When the dielectric layer 4 is made of silicon dioxide (SiO.sub.2), step b.sub.01) may comprise an etch by a C.sub.4F.sub.8 plasma. Step b.sub.01) may comprise an etch of the encapsulating layer 3, for example by a chlorine-containing plasma (e.g. Cl.sub.2 or BCl.sub.3) when the encapsulating layer 3 is made of aluminium (Al) or alumina (Al.sub.2O.sub.3). Step b.sub.01) is advantageously carried out by a directional etch along the normal to the surface 10 of the substrate 1.

[0091] Step b.sub.02) is carried out by a deposition technique that permits the barrier layer 6 to follow the surface topology of the stack. It is not strictly necessary for the deposition technique to produce conformal deposition (degree of conformity equal to 100%). In other words, the deposition technique is selected so as to have a degree of conformity (ratio between the width of the flanks of the deposited barrier layer 6 and the thickness at the surface of the deposited barrier layer 6) that makes it possible to follow the surface topology of the stack. By way of non-limiting examples, the barrier layer 6 may be formed during step b.sub.02) by chemical vapour deposition or by atomic layer deposition (ALD), these deposition techniques having a good degree of conformity.

[0092] The barrier layer 6 deposited during step b.sub.02) is advantageously made of at least one material selected from aluminium (Al), alumina (Al.sub.2O.sub.3) and aluminium nitride (AlN). At least one material is understood to mean that the barrier layer 6 may be made of a multilayer material comprising at least one material selected from aluminium (Al), alumina (Al.sub.2O.sub.3) and aluminium nitride (AlN).

[0093] In preparation for the directional etch in step b), a portion of the barrier layer 6 (extending between the trenches 5) is etched using a photolithography mask M0 (as illustrated in FIGS. 4 and 5), the patterns of which cover the trenches 5. The photolithography mask M0 may be a photosensitive resin that is then removed from the stack by a stripping technique, as illustrated in FIG. 6.

[0094] As illustrated in FIG. 13, step b) is advantageously preceded by a step b.sub.03) of filling the trench 5 with a tungsten (W) type material 52 at the end of step b.sub.02). Step b.sub.03) is advantageously followed by a step of chemical-mechanical polishing such that the tungsten (W) type material 52 is flush with the stack.

[0095] Step b) is advantageously preceded by an initial directional etch along the normal to the surface 10 of the substrate 1, of a surface portion of the dielectric layer 4 so as to reach a position P in the stack situated above the pixels 2 of the matrix arrays of pixels 2, at a distance D from the encapsulating layer 3. As illustrated in FIG. 11, the position P reached at the end of the initial directional etch (e.g. dry plasma etch) must be a distance D sufficiently far from the encapsulating layer 3 so as not to damage the upper portion of the pixels 2 by the strong bombardment with ionized gas. By way of non-limiting example, the distance D may be of the order of a hundred nanometres. More precisely, it is possible to consider a distance D greater than or equal to 100 nm having an etch uniformity of the order of 3%.

Step c)

[0096] The selective chemical etch performed during step c) is a selective chemical etch of the remaining portion 40 of the dielectric layer 4. As illustrated in FIG. 10, the selective chemical etch performed during step c) is an isotropic etch, but may not be total in the sense that some portions 400 of the remaining portion 40 of the dielectric layer 4 (particularly at the ends of the matrix arrays of pixels 2) may remain at the end of step c). However, in practice, the selective chemical etch carried out during step c) may be total or almost total in the sense that all or almost all of the remaining portion 40 of the dielectric layer 4 has been eliminated at the end of step c).

[0097] Step c) is carried out with a chemical etchant that permits selective etching of the remaining portion 40 of the dielectric layer 4 with respect to the encapsulating layer 3. The chemical etchant with which step c) is carried out is advantageously vapour-phase hydrofluoric acid (HF).

[0098] As illustrated in FIG. 9, step c) is advantageously preceded by a step c.sub.0) of removing the photolithography mask M1 with which step b) can be carried out. The photolithography mask M1 may be a photosensitive resin that is removed from the stack during step c.sub.0) by a stripping technique.

Step d)

[0099] As illustrated in FIG. 12, the process advantageously includes a step d) of forming at least one coloured resin 7 on the encapsulating layer 3 at the end of step c). Said at least one coloured resin 7 is customized for filtration of an emission spectrum of an underlying pixel 2.

[0100] Said at least one coloured resin 7 may be a resin of the polymer matrix type having a quantum dot. Said at least one coloured resin 7 may be a resin having pigments that can act as a colour filter.

[0101] The invention is not limited to the disclosed embodiments. Those skilled in the art will be capable of considering technically workable combinations thereof and of substituting equivalents therefor.