MICROCHANNEL PLATE IMAGE INTENSIFIERS AND METHODS OF PRODUCING THE SAME
20250014852 ยท 2025-01-09
Inventors
Cpc classification
International classification
Abstract
Image intensifier systems incorporating a microchannel plate (MCP) and methods for producing the same are disclosed. In some examples, a device is disclosed that includes a first substrate having a radiation-receiving first surface and an opposed second surface through which electromagnetic radiation is transmitted. A second substrate is coupled to the first substrate to define a vacuum cavity therebetween. An electron-emitting photocathode is disposed within the vacuum cavity for generating electrons from electromagnetic radiation transmitted through the second surface. A microchannel plate is disposed within the vacuum cavity and defines microchannels extending from an input end to an output end. Each of the microchannels is configured to generate electrons in response to an electron generated by the photocathode being received through the input end of the respective microchannel. A phosphorescent layer also is disposed within the vacuum cavity and adjacent the output ends of the microchannels of the microchannel plate.
Claims
1. A method of manufacturing an optoelectronic device, the method comprising: disposing a plurality of electron emitting photocathodes between a first wafer and a microchannel plate defining a plurality of microchannels extending therethrough; disposing a plurality of phosphorescent crystals between the microchannel plate and a second wafer comprising an imaging array comprising a plurality of photodiodes, wherein the imaging array is configured to image photons generated by the phosphorescent crystals in response to electrons generated by the microchannels; and bonding the second wafer to the first wafer to form a plurality of vacuum cavities therebetween such that each of the vacuum cavities comprises at least one of the electron emitting photocathodes, one or more of the microchannels, and at least one of the phosphorescent crystals.
2. The method of claim 1, wherein bonding the second wafer to the first wafer comprises bonding each of the first and second wafers to opposed sides of the microchannel plate.
3. The method of claim 1, wherein the first and second wafers are bonded to one another within a processing chamber exhibiting a pressure less than about 110.sup.4 Torr.
4. The method of claim 1, wherein the first and second wafers are bonded to one another within a processing chamber exhibiting a pressure equal to or less than about 110.sup.6 Torr.
5. The method of claim 1, wherein bonding the second wafer to the first wafer comprises performing at least one of glass frit bonding, anodic bonding, surface modified bonding, or eutectic solder bonding.
6. The method of claim 1, wherein the first and second wafers are bonded to one another within a processing chamber exhibiting a temperature in a range of about 250 C to about 450 C.
7. The method of claim 1, further comprising disposing a plurality of vacuum gettering materials between the first and second wafers such that at least one of the vacuum gettering materials is sealed within each of the vacuum cavities.
8. The method of claim 1, further comprising pre-baking the vacuum gettering materials prior to bonding the first and second wafers so as to eliminate outgassing.
9. The method of claim 1, further comprising dicing the bonded first and second wafers into a plurality of dies, wherein each die of the plurality of dies comprises at least one of the vacuum cavities.
10. The method of claim 1, wherein each of the photodiodes is aligned two or more of the microchannels or each of the microchannels is aligned with two or more of the photodiodes.
11. The method of claim 1, wherein each of the photodiodes is aligned with a respective one of the microchannels.
12. The method of claim 1, wherein the microchannel plate comprises a silicate glass having an electron emitting semiconducting layer deposited on a surface and the silicate glass comprises silicon dioxide, borosilicate, or aluminosilicate.
13. The method of claim 1, further comprising forming a thin film on a surface of each of the microchannels via atomic layer deposition, chemical vapor deposition, reactive ion deposition, or reactive vapor evaporation.
14. A method of manufacturing an optoelectronic device, the method comprising: disposing a plurality of electron emitting photocathodes between a first wafer and a microchannel plate defining a plurality of microchannels extending therethrough; disposing a phosphorescent layer between the microchannel plate and a second wafer comprising an imaging array comprising a plurality of photodiodes, wherein the imaging array is configured to collect electrons from the microchannel plate and produce a digital image; and bonding the second wafer to the first wafer to form a plurality of vacuum cavities therebetween such that at least one of the electron emitting photocathodes, one or more of the microchannels, and at least a portion of the phosphorescent layer are disposed within each of the vacuum cavities.
15. The method of claim 14, further comprising aligning each of the photodiodes with two or more of the microchannels prior to bonding the first and second wafers.
16. The method of claim 14, further comprising aligning two or more of the photodiodes with a respective one of the microchannels prior to bonding the first and second wafers.
17. A method of manufacturing an optoelectronic device, the method comprising: disposing a plurality of electron emitting photocathodes between a first substrate and a microchannel plate defining a plurality of microchannels extending therethrough; forming an imaging array in a second substrate comprising a plurality of photodiodes, wherein each of the photodiodes is aligned with at least one of the microchannels and the photodiodes are configured to collect electrons from the microchannel plate and produce a digital image; and bonding the second substrate to the first substrate to form a plurality of vacuum cavities therebetween such that at least one of the electron emitting photocathodes and one or more of the microchannels are disposed within each of the vacuum cavities.
18. The method of claim 17, further comprising disposing a phosphorescent layer between the microchannel plate and the second substrate, wherein a portion of the phosphorescent layer is disposed within each of the vacuum cavities.
19. The method of claim 17, further comprising aligning each of the photodiodes with two or more of the microchannels prior to bonding the first and second substrates.
20. The method of claim 17, further comprising further comprising aligning two or more of the photodiodes with a respective one of the microchannels prior to bonding the first and second substrates.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0030] The skilled person in the art will understand that the drawings, described below, are for illustration purposes only. The drawings are not intended to limit the scope of the applicant's teachings in any way.
[0031]
[0032]
[0033]
[0034]
[0035]
[0036]
[0037]
[0038]
DETAILED DESCRIPTION
[0039] It will be appreciated that for clarity, the following discussion will explicate various aspects of embodiments of the applicant's teachings, while omitting certain specific details wherever convenient or appropriate to do so. For example, discussion of like or analogous features in alternative embodiments may be somewhat abbreviated. Well-known ideas or concepts may also for brevity not be discussed in any great detail. The skilled person will recognize that some embodiments of the applicant's teachings may not require certain of the specifically described details in every implementation, which are set forth herein only to provide a thorough understanding of the embodiments. Similarly, it will be apparent that the described embodiments may be susceptible to alteration or variation according to common general knowledge without departing from the scope of the disclosure. The following detailed description of embodiments is not to be regarded as limiting the scope of the applicant's teachings in any manner.
[0040] Whereas conventional image intensifiers typically utilize MCPs containing brittle, PbO-based glass such that image intensifiers must be produced individually in order to prevent breakage, various aspects of the present teachings provide methods of producing image intensifier devices incorporating MCPs using high-volume parallel processing techniques on the wafer level. Additionally or alternatively, certain aspects of the present teachings provide methods of producing optoelectronic imaging devices having an improved ability to produce digital images of the scene under observation.
[0041] With reference first to
[0042] The front wafer 110 can comprise a variety of materials but is generally configured to receive and transmit ambient electromagnetic radiation therethrough. By way of non-limiting example, the front wafer 110 can comprise a glass cover. Though not shown, it will be appreciated in light of the present teachings that the front wafer 110 may comprise a micro-lens array, e.g., formed on a radiation receiving surface effective to focus radiation incident thereon.
[0043] The plurality of photocathodes 120 are disposed between the front wafer 110 and the MCP wafer 130 and are generally configured to generate one or more electrons in response to electromagnetic radiation received thereby. A person skilled in the art will appreciate that the photocathodes 120 may comprise a variety of materials known or hereafter developed and modified in accordance with the present teachings. In certain embodiments, the photocathodes 120 may comprise gallium arsenide, by way of non-limiting example. As shown, the plurality of photocathodes 120 may be generally disposed between the front wafer 110 and MCP wafer 130 and separated from one another (e.g., there is a gap between adjacent photocathodes 120 of the depicted array) and may comprise a variety of surface areas depending, for example, on the desired size of the image intensifier device as discussed otherwise herein.
[0044] As shown, the MCP wafer 130 is generally disposed between the photocathodes 120 and the phosphorescent crystals 140. The MCP wafer 130 can have a variety of configurations, but generally comprises a plurality of microchannels extending from the upper surface to the lower surface as shown in
[0045] Whereas conventional image intensifiers utilize PbO-based MCPs that are sufficiently fragile such that manufacturing of an image intensifier must be done individually (e.g., sufficiently thin PbO-based MCPs cannot be generated as 200 mm wafers without significant risk of breakage), certain aspects of the present teachings provide for the use of less fragile bulk materials having an electron-emitting semiconducting layer deposited on the surface of the microchannels. In various aspects, the bulk material may comprise a silicate glass (e.g., silicon dioxide, borosilicate, aluminosilicate) containing less than about 1% PbO, while the electron-emitting semiconductor layer may comprise one or more of lead oxide, cesium iodide, gallium arsenide, cadmium telluride, cadmium sulfide, indium phosphide, indium antimonide, germanium, silicon, or other group II-VI, group III-V, or group IV semiconductor, all by way of non-limiting example. Example techniques for forming the electron-emitting semiconducting layer on the surfaces of the MCP wafer 130 include atomic layer deposition, chemical vapor deposition, reactive ion deposition, or reactive vapor evaporation, by way of example. An article by O'Mahony et al. entitled Atomic layer deposition of alternative glass microchannel plates published in J. Va. Sci. Technol. A 34(1) (January/February 2016), which is incorporated by reference herein in its entirety, describes an example method that can be modified in accordance with the present teachings for producing an MCP wafer 130. Unlike a conventional PbO-based MCP, the MCP wafer 130 can be reliably manufactured as a 200 mm wafer with less likelihood of breakage, for example, when dicing the assembled, bonded wafers as discussed below.
[0046] As shown, the plurality of phosphorescent crystals 140 are disposed between the MCP wafer 130 and the back wafer 150 and are generally configured to generate one or more photons in response to the electrons received thereby. A person skilled in the art will appreciate that the phosphorescent crystals 140 may comprise a variety of materials known or hereafter developed and modified in accordance with the present teachings. In certain embodiments, the phosphorescent crystals 140 may be configured to emit photons of a variety of wavelengths, though in some example aspects may emit green light having a wavelength in the range from about 500 nm to about 565 nm as with conventional image intensifiers, for example, used in night vision goggles. As shown, the plurality of phosphorescent crystals 140 may be generally disposed between the MCP wafer 130 and back wafer 150 and separated from one another (e.g., there is a gap between adjacent phosphorescent crystals 140 of the depicted array) and are generally aligned with the photocathodes 120.
[0047] The back wafer 150 can comprise a variety of materials, but is generally configured to receive photons generated by the phosphorescent crystals 140. As discussed below, the back wafer may comprise a glass substrate, for example, through which the photons may be transmitted (e.g., to a downstream viewer and/or sensor via a fiber optic bundle). Alternatively, in some example aspects, the back wafer 150 itself may comprise an imaging array configured to convert the photons generated by the phosphorescent crystals 140 into a digital image, for example.
[0048] With the various layers arranged as in
[0049] In various aspects, further techniques can be employed to help provide and/or maintain the sufficiently low pressures required for the image intensifier operation. By way of example, in some aspects, each of the layers 110-150 can be pre-baked (e.g., to dry out, remove any solvents) to prevent outgassing. Additionally or alternatively, gettering materials can be provided within the vacuum cavity (as discussed below with reference to
[0050] In addition to or alternatively to pre-baking, for example, in certain aspects, the various layers 110-150 may be bonded within processing chamber 102 maintained at a temperature in a range of about 250 C to about 450 C. In various aspects, the temperature may be maintained at or above about 405 C during the bonding process for a sufficient time to help ensure that the gettering material, if provided, is activated.
[0051] The front and back wafers 110, 150 can be bonded to the opposed surfaces of the MCP wafer 130 utilizing any technique known in the art or hereafter developed. By way of example, the various surfaces can be bonded to one another via glass frit bonding, anodic bonding, surface modified bonding, and eutectic solder bonding.
[0052] With a wafer so assembled and bonded as described above, the bonded wafers may be diced into a plurality of dies (e.g., image intensifier devices), each of which comprises at least one vacuum cavity sealed therewith. A traditional dicing saw may be utilized, for example, to cut the bonded layers between the vacuum cavities (e.g., along a bond line) so as to preserve the vacuum cavity within each image intensifier device formed within the wafers, though it will be appreciated by those skilled in the art that dicing may also be performed any other means known in the art (e.g., laser cutting). In some aspects, the front wafer 110 and MCP wafer 130 may be cut, with the cutline moving horizontally away from the vacuum cavity such that a shelf is formed on a surface of the back wafer 150. As will be appreciated by a person skilled in the art, such a shelf may provide a surface, for example, at which to provide electrical connections.
[0053] Though not shown in
[0054] With reference now to
[0055] With reference now to
[0056] The back substrate 350 with the image sensor can have a variety of configurations. By way of example, the back substrate 350 may comprise a plurality of complementary metal-oxide semiconductor (CMOS) imagers. While both front side illuminated (FSI) and backside illuminated (BSI) CMOS devices could be utilized in accordance with the present teachings, such CMOS imagers may be configured as BSI imagers such that the photodiodes 350a are disposed closely to the phosphorescent layer 340 and the light generated thereby does not need to pass by circuitry, for example, prior to reaching the junction as an FSI device.
[0057] Referring to
[0058] The passivation coating 502 on a surface of a BSI CMOS device 500 can include a dielectric material. Non-limiting examples of such passivation thin film dielectric materials include silicon oxide, silicon nitride, and silicon oxi-nitride. In other examples, the passivation coating 502 includes a low k (dielectric constant) dielectric material, such as hafnium oxide, aluminum oxide, and hafnium aluminum oxide, for example. The electrons that tunnel through the passivation coating 502 and into the photodiodes 350a are accumulated in the photodiode 350a. The accumulated electrons can be read out by an image sensor circuit of the BSI CMOS device 500 so as to create a digital image.
[0059] The photodiodes 350a may also be arranged in a variety of patterns. By way of example, each of the photodiodes 350a may be associated with two or more of the microchannels 330a of the MCP 330 such that phosphorescent light generated from electrons generated from the two or more associated microchannels 330a is substantially detected by a single one of the photodiodes 350a, as depicted in
[0060]
[0061] The section headings used herein are for organizational purposes only and are not to be construed as limiting. While the applicant's teachings are described in conjunction with various embodiments, it is not intended that the applicant's teachings be limited to such embodiments. On the contrary, the applicant's teachings encompass various alternatives, modifications, and equivalents, as will be appreciated by those of skill in the art.
[0062] Having thus described the basic concept of the technology, it will be rather apparent to those skilled in the art that the foregoing detailed disclosure is intended to be presented by way of example only, and is not limiting. Various alterations, improvements, and modifications will occur and are intended to those skilled in the art, though not expressly stated herein. These alterations, improvements, and modifications are intended to be suggested hereby, and are within the spirit and scope of the technology. Additionally, the recited order of processing elements or sequences, or the use of numbers, letters, or other designations therefore, is not intended to limit the claimed processes to any order except as may be specified in the claims. Accordingly, the technology is limited only by the following claims and equivalents thereto.