μ-LED, μ-LED device, display and method for the same

Abstract

The invention relates to various aspects of a -LED or a -LED array for augmented reality or lighting applications, in particular in the automotive field. The -LED is characterized by particularly small dimensions in the range of a few m.

Claims

1. A method for picking up and placing optoelectronic semiconductor chips, comprising: generating electron-hole pairs in optoelectronic semiconductor chips and an electric dipole field is thereby generated in the vicinity of the respective optoelectronic semiconductor chip; generating, via a pick-up tool, an electric field; and picking-up the optoelectronic semiconductor chips with the pick-up tool during or after generation of the electron-hole pairs and depositing at predetermined positions; wherein: the optoelectronic semiconductor chips for generating the electron-hole pairs are irradiated with light having a predetermined wavelength or a predetermined wavelength range, and the light for generating the electron-hole pairs is incident on the optoelectronic semiconductor chips through the pick-up tool.

2. The method according to claim 1, wherein the optoelectronic semiconductor chips are -LEDs or LEDs.

3. The method according to claim 1, wherein the optoelectronic semiconductor chips are arranged on a carrier and the light for generating the electron-hole pairs falls through the carrier onto the optoelectronic semiconductor chips.

4. The method according to claim 1, wherein a plurality of optoelectronic semiconductor chips are provided and the electrical dipole fields are generated only in selected optoelectronic semiconductor chips of the plurality of optoelectronic semiconductor chips.

5. The method according to claim 1, wherein the pick-up tool generates the electric field only in predetermined areas.

6. The method according to claim 1, wherein the pick-up tool has a plurality of elevations on a surface facing the optoelectronic semiconductor chips, and the optoelectronic semiconductor chips are picked up by the elevations of the pick-up tool.

7. The method according to claim 1, wherein at least a portion of a surface of the pick-up tool facing the optoelectronic semiconductor chips is flat, and the optoelectronic semiconductor chips are picked up with the flat portion of the pick-up tool.

8. The method according to claim 1, wherein the pick-up tool has the shape of a cylinder, which is rolled over the optoelectronic semiconductor chips to pick up the optoelectronic semiconductor chips.

9. The method according to claim 1, wherein for depositing the optoelectronic semiconductor chips the electric field generated by the pick-up tool is changed.

10. The method according to claim 1, wherein the pick-up tool for picking up the optoelectronic semiconductor chips directly contacts the optoelectronic semiconductor chips and holds them by means of Van der Waals forces.

11. An apparatus for picking up and putting down optoelectronic semiconductor chips, -LED arrays or -LED, comprising: an excitation element for generating electron-hole pairs in optoelectronic semiconductor chips in order to generate an electric dipole field in the vicinity of the respective optoelectronic semiconductor chip; and a pick-up tool for picking up and depositing the optoelectronic semiconductor chips, wherein the pick-up tool is configured such that it generates an electric field, then picks up the optoelectronic semiconductor chips with the electron-hole pairs generated by the excitation element and deposits the optoelectronic semiconductor chips at predetermined locations; wherein: the excitation element is configured to generate light with a predetermined wavelength or a predetermined wavelength range for generating the electron-hole pairs in the optoelectronic semiconductor chips, and the excitation element is arranged in such a way that the light for generating the electron-hole pairs is incident on the optoelectronic semiconductor chips through the pick-up tool.

12. The apparatus according to claim 11, wherein the pick-up tool has a plurality of projections on a surface facing the optoelectronic semiconductor chips, and the optoelectronic semiconductor chips are picked up by the projections of the pick-up tool.

13. The apparatus according to claim 11, wherein at least a portion of a surface of the pick-up tool facing the optoelectronic semiconductor chips is flat and the optoelectronic semiconductor chips are picked up with the flat portion of the pick-up tool.

14. The apparatus according to claim 11, wherein the pick-up tool has the shape of a cylinder, which is rolled over the optoelectronic semiconductor chips to pick up the optoelectronic semiconductor chips.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In the following section, some of the above-mentioned and summarized aspects are explained in more detail using various explanations and examples.

(2) FIG. 1A shows a diagram illustrating some requirements for so-called -displays or micro-displays of different sizes with respect to the field of view and pixel pitch of the -display;

(3) FIG. 1B shows a diagram of the spatial distribution of rods and cones in the human eye;

(4) FIG. 1C shows a diagram of the perceptual capacity of the human eye with assigned projection areas;

(5) FIG. 1D is a figure showing the sensitivity of the rods and cones over the wavelength;

(6) FIG. 2A is a diagram illustrating some requirements for microdisplays of different sizes in terms of the field of view and the angle of collimation of a pixel of the -display;

(7) FIG. 2B illustrates an exemplary execution of a pixel arrangement to illustrate the parameters used in FIGS. 1A and 2A;

(8) FIG. 3A shows a diagram illustrating the number of pixels required depending on the field of view for a specific resolution;

(9) FIGS. 3B-1 and 3B-2 illustrate a table of preferred applications for -LED arrays;

(10) FIG. 4A shows a principle representation of a -LED display with essential elements for light generation and light guidance;

(11) FIG. 4B shows a schematic representation of a -LED array with similar -LEDs;

(12) FIG. 4C is a schematic representation of a -LED array with -LEDs of different light colors;

(13) FIG. 5 shows a simplified structure of a display with pixel elements arranged in rows and columns;

(14) FIG. 6 shows an enlarged section of a display according to the previous figure with one pixel element and subpixels;

(15) FIG. 7 shows a schematic vertical sectional view through a section of a display according to the proposed concept with a pixel element separation layer and subpixel separation elements;

(16) FIG. 8 illustrates a schematic vertical sectional view through pixel elements applied in a layer on a backplane;

(17) FIG. 9 is an embodiment where various converters are embedded in a light-shaping structure;

(18) FIG. 10 illustrates another aspect where quantum well intermixing is used to create an optical separation;

(19) FIG. 11 shows steps of a method for calibrating a pixel element with a pixel element separation layer and sub-pixel separation elements;

(20) FIG. 12 shows a first embodiment of a pixel array according to some aspects of the proposed principle, where adjacent pixels are connected by a thin material bridge;

(21) FIG. 13 shows a second embodiment of a pixel array with two -LEDs connected by a material bridge;

(22) FIG. 14A is a third embodiment of a pixel array with some aspects according to the proposed principle;

(23) FIG. 14B is a diagram for the embodiment of the previous figure, which illustrates the energy flow with regard to the material bridge;

(24) FIG. 15 shows a fourth embodiment of a pixel array with some aspects according to the proposed principle;

(25) FIG. 16A is a fifth embodiment of a pixel array;

(26) FIG. 16B shows an embodiment of a pixel array with adjacent -LEDs, a material bridge, with an additional output structure according to some of the aspects revealed here.

(27) FIG. 17 shows a sixth embodiment of a pixel array;

(28) FIG. 18 is a seventh embodiment of a pixel array with further aspects;

(29) FIG. 19 shows an eighth embodiment of a pixel array;

(30) FIG. 20 shows a ninth embodiment of a pixel array;

(31) FIG. 21 shows an embodiment with different steps for a method of manufacturing a pixel array according to the proposed concept;

(32) FIGS. 22A to 22J show a first embodiment of a process for manufacturing a -LED with a holding structure according to some aspects of the presented concept;

(33) FIGS. 23A to 23J show a second embodiment of a process for manufacturing a -LED with a holding structure according to some aspects of the presented concept;

(34) FIGS. 24A to 24I represent a third embodiment of a process for manufacturing a -LED with a holding structure according to some aspects of the concept presented;

(35) FIGS. 25A to 25J show a fourth embodiment of a process for manufacturing a -LED with a holding structure according to some aspects of the presented concept;

(36) FIGS. 26A and 26B represent two additional steps that can be used in the various embodiment;

(37) FIGS. 27A to 27D show the schematic sequence of a mass transfer printing process for a large number of -LEDs on a wafer;

(38) FIG. 28 shows a support structure according to the proposed principle in a top view with 3 mounting elements;

(39) FIGS. 29A to 29E show a total of four vertical sectional views through a carrier structure for holding flat -LEDs suitable for the proposed transfer;

(40) FIG. 30 shows a layout of a carrier structure according to some aspects of the proposed concept with flat -LEDs and a variety of mounting elements in different arrangements;

(41) FIG. 31 shows another layout of a support structure, prepared and suitable for the proposed transfer process;

(42) FIG. 32A shows another embodiment of a support structure;

(43) FIG. 32B is an alternative to the previous embodiment;

(44) FIGS. 33A to 33D are illustrations of a process and a device for picking up and placing -LEDs or optoelectronic semiconductor chips to explain various aspects of the concept presented;

(45) FIG. 34 shows a representation of another device for picking up and placing -LEDs or optoelectronic semiconductor chips;

(46) FIGS. 35A and 35B show illustrations of an embodiment of a process for picking up and placing -LEDs or optoelectronic semiconductor chips using a cylindrical pick-up tool;

(47) FIG. 36 illustrates an illustration of a pick-up tool with elevations for picking up -LEDs or optoelectronic semiconductor chips;

(48) FIG. 37 shows a version of a pick-up tool that is suitable for selective irradiation of -LEDs or optoelectronic semiconductor chips;

(49) FIG. 38 illustrates a representation of a pick-up tool with a flat surface for picking up -LEDs or optoelectronic semiconductor chips;

(50) FIGS. 39A through 39C show illustrations of a method for depositing -LEDs; and

(51) FIGS. 40A to 40C are different representations of some of the ways in which an electric field is generated by the pick-up tool;

(52) FIGS. 41A and 41B show illustrations showing transfer steps of a conventional method and the proposed method;

(53) FIG. 42 is a first embodiment of a start structure for a procedure according to some suggested aspects in a top view;

(54) FIG. 43 shows the first embodiment according to FIG. 42 of the start structure for the procedure in an enlarged view;

(55) FIG. 44 shows a further illustration for a manufacture of a first start structure according to some of the proposed aspects;

(56) FIG. 45 is an embodiment of the inventive step with some aspects of the proposed principle;

(57) FIG. 46 shows the first embodiment of the start structure for a procedure in a cross-section;

(58) FIGS. 47A to 47E show a further embodiment of an invention-related procedure using a first start structure;

(59) FIG. 48 is a first illustration of the mode of action of anchor elements and release elements according to some aspects presented;

(60) FIG. 49 is a second illustration of how anchor elements and release elements work;

(61) FIG. 50 shows a second embodiment of a starting structure for a transfer procedure according to some suggested aspects;

(62) FIGS. 51A to 51E show another embodiment of a proposed procedure using the second start structure;

(63) FIG. 52A is a first illustration of the selectivity of release elements according to some aspects of the proposed concept for a transfer;

(64) FIG. 52B shows a second illustration of the selectivity of release elements;

(65) FIGS. 53A to 53F show examples of the use of anchor elements and release elements between microchips and module areas;

(66) FIG. 54 shows an illustration of an embodiment of a proposed base module for the provision of light emitting diode modules according to some aspects of the proposed concept;

(67) FIG. 55 shows the embodiment according to FIG. 54 on a replacement carrier according to further aspects;

(68) FIG. 56 illustrates the embodiment according to FIG. 55 with a further basic module;

(69) FIG. 57 shows the embodiment according to FIG. 56 with separate contacting of the contacts;

(70) FIG. 58 illustrates the embodiment according to FIG. 57 with common contacting of the first contacts;

(71) FIG. 59 shows a further illustration of an embodiment of a proposed base module to provide a two row and two column light emitting diode module according to some aspects of the concept presented;

(72) FIGS. 60A to 60D show four cross sections of two oppositely oriented base modules of two adjacent rows;

(73) FIG. 61 shows a further illustration of an embodiment of a proposed base module to provide a two row and three column light emitting diode module;

(74) FIG. 62A to 62D illustrate four cross sections of two oppositely oriented base modules of two adjacent rows;

(75) FIG. 63 shows a top view of a matrix containing basic modules with groupings to explain further aspects;

(76) FIG. 64 illustrates a top view of a matrix with basic modules and further groupings;

(77) FIG. 65 shows a top view of a matrix with basic modules and another possible grouping;

(78) FIG. 66 is a top view of a matrix with basic modules and another possible grouping;

(79) FIG. 67A illustrates a cross-sectional view of another embodiment of a -LED module with an additional photonic structure;

(80) FIG. 67B shows an example of how the proposed -LED module can be lifted off by a transfer stamp described in this application;

(81) FIG. 68 shows several steps of an embodiment of a proposed process for manufacturing -LED modules;

(82) FIG. 69 illustrates a schematic representation of another method for the production of -LED modules according to some aspects of the proposed principle;

(83) FIG. 70A are illustrations of some steps of the method presented in FIG. 69;

(84) FIG. 70B shows an illustration of further steps of the method presented in FIG. 69 for an explanation of various aspects;

(85) FIG. 70C shows a representation of an arrangement of a large number of full-surface target matrices;

(86) FIG. 70D illustrates schematically various contact surfaces that are suitable for contacting the proposed -LED modules;

(87) FIG. 70E shows a section of a display with contact areas and some -LED modules;

(88) FIG. 71 shows an embodiment for a double transfer process with proposed -LED modules;

(89) FIG. 72 shows a first embodiment of a -LED module for vertical and horizontal mounting with some aspects according to the proposed principle;

(90) FIG. 73 shows the bottom of the first embodiment;

(91) FIG. 74 shows a sectional view of the first embodiment along the X-X axis in FIG. 73;

(92) FIG. 75 shows another embodiment of a -LED module for vertical and horizontal mounting with some aspects according to the proposed principle;

(93) FIG. 76 shows a schematic side view of FIG. 75;

(94) FIGS. 77A to 77C show various embodiments in which a module is placed on a carrier and electrically contacted;

(95) FIGS. 78A and 78B show a second embodiment with some aspects according to the proposed principle;

(96) FIGS. 79A and 79B shows a third embodiment with some aspects according to the proposed principle;

(97) FIG. 80 shows an embodiment with different process steps;

(98) FIG. 81 shows a first embodiment of a contacting in perspective;

(99) FIGS. 82A and 82B shows two top views with a schematic wiring diagram for a module based on the proposed principle;

(100) FIG. 83 shows a view of a bottom side of the above embodiments;

(101) FIG. 84 shows an example of a structured membrane wafer during the manufacturing process of a module according to the proposed principle;

(102) FIG. 85A is a top view of the contacts of a substrate in an unpopulated state provided for a pixel according to an aspect of the proposed concept;

(103) FIG. 85B shows a top view of the contacts of the substrate of FIG. 85A provided for the pixel after an initial assembly of -LEDs;

(104) FIG. 85C shows a top view of the contacts of the substrate of FIG. 85A provided for the pixel after a second assembly of -LEDs;

(105) FIG. 86A illustrates a top view of the contacts of another substrate in an unpopulated state, provided for one pixel;

(106) FIG. 86B is a top view of the contacts of the substrate of FIG. 86A provided for the pixel after an initial placement;

(107) FIG. 86C shows a top view of the contacts of the substrate of FIG. 86A provided for the pixel after a second placement;

(108) FIG. 87A shows a top view of the contacts provided for one pixel of yet another substrate in an unpopulated state to illustrate further aspects of the proposed concept;

(109) FIG. 87B shows a top view of the contacts of the substrate of FIG. 82A provided for the pixel after an initial placement; and

(110) FIG. 87C is a top view of the contacts of the substrate of FIG. 82A provided for the pixel after a second placement.

DETAILED DESCRIPTION

(111) Augmented reality is usually generated by a dedicated display whose image is superimposed on reality. Such device can be positioned directly in the user's line of sight, i.e. directly in front of it. Alternatively, optical beam guidance elements can be used to guide the light from a display to the user's eye. In both cases, the display may be implemented and be part of the glasses or other visually enhancing devices worn by the user. Googles Glasses is an example of such a visually augmenting device that allows the user to overlay certain information about real world objects. For the Google glasses, the information was displayed on a small screen placed in front of one of the lenses. In this respect, the appearance of such an additional device is a key characteristic of eyeglasses, combining technical functionality with a design aspect when wearing glasses. In the meantime, users require glasses without such bulky or easily damaged devices to provide advanced reality functionality. One idea, therefore, is that the glasses themselves become a display or at least a screen on or into which the information is projected.

(112) In such cases, the field of vision for the user is limited to the dimension of the glasses. Accordingly, the area onto which extended reality functionality can be projected is approximately the size of a pair of spectacles. Here, the same, but also different information can be projected on, into or onto the two lenses of a pair of spectacles.

(113) In addition, the image that the user experiences when wearing glasses with augmented reality functionality should have a resolution that creates a seamless impression to the user, so that the user does not perceive the augmented reality as a pixelated object or as a low-resolution element. Straight bevelled edges, arrows or similar elements show a staircase shape that is disturbing for the user at low resolutions.

(114) In order to achieve the desired impression, two display parameters are considered important, which have an influence on the visual impression for a given or known human sight. One is the pixel size itself, i.e. the geometric shape and dimension of a single pixel or the area of 3 subpixels representing the pixel. The second parameter is the pixel pitch, i.e. the distance between two adjacent pixels or, if necessary, subpixels. Sometimes the pixel pitch is also called pixel gap. A larger pixel pitch can be detected by a user and is perceived as a gap between the pixels and in some cases causes the so-called fly screen effect. The gap should therefore not exceed a certain limit.

(115) The maximum angular resolution of the human eye is typically between 0.02 and 0.03 angular degrees, which roughly corresponds to 1.2 to 1.8 arc minutes per line pair. This results in a pixel gap of 0.6-0.9 arc minutes. Some current mobile phone displays have about 400 pixels/inch, resulting in a viewing angle of approximately 2.9 at a distance of 25 cm from a user's eye or approximately 70 pixels/ viewing angle and cm. The distance between two pixels in such displays is therefore in the range of the maximum angular resolution. Furthermore, the pixel size itself is about 56 m.

(116) FIG. 1A illustrates the pixel pitch, i.e. the distance between two adjacent pixels as a function of the field of view in angular degrees. In this respect, the field of view is the extension of the observable world seen at a given moment. This is because human vision is defined as the number of degrees of the angle of view during stable fixation of the eye.

(117) In particular, humans have a forward horizontal arc of their field of vision for both eyes of slightly more than 210, while the vertical arc of their field of vision for humans is around 135. However, the range of visual abilities is not uniform across the field of vision and can vary from person to person. The binocular vision of humans covers approximately 114 horizontally (peripheral vision), and about 90 vertically. The remaining degrees on both sides have no binocular area but can be considered part of the field of vision.

(118) Furthermore, color vision and the ability to perceive shapes and movement can further limit the horizontal and vertical field of vision. The rods and cones responsible for color vision are not evenly distributed.

(119) This point of view is shown in more detail in FIGS. 1B to 1D. In the area of central vision, i.e. directly in front of the eye, as required for Augmented Reality applications and partly also in the automotive sector, the sensitivity of the eye is very high both in terms of spatial resolution and in terms of color perception.

(120) FIG. 1B shows the spatial density of rods and cones per mm.sup.2 as a function of the fovea angle. FIG. 1C describes the color sensitivity of cones and rods as a function of wavelength. In the central area of the fovea, the increased density of cones (L, S and M) means that better color vision predominates. At a distance of about 25 around the fovea, the sensitivity begins to decrease and the density of the visual cells decreases. Towards the edge, the sensitivity of color vision decreases, but at the same time contrast vision by means of the rods remains over a larger angular range. Overall, the eye develops a radially symmetrical visual pattern rather than a Cartesian visual pattern. A high resolution for all primary colors is therefore required, especially in the center. At the edge it may be sufficient to work with an emitter adapted to the spectral sensitivity of the rods (max. sensitivity at 498 nm, see FIG. 1D and the sensitivity of the eye).

(121) FIG. 1C shows the different perceptual capacity of the human eye by means of a graph of the angular resolution A relative to the angular deviation a from the optical axis of the eye. It can be seen that the highest angular resolution A is in an interval of the angular deviation a of +/2.5, in which the fovea centralis 7 with a diameter of 1.5 mm is located on the retina 19. In addition, the position of the blind spot 22 on the retina 19 is sketched, which is located in the area of the optic nerve papilla 23, which has a position with an angular deviation a of about 15.

(122) The eye compensates this non-constant density and also the so-called blind spot by small movements of the eye. Such changes in the direction of vision or focus can be counteracted by suitable optics and tracking of the eye.

(123) Furthermore, even with glasses, the field of vision is further restricted and, for example, can be approximately in the range of 80 for each lens.

(124) The pixel pitch in FIG. 1A on the Y-axis is given in m and defines the distance between two adjacent pixels. The various curves C1 to C7 define the diagonal dimension of a corresponding display from 5 mm to approximately 35 mm. For example, curve C1 corresponds to a display with the diagonal size of 5 mm, i.e. a side length of approximately 2.25 mm. For a field of view of approximately 80, the pixel pitch of a display with a diagonal size of 5 mm is in the range of 1 m. For larger displays like curve C7 and 35 mm diagonal size, the same field of view can be implemented with a pixel pitch of approximately 5 m.

(125) Nevertheless, the curves in FIG. 1A illustrate that for larger fields of view, which are preferred for extended reality applications, very high pixel densities with small pixel pitch are required if the well-known fly screen effect is to be avoided. One can now calculate the size of the pixel for a given number of pixels, a given field of view and a given diagonal size of a -display.

(126) Equation 1 shows the relationship between dimension D of a pixel, pixel pitch pp, number N of pixels and the edge length d of the display. The distance r between two adjacent pixels calculated from their respective centers is given by

(127) $\begin{array}{cc}r=d/2+\mathrm{pp}+d/2.D=d/N-\mathrm{pp}N=d/\left(D+\mathrm{pp}\right)& \left(1\right)\end{array}$

(128) Assuming that the display (e.g. glasses) is at a distance of 2.54 cm (1 inch) from the eye, the distance r between two adjacent pixels for an angular resolution of 1 arcminute as roughly estimated above is given by

(129) $r=\tan \left(1/60\right)*30\mathrm{mm}$$r=8.7\mathrm{.Math.m}$

(130) The size of a pixel is therefore smaller than 10 m, especially if some space is required between two different pixels. With a distance, r between two pixels and a display with the size of 15 mm10 mm, 17201150 pixels can be arranged on the surface.

(131) FIG. 2B shows an arrangement, which has a carrier 21 on which a large number of pixels, 20 and 20a to 20c are arranged. Pixels 20 arranged side by side have the pixel pitch pp, while pixels 20a to 20c are placed on carrier 21 with a larger pixel pitch pp. The distance between two pixels is given by the sum of the pixel pitch and half the size for each adjacent pixel. Each of the pixels 20 is configured so that its illumination characteristic or its emission vector 22 is substantially perpendicular to the emission surface of the corresponding LED.

(132) The angle between the perpendicular axes to the emission surface of the LED and the beam vector is defined as the collimation angle. In the example of emission vector 22, the collimation angle of LEDs 20 is approximately zero. LED 20 emits light that is collinear and does not widen significantly.

(133) In contrast, the collimation angle of the emission vector 23 of the LED pixels 20a to 20c is quite large and in the range of approximately 45. As a result, part of the light emitted by LED 20a overlaps with the emission of an adjacent LED 20b.

(134) The emission of the LEDs 20a to 20c is partially overlapping, so that its superposition of the corresponding light emission occurs. In case the LEDs emit light of different colors, the result will be a color mixture or a combined color. A similar effect occurs between areas of high contrast, i.e. when LED 20a is dark while LED 20b emits a certain light. Because of the overlap, the contrast is reduced and information about each individual position corresponding to a pixel position is reduced.

(135) In displays where the distance to the user's eye is only small, as in the applications mentioned above, a larger collimation angle is rather annoying due to the effects mentioned above and other disadvantages. A user is able to see a wide collimation angle and may perceive displayed objects in slightly different colors blurred or with reduced contrast.

(136) FIG. 2A illustrates in this respect the requirement for the collimation angle in degrees against the field of view in degrees, independent of specific display sizes. For smaller display sizes such as the one in curve C1 (approx. 5 mm diagonal), the collimation angle increases significantly depending on the field of view.

(137) As the size of the display increases, the collimation angle requirements change drastically, so that even for large display geometries such as those illustrated in curve C7, the collimation angle reaches about 10 for a field of view of 100. In other words, the collimation angle requirements for larger displays and larger fields of view are increasing. In such displays, light emitted by a pixel must be highly collimated to avoid or reduce the effects mentioned above. Consequently, strong collimation is required when displays with a large field of view are to be made available to a user, even if the display geometry is relatively large.

(138) As a result of the above diagrams and equations, one can deduce that the requirements regarding pixel pitch and collimation angle become increasingly challenging as the display geometry and field of view grow. As already indicated by equation 1, the dimension of the display increases strongly with a larger number of pixels. Conversely, a large number of pixels is required for large fields of view if sufficient resolution is to be achieved and fly screens or other disturbing effects are to be avoided.

(139) FIG. 3A shows a diagram of the number of pixels required to achieve an angular resolution of 1.3 arc minutes. For a field of view of approximately 80, the number of pixels exceeds 5 million. It is easy to estimate that the size of the pixels for a QHD resolution is well below 10 m, even if the display is 15 mm10 mm. In summary, advanced reality displays with resolutions in the HD range, i.e. 1080p, require a total of 2.0736 million pixels. This allows a field of view of approximately 50 to be covered. Such a quantity of pixels arranged on a display size of 1010 mm with a distance between the pixels of 1 m results in a pixel size of about 4 m.

(140) In contrast, the table in FIGS. 3B-1 and 3B-2 shows several application areas in which -LED arrays can be used. The table shows applications (use case) of -LED arrays in vehicles (Auto) or for multimedia (MM), such as automotive displays and exemplary values regarding the minimum and maximum display size (min. and max. size X Y [cm]), the pixel density (PPI) and the pixel pitch (PP [m]) as well as the resolution (Res.-Type) and the distance of the viewer (Viewing Distance [cm]) to the lighting device or display. In this context, the abbreviations very low res, low res, mid res and high res have the following meaning:

(141) TABLE-US-00001 very low res pixel pitch approx. 0.8-3 mm low res Pixel pitch approx. 0.5-0.8 mm mid res Pixel pitch approx. 0.1-0.5 mm high res Pixel pitch less than 0.1 mm

(142) The upper part of the table, entitled Direct Emitter Displays, shows inventive applications of -LED arrays in displays and lighting devices in vehicles and for the multimedia sector. The lower part of the table, titled Transparent Direct Emitter Displays, names various applications of -LED arrays in transparent displays and transparent lighting devices. Some of the applications of -displays listed in the table are explained in more detail below in the form of embodiments.

(143) The above considerations make it clear that challenges are considerable in terms of resolution, collimation and field of view suitable for extended reality applications. Accordingly, very high demands are placed on the technical implementation of such displays.

(144) Conventional techniques are configured for the production of displays that have LEDs with edge lengths in the range of 100 m or even more. However, they cannot be automatically scaled to the sizes of 70 m and below required here. Pixel sizes of a few m as well as distances of a few m or even less come closer to the order of magnitude of the wavelength of the generated light and make novel technologies in processing necessary.

(145) In addition, new challenges in light collimation and light direction are emerging. Optical lenses, for example, which can be easily structured for larger LEDs and can also be calculated using classical optics, cannot be reduced to such a small size without the Maxwell equations. Apart from this, the production of such small lenses is hardly possible without large errors or deviations. In some variants, quantum effects can influence the behaviour of pixels of the above-mentioned size and have to be considered. Tolerances in manufacturing or transfer techniques from pixels to sub mounts or matrix structures are becoming increasingly demanding. Likewise, the pixels must be contacted and individually controllable. Conventional circuits have a space requirement, which in some cases exceeds the pixel area, resulting in an arrangement and space problem.

(146) Accordingly, new concepts for the control and accessibility of pixels of this size can be quite different from conventional technologies. Finally, a focus is on the power consumption of such displays and controllers. Especially for mobile applications, a low power consumption is desirable.

(147) In summary, for many concepts that work for larger pixel sizes, extensive changes must be made before a reduction can be successful. While concepts that can be easily up scaled to LEDs at 2000 m for the production of LEDs in the 200 m range, downscaling to 20 m is much more difficult. Many documents and literature that disclose such concepts have not taken into account the various effects and increased demands on the very small dimensions and are therefore not directly suitable or limited to pixel sizes well above 70 m.

(148) In the following, various aspects of the structure and design of -LED semiconductors, aspects of processing, light extraction and light guidance, display and control are presented. These are suitable and designed to realize displays with pixel sizes in the range of 70 m and below. Some concepts are specifically designed for the production, light extraction and control of -LEDs with an edge length of less than 20 m and especially less than 10 m. It goes without saying, and is even desired, that the concepts presented here can and should be combined with each other for the different aspects. This concerns for example a concept for the production of a -LED with a concept for light extraction. In concrete terms, a -LED implemented by means of methods to avoid defects at edges or methods for current conduction or current constriction can be provided with light extraction structures based on photonic crystal structures. Likewise, a special drive can also be realized for displays whose pixel size is variable. Light guidance with piezoelectric mirrors can be realized for -LEDs displays based on the slot antenna aspect or on conventional monolithic pixel matrices.

(149) In some of the following embodiments and described aspects, additional examples of a combination of the different embodiments or individual aspects thereof are suggested. These are intended to illustrate that the various aspects, embodiments or parts thereof can be combined with each other by the skilled person. Some applications require specially adapted concepts; in other applications, the requirements for the technology are somewhat lower. Automotive applications and displays, for example, may have a longer pixel edge length due to the generally somewhat greater distance to a user. Especially there, besides applications of extended reality, classical pixel applications or virtual reality applications exist. This is in the context of this disclosure for the realization of -LED displays, whose pixel edge length is in the range of 70 m and below, also explicitly desired.

(150) A general illustration of the main components of a pixel in a -display is shown schematically in FIG. 4A. It shows an element 60 as a light generating and light emitting device. Various aspects of this are described in more detail below in the section on light generation and processing. Element 60 also includes basic circuits, interconnects, and such to control the illumination, intensity, and, when applicable, color of the pixel. Aspects of this are described in more detail in the section on light control. Apart from light generation, the emitted light must be collimated. For this purpose, many pixels in microdisplays have such collimation functionality in element 60. The parallel light in element 63 is then fed for light guidance into some optics 64, for further shaping and the like. Light collimation and optics suitable for implementing pixels for microdisplays are described in the section on light extraction and light guidance.

(151) The pixel device of FIG. 4A illustrates the different components and aspects as separate elements. An expert will recognize that many components can be integrated into a single device. In practice, the height of a -display is also limited, resulting in a desired flat arrangement.

(152) The following section concern various aspects of processing a -LED, which can be used to improve the electrical or optical properties or to create new fields of application or realization possibilities. It goes without saying that -LEDs come in different forms, structures and features. Some of those aspects are disclosed in the previous mentioned PCT-application, the disclosure of which is incorporated herein. The -LED are in some aspects implemented in a monolitical way, in other aspects a -LED or a few -LED form a pixel which are subsequently processed individually. As outlined herein, the various aspects of processing aim to improve the characteristics of the semiconductor structure or simplify the transfer.

(153) For illustrating the aspect of pixel elements with electrically separated and optically coupled subpixels a simplified schematic diagram of an electronic display 10 is shown in FIG. 5, as it is often used in, for example, monitors, televisions, scoreboards or even small devices such as smart watches or smart phones. As is generally known, the basic structure is realized by a closely adjacent arrangement of a large number of pixels or pixel elements 12 in one plane. The pixel elements 12 are organized in rows and columns and can be controlled electronically individually. They are controlled in such a way that they can be varied in their luminosity as well as in their color tone and emitted wavelength. In the latter case, each pixel often comprises three sub-pixels, which in turn are designed to emit different wavelengths. The pixel elements 12 are often mounted on a substrate or carrier structure 14, which in this aspect are primarily intended to ensure mechanical stability of the arrangement.

(154) This illustration shows clearly that in order to generate a sufficiently high resolution, several million of such pixel elements 12 must be spatially densely arranged both mechanically and electrically. At the same time, in many cases defective pixels 12 can be detected as dark dots between the active pixels. Especially due to extremely small dimensions, e.g. for -LEDs, the density and resolution of such displays increases on the one hand, while on the other hand there is a need for fault-free operation and production with as few rejects as possible.

(155) In FIG. 6, the section AA shown in FIG. 5 is enlarged in order to be able to describe the features of the solution in more detail. For example, substrate 14 is shown to simultaneously contain the control elements and serve as a support structure for the pixels. On substrate 14, individual pixel elements 12 are provided, which here are rectangular and of the same size. These identical sizes of the pixel elements 12 are often advantageous for manufacturing reasons, but can also be designed in different shapes or sizes according to an example. The pixel element 12 in the example shown here has a length 11 and a width b1. A pixel element separation layer 16 is provided between the pixel elements 12. The latter is in the range of a few m, for example 0.5 m to 3 m.

(156) The pixel element separation layer 16 is configured in such a way that the adjacent pixel elements 12 are electrically separated with respect to the control of the respective pixel elements. FIG. 7 shows a section of a pixel element in cross-sectional view. The pixel elements 12 are separated by a pixel element separation layer 16 and each comprises sub-pixels 18. The pixel element separation layer 16 provides electrical and optical separation between the pixel elements 12. This is intended to prevent light emitted by a pixel element 12 from passing through optical crosstalk into an adjacent pixel element 12 and being emitted from there.

(157) Within a pixel element 12, a further subdivision into subpixels 18 is shown here, as an example of a selected pixel element 12. The subpixels 18, also known as fields, have the same size and shape here. A length 12 of a subpixel 18 is defined, whereby, according to an example, the length 11 of the pixel element 12 can result from a multiple of the length 12 of the subpixels 12 of the same size including any gaps. Similarly, a width b2 of a subpixel is specified, where, according to an example, the width b1 of the pixel element can also result from an approximate multiple of the width b2 of the respective equally sized subpixels 18 including any gaps. The representation selected here shows the subdivision of pixel element 12 into subpixels 18 or so-called fields for only one pixel element 12. However, the structuring is applicable to all pixel elements 12 arranged in a display 10.

(158) Between two adjacent subpixels 18 of the same pixel element 12 a subpixel separator element 20 is also provided. This subpixel separating element 20 is configured in such a way that electrical separation takes place with respect to the control of an assigned subpixel (of length 12) (see FIG. 7). The subpixel separating element 20 is further configured in such a way that optical coupling or optical crosstalk is possible with respect to the light emitted by the subpixels 18. In other words, this means that within a pixel element 12 photons or light can cross talk from a subpixel 18 to one or more of the subpixels 18 located in the same pixel element 12, but not between two pixel elements 12.

(159) For example, the various possible emittable colors of a pixel element 12 can be generated by combining the basic colors red, green and blue. Consequently, a pixel element 12 can contain subpixels 18, which can emit different wavelengths of light. In FIG. 6, for example, the total of nine subpixels 18 are marked with the letters A to K. According to one example, the subpixels A, D, and G are red LEDs, the subpixels B, E, and H are green LEDs, and the subpixels C, F, and K are blue LEDs. If, for example, red light is to be emitted by pixel element 12, the subpixels A, D and G are controlled simultaneously via the control electronics. If necessary, the control electronics can be used to test whether all subpixels A, D and G are functioning correctly. By this means, a desired brightness can be adjusted.

(160) If, for example, one of the subpixels A, D or G is defective, the remaining pixels can still be controlled correctly due to the electrical separation. However, the optical crosstalk made possible by the subpixel separation element 20 allows the missing light of the defective subpixel 18 to be compensated by the adjacent subpixel 18. Thus, as long as a subpixel 18 of the same color from a group works and the remaining subpixels 18 of this group are defective, this remaining working subpixel 18 could compensate for the malfunctions of the defective subpixels and thus ensure a function of the pixel element 12 by redundancy. In an example, an optical crosstalk can also take place over several subpixels within a pixel element 12. Other possible arrangements would be, for example, the assignment of three subpixels 18 each to one of the basic colors red, green, or blue. Examples are the following grouping A/B/C, D/E/F and G/H/K. But also a diagonal assignment is conceivable, whereby an optical crosstalk should be advantageously possible.

(161) FIG. 7 shows a sectional view through a section of a display 10. In the lower part of the figure a substrate 14 is shown, which among other things should provide a mechanically sufficiently stable support structure to accommodate the remaining structural elements. According to one example, this can be a wafer of a silicon IC. The substrate 14 can also comprise a driver circuit or drive electronics (not shown) and various electrical connections. These can, for example, be realized via conductor structures in the integrated circuit. Furthermore, contact structures 24 are provided, which can be used to drive a subpixel area 26. In the example shown here, this is arranged directly adjacent to contact structures 24. Via contact structures 24 it is possible to control an emitter chip 26 individually and selectively via the control electronics.

(162) An epitaxial layer 26, for example, comprises different layers, which among other things allows the functionality of light-emitting diodes. For example, a p-n junction can be implemented by correspondingly differently doped layers or can also have one or more quantum well structures. Schematically and for simplicity, a region of a p-n junction 28 is indicated here by a dotted line. In the epitaxial layer 26, the structures of the pixel elements 12 and the subpixels 18 are introduced.

(163) In detail, the individual pixel elements 12 can be identified via pixel element separation layers 16. These each have a length 11, which corresponds to a distance between two pixel element separation layers 16. Within the pixel elements 12, three subpixels 18 can be separated in the longitudinal direction. These each have a length 12. Subpixel separation elements 20 are arranged between the individual subpixels 18.

(164) In the example shown here, the pixel element separation layers 16 and the subpixel separation elements 20 are each designed as a trench or similar structure. This means that the pixel element separation layers 16 and the subpixel separation element 20 are each incorporated into the epitaxial layer 26 as a trench-like, slit-like or similar structure, for example by etching processes. An electrically insulating material such as SiO.sub.2 is then deposited in the trenches. In order to determine the electrical and optical properties of these trenches, a trench depth d1 of the pixel element separation layer 16 is chosen to be larger than a trench depth d2 of the subpixel separation element 20. Thus, it can be achieved that an optical crosstalk between subpixels 18 is possible due to the smaller depth d2 of the trench of the subpixel separation element 20.

(165) In contrast, between two pixel elements 12, both optical crosstalk 30 and electrical crosstalk is prevented by the deeper trench d1 of the pixel element separation layer 16. According to one example, a depth d2 of the trench of the subpixel separation element 20 is chosen such that it passes through an area of a p-n junction 28. This can be advantageously used to prevent electrical interaction between two adjacent subpixels 18 or the associated emitter chips 22 and/or electrical or electromagnetic crosstalk.

(166) In the example above, the pixel element separation layer 16 runs through the active layer to the edge of the opposite radiation surface, but does not cut through it. This allows the area close to the surface to be formed as a common contact connecting all pixels and sub-pixels with a potential connection. In addition, the pixel element separation layer 16 can include a mirror layer so that light generated by the pixel is optically redirected. In the example of FIG. 7, it is also shown that the subpixel separation element 20 passes through the active layer but ends shortly after. This prevents electrical crosstalk, but not optical crosstalk. Depending on the design and manufacturing parameters, the subpixel separator element 20 can also reach only to the active layer or slightly into it.

(167) While in this embodiment the pixel element separation layer 16 and the subpixel separation elements 20 are designed as trenches with substantially vertical sidewalls, the invention is not limited to this. It is also possible to choose deliberately other shapes, which also have additional functionality such as light collimation or light guidance. As an example, sloping sidewalls for pixel element separation layer 16 can be mentioned.

(168) In FIG. 8, an extension of the embodiment in the previous figure is shown. The pixel elements are implemented monolithically in or on a thin film substrate. Contacts 26 are arranged on the backside, i.e. the side facing away from the main radiation direction. These are located directly below the individual sub-pixels and are formed with a conductive metal, for example a gold or silver alloy. The size of the contacts essentially corresponds to the area of the individual subpixels. In this way, a suitable material system can be used to produce the pixels. In addition, process parameters such as temperature, precursors and others can be adjusted to the pixels to be produced.

(169) Contacts 39 of a backplane or other substrate carrier are arranged opposite the contacts 26 of the subpixels. The backplane is configured with a different material system, e.g. silicon technology. The backplane contains the control for the individual subpixels as well as their power supply. Examples of current driver and drive concepts for -LEDs are disclosed in this application. In this version, the backplane includes additional fuses 42 for each individual subpixel. The fuses are in turn connected to current driver 40. If a defect occurs in one of the subpixels during production or a defect occurs during the positioning of the pixels on the backplane, the defective subpixels can be separated by means of the fuses.

(170) The backplane is positioned with its contacts and then connected to the contacts of the pixels. Depending on the application, an auxiliary carrier (not shown here) can be provided to ensure sufficient stability for the pixel elements. For contacting, for example, the two surfaces can be glued together, provided that a conductive connection between the contacts is guaranteed.

(171) On the other side of the pixel elements, a cover electrode is provided on the one hand, which creates an electrical contact to each subpixel. The cover electrode is led down one or more sides to a contact area. The cover electrode is transparent and consists for example of ITO. Along and above the pixel separators 14 additional metallic lines can be provided on the cover electrode. This reduces the surface resistance of the cover electrode and thus improves the current carrying capacity. The additional lines at this point do not have a negative effect on light extraction and shadows do not significantly affect the structure.

(172) A light-shaping structure is arranged next to the cover electrode. This can either be arranged on the cover electrode or extend through the cover electrode and into the semiconductor material of the pixel, in some cases down to active region 28. The light-shaping structure comprises regions with different refractive indices. Various examples of such a structure are disclosed in this application.

(173) FIG. 9 shows an example. On the one hand, a converter material is incorporated into the light-shaping structure. In particular, the left side or the left pixel has a light-shaping structure 32r with converting properties. This structure converts blue light from each controlled subpixel below the structure 32r into red light. Accordingly, structure 32b converts the light emitted by the subpixels into green light.

(174) At the same time, the light thus converted is directed through the respective structures 32r and 32b in such a way that the converted light is emitted directly upwards. In contrast, unconverted light is deflected in direction so that an exit of unconverted light directly upwards or parallel to the direction of emission of the converted light is suppressed. A directional selection can be achieved by photonic structures presented here. The directional deflection also extends the path through the converter material, so that the conversion efficiency increases. The unconverted light is deflected towards structure 32b, which collimates light from blue subpixels.

(175) FIG. 10 shows another viewpoint that is suitable for creating the optical separation elements. In addition, this embodiment improves the relationship between radiative and non-radiative recombination. The embodiment makes use of quantum well intermixing to create the subpixels within a pixel. FIG. 10 shows a structure on a non-displayed substrate carrier on which semiconductor layer 26 has been grown. The substrate carrier 26 is removed at a later time after transfer to a backplane or an auxiliary carrier. After production of the individual semiconductor layers with an active region 28 between them, a photomask 50 is applied and patterned so that the surface on the semiconductor material is exposed, in which the optical and electrical separation elements 16 are manufactured. In a subsequent step, trenches 16 for electrical and optical separation are etched and filled with an insulating or dielectric material. Then the photomask 50 is appropriately structured again so that on the one hand the areas on the surface are exposed in which the electrical separation elements 20 are manufactured. In addition, a small additional area around the electrical and optical separating elements is freed from photoresist.

(176) In a following step, Zn or another dopant is applied and diffused. These steps can be carried out using, among others, the methods disclosed in this application. The resulting quantum well intermixing increases the band gap in these areas so that charge carriers see an additional energy barrier. This results in a certain electrical separation between the individual subpixels. Quantum well intermixing around the optical and electrical separation elements 16 creates a barrier that keeps charge carriers away from potential recombination centers and defects created by the etching process. The photoresist is then removed and the wafer is further processed.

(177) FIG. 11 shows a method 100 according to the invention for calibrating a pixel element 12. In a first step 110, a subpixel 18 of a pixel element 12 is driven as described above and below. This control of the subpixel 18 should allow a test of the function of the respective subpixel 18. This can be done, for example, by control signals from an electronic control unit, which in turn can be made possible by contacting each individual subpixel 18 separately. In a following step 120, defect information of a subpixel 18 is recorded, in other words, information is generated as to whether the subpixel 18 in question is functioning correctly.

(178) Such defect information can be, for example, a flag or a certain value that contains information about a correct function of subpixel 18. This defect information can be stored according to a following step 130, for example in a memory unit of a control electronics. This can be used to compensate defective subpixels by appropriately adapted control signals of the associated subpixels of the same wavelength and thus to achieve a correct function of the entire pixel element 12.

(179) In an example, the subpixel separation element 20 may be designed to allow optical crosstalk between subpixels 18 of the same color or wavelength, where the subpixel separation element 20 is designed to optically separate between subpixels 18 of different color or wavelength.

(180) An extension of pixelated or other emitters in which optical and electrical crosstalk between pixels of an array is prevented by a pixel structure with a material bridge is shown in FIG. 12. It illustrates a section of an array A in a cross-section in which two adjacent optoelectronic pixels P are connected by a material bridge.

(181) Array A features two optoelectronic pixels P in the form of vertical -LEDs, which have been manufactured over the entire surface. Each pixel P comprises an n-doped layer 1, a p-doped layer 3 as well as an active zone 5 suitable for light emission. Between the two formed pixels P material of the layer sequence was removed from the n-doped side and from the p-doped side.

(182) Only a thin material transition 9 with a maximum thickness dC remains, which comprises the active layer 5 and a thin cladding layer 7. The cladding layer can be formed from the same material as layers 3 and 5. The material transition is much longer than it is thick. The thickness dC is selected so that no electromagnetic wave can propagate in the material transition. Optical modes are thus suppressed. In other words, the electrical and/or optical conductivity of the material transition 9 in FIG. 12 is effectively reduced in the horizontal direction.

(183) The two main surfaces of the material transitions 9 and exposed surface areas 11 of the pixels P, which are exposed as a result of the removal of the material of the layer sequence, are electrically insulated and passivated by means of a respective passivation layer 13, which in particular contains silicon dioxide. The areas of the removed material of the layer sequence are also filled with a filler material 15. Finally, the two main surfaces of the pixels P are electrically contacted by means of contact layers 33, whereby these can form end contacts. Contact layers 33 can have transparent material, for example ITO, in such a way that the light generated or received by the pixels P emits through the transparent material.

(184) The active zone 5 comprises one or more quantum wells or other structures. Their band gap is tuned to the desired wavelength of the emitted light. The maximum thickness dC is chosen such that all fundamental modes are prevented from propagating along the active zone 5 of the material transitions 9 to the next pixel P. The maximum thickness dC of an active zone 5 of a material transition 9 for this condition depends on the refractive index difference between the active zone 5 and the cladding layers 7 of the material transition 9 corresponding to a waveguide. In general, this means that the material transition should be as thin as possible. On the one hand, this makes crosstalk of optical modes more difficult, since the wave cannot propagate in the horizontal direction. On the other hand, the low maximum thickness dC makes further electrical crosstalk more difficult. The thin cladding layers 7 of the active zone 5 surrounding the active zone generally show a high surface resistance and can only carry little current. A further reduction also reduces electrical crosstalk here due to the increasing resistance.

(185) The maximum thickness dC also depends on the refractive index and the thickness of the active zone 5. The maximum thickness dC is greater than or equal to the thickness of the active zone 5. The maximum thickness dC also depends on the distance between adjacent pixels P. The greater the distance, the greater the maximum thickness dC can be. A suggested range of the maximum thickness dC is 1 m and 30 nm.

(186) The layers shown in FIG. 12 have thicknesses that depend on the materials used, including the doping materials, the doping profile of the concentration versus depth, the angles of the sidewalls, the pixel size, the pixel spacing and the total array size. A lower limit for the total thickness is about 100 nm.

(187) Suitable material systems for the pixels P are for example In(Ga,Al)As(Sb,P), SiGe, Zn(Mg,Cd)S(Se,Te), Ga(Al)N, HgCdTe. Suitable materials for contact layers 33 are metals such as Au, Ag, Ti, Pt, Pd, Cr, Rh, Al, Ni and the like, alone or as alloys with Zn, Ge, Be. This material can also be used as the filling material 15, which then serves as a bonding material in addition to the filling function. Conductive material also has possible reflective and other properties. Transparent conductive oxides such as ZnO or ITO (InSnO) can also be used as contact layers 33 for bonding and also provide a common contact for either the p-side or the n-side of the array.

(188) Dielectrics such as fluorides, oxides and nitrides of Ti, Ta, Hf, Zr, Nb, Al, Si, Mg can be used as transparent insulators. This material can be used for passivation layers 13. This material can also be used as the filling material 15, which then serves as an electrical insulator in addition to the filling function. Values of the refractive indices of active zone 5 and cladding layers 7 depend entirely on the materials used.

(189) The maximum thickness dC also depends on the refractive index of the dielectric generated by the passivation layer 13 and/or the filler material 15. The smaller the refractive index difference between active zone 5 and dielectric, the greater the maximum thickness dC can be for equal crosstalk.

(190) FIG. 13 shows a second embodiment of a pixel array A in a cross-section. The array A shown here in FIG. 13 differs from the array A shown in FIG. 12 in that a light-absorbing material 17 having a relatively small band gap at least partially fills the areas of the removed material of the layer sequence. Furthermore, the light-absorbing material 17 adjoins directly at the material transitions 9, since no passivation layers 13 are formed at these. Only exposed surface areas 11 of the pixels P are electrically insulated and passivated by means of a respective passivation layer 13. Their material can contain silicon dioxide, for example, so that no electrical short circuit occurs between material 3 and 17.

(191) In FIG. 13not shown therealternatively only onein FIG. 13 upper or lowerside of the material transition 9 between the two pixels P is filled by the light absorbing material 17. On the other side, for example, a filling material 15 is formed at the material transition 9, leaving the passivation layer 13 between them. By using the light-absorbing material 17, additional suppression of optical crosstalk is provided. The light-absorbing material 17 between the pixels P reduces wave guiding by absorbing the light that leaves the active zone 5 in the area of the material transitions 9. There is an attenuation of the waveguide along the material transitions 9.

(192) Suitable light-absorbing materials 17 are metals, alloys, dielectrics or semiconductors with a smaller band gap than the band gap of the material transition 9, which initially acts as a waveguide. This means that the energy of the light is also greater, so that it is absorbed by the material 17. For example, floating eye can be used, which absorbs 50% of red wavelengths. The light-absorbing material 17 is grown at the material transitions 9, for example by CVD (chemical vapour deposition) or PVD (physical vapour deposition) by creating epitaxial layers. The light absorbing material 17 was applied or grown on the cladding layers 7.

(193) FIG. 14A shows a third embodiment of a pixel array A in a cross-section. At the locations of the material removed from the n-doped and/or from the p-doped side of the layer sequence of the pixel array, a material 19 is formed with a refractive index which is larger compared to the removed material, in particular to the doped material or a filler material 15, but which should not be greater than the refractive index of the cladding layers 7 or the active zone 5. This also attenuates the waveguide in the material transition 9. The layer sequence on the substrate 35 is finally covered by a protective top layer 37.

(194) The material 19 with an increased refractive index is grown epitaxially at the material transitions 9, for example by means of chemical or physical vapor deposition. The application or growth takes place after the removal of the original n-doped and/or p-doped layer material between two pixels P each and after passivation of exposed surface areas 11, in particular side areas, of the pixels P by applying passivation layers 13.

(195) The material 19 with increased refractive index was applied or grown on the cladding layers 7. No passivation layers 13 are formed at the material transitions 9. This is the area below the material transition 9. For example, GaAs as material 19 with increased refractive index can be grown on an active zone 5 of a material transition 9, which contains AlGaAs. Alternatively, the material 19 with increased refractive index is formed by diffusing or implanting a refractive index increasing material 21 into a filler material 15 up to or into the cladding layers 7. This is represented in FIG. 14A by the area above the material transition 9. Increased refractive index material 19 may be formed above the material transition 9 and/or below the material transition 9 in FIG. 14A. An area free of material 19 with a higher refractive index can be filled with a filler material 15.

(196) FIG. 14B shows a simulation of the propagation of light in the area of the material transition of the third embodiment of a pixel array according to the proposed principle. It shows the cross section of a material transition 9 where only an upper side has been etched and filled with a material 19 with an increased refractive index. The material 19 with an increased refractive index has a refractive index equivalent to the quantum well material 5, i.e. the active zone 5 and the material 19 with increased refractive index are shown in dark grey in the diagram. The cladding layer 7 or non-etched semiconductor material of an n-doped layer 1 and a filler material 15 are shown in white.

(197) The 0.1 m thick layer is the active zone 5 or the area of the quantum well material. The 0.05 m thick layer is still residual cladding or a remaining cladding layer 7. The 1 m thick layer is the material 19 with the increased refractive index.

(198) In the area of the material transition 9 between two pixels P, an active zone 5 with a refractive index of 3.5 and a layer thickness of 0.1 m is arranged on a lower, unetched n-doped layer 1 having a refractive index of 3. On this first inner layer, a cladding layer 7 with a refractive index of 3 is formed as a second inner layer of the material transition 9 with a layer thickness of 0.05 m. A relatively thick third inner layer of a material 19 with an increased refractive index of 3.5 and a layer thickness of 1 m is formed thereon. The third inner layer is covered by a layer comprising a filler material 15 with a refractive index of, for example, about 3.

(199) For a simulation on this layer structure, a vacuum light wavelength of 0.63 m was assumed. The generated light can be TM- and/or TE-polarized. One speaks of TM-polarized light when the direction of the magnetic field is perpendicular to the plane (plane of incidence) defined by the vector of incidence and the surface normal (TM=transversely magnetic), and of TE-polarized light when the electric field is perpendicular to the plane of incidence (TE=transversely electric). For the simulation, FIG. 14B with the x-axis represents the value of a spatial extension x in m. The y-axis shows the value of a y-component of an electric field strength E. FIG. 14B shows how a fundamental mode TEO emerges from the active zone 5 and is stopped by the other optical barriers present between two pixels P above and/or below the material transition 9 acting as a waveguide. The optical barriers here are the interfaces between the layers of different refractive indices according to the layered structure of FIG. 14A described above. The fundamental mode TEO enters the thick third inner layer of material 19 with increased refractive index and does not reach the adjacent pixel P.

(200) In practice, a material with a higher refractive index is often also a more absorbent material, especially due to a smaller band gap.

(201) FIG. 15 shows a fourth embodiment of a pixel array A in a cross-section. Identical reference signs to the other FIGS. 141 to 140A indicate identical features in FIG. 15. In contrast to a design according to FIG. 12, here between two filler layers 15 and two passivation layers 13, additional material 23, 24 is introduced into the active zone 5 of a material transition 9, which effectively reduces electrical and/or optical conductivities of the material transition 9 acting as waveguide. The additional material is, on the one hand, a material 23, which increases light absorption in the active zone 5 of the material transition 9. Absorption in the active zone 5 between pixels P is increased by reducing the bandgap of the material of the active zone 5. For this purpose, bandgap-reducing elements are implanted or diffused into the active zone 5 of the material transition 9. In particular, dopants are diffused or implanted into the central region of the active zone 5 between pixels P. The reduction of the band gap is achieved by a so-called band gap renormalization. The greater the amount of material 23 introduced along a material transition 9, the greater the absorption of light in the active zone 5.

(202) Alternatively or cumulatively, the additional material is, on the other hand, a material 24, which increases an electrical resistance in the active zone 5 of the material transition 9. For this purpose, elements, which increase the electrical resistance, are implanted or diffused into the active zone 5 of the material transition 9. This further increase in electrical resistance serves to reduce further electrical crosstalk from one pixel P to the adjacent pixel P. For example, to increase the electrical resistance Fe can be implanted in an active zone 5 of a material transition 9 with InGaAsP. The greater the amount of material 24 introduced along a material transition 9, the greater the increase in electrical resistance of the active zone 5 of the material transition 9 between two pixels P.

(203) Materials 23, 24 are both diffused or implanted into the active zone 5 of a respective material transition 9 before the application of passivation layers 13.

(204) FIG. 16A shows a further example of a pixel array A in a cross-section, in which, in contrast to a structure in FIG. 12, an optical structure 25 is incorporated in the area of the material transition. The structure 25 is inserted between two filler layers 15 and two passivation layers 13 along the active zone 5 of a material transition 9. This reduces an optical conductivity of the material transition 9 acting as waveguide between two pixels P. A waveguide is reduced. Optical structures 25 can be a photonic crystal and a Bragg mirror or another dielectric structure. The structure 25 forms periodic structures of the refractive index along the material transition 9 above, below or on both sides of the active zone 5, which leads to an optical band gap and prevents the propagation of photons along the material transition.

(205) The periodicity of the optical structures depends on the light wavelengths, the size of the optical structures, the length of the structured material transition 9 and the refractive indices of the materials used. FIG. 16A shows only one optical structure 25 on a lower side of the material transition 9, which acts as a waveguide. This optical structure 25 can also be formed on the upper side of the wave guiding material transition 9. The optical structure 25 shown in FIG. 16A is a Bragg mirror. After forming the optical structure 25, passivation layers 13 are applied.

(206) An extension of the example in FIG. 16A is shown in FIG. 16B. A converter material 41 or 42 is applied to the surface. The converter material 41 and 42 extends to approximately the middle between two -LEDs. As the walls of the -LED are self-reflecting, the light generated in the active layer of a -LED is directed by the -LEDs towards the converter material. Light that enters the converter material from the -LED is converted there. Crosstalk is prevented by an optional reflective layer between the converter materials.

(207) On the surface of the converter materials, photonic structures 34 and 37 are deposited on each pixel to direct the light. In an alternative embodiment, the photonic structure extends into the converter material or even into the semiconductor material.

(208) FIG. 17 shows a sixth embodiment of pixel array A in a cross-section in accordance with the invention. In contrast to an embodiment according to FIG. 13, in two filler layers 15, along the active zone 5 of a material transition 9, two additional electrical contacts 27 are introduced at both main surfaces of the material transition 9 acting as waveguide, which effectively reduces electrical and/or optical conductivities of the material transition 9 acting as waveguide between two pixels P. These opposite electrical contacts 27 apply an electrical bias to both main surfaces of a respective material transition 9 between two pixels P.

(209) By means of the applied electrical bias voltage (Bias), a static electrical field is generated, by means of which the optical properties of the material transition 9, which initially acts as a waveguide, are changed in such a way that a waveguide along the material transition 9 is effectively reduced.

(210) As a result of applying the electrical bias to the material transition 9 between the pixels P, which initially acts as a waveguide, an absorption of light in the waveguide is increased by means of the so-called quantum confined Stark effect (QCSE; limited Stark effect), as is used in an electro-absorption modulator, for example. In an electro-absorption modulator, the fundamental absorption of a semiconductor is effectively increased by applying an electric field. Accordingly, optical crosstalk between pixels P is reduced. Suitable electrical contacts 27 are conventional Schottky contacts or metal-insulator contacts. Furthermore, everything that is conventionally used for band bending without current flow is suitable.

(211) After the two opposing electrical contacts 27 have been formed, passivation layers 13 are applied to the two opposing electrical contacts 27, in particular to their surfaces where filler material 15 is formed and which are adjacent to the pixels P. Identical reference signs to the other FIGS. 138 to 142A are shown in FIG. 17, which shows identical characteristics.

(212) FIG. 18 shows a seventh embodiment of a pixel array A in a cross-section. In contrast to the embodiment in FIG. 17, an electric field is generated here inherently, i.e. by selecting a suitable material system. For this purpose, at least one layer of n-doped material 29 and/or p-doped material 31 is arranged on at least one of the two main surfaces of a material transition 9 in such a way that an electric field is generated by it, which is thus incorporated into the material transition 9 without further means. If only one layer of doped material is formed on one of the two main surfaces of the material transition 9 and the layer on the other main surface of the material transition 9 is undoped, a so-called depletion field is provided which is sufficient as an electric field to increase light absorption in the material transition 9. Alternatively, the electric field for increasing light absorption in the material transition 9 is generated by forming a layer of n-doped material 29 on one main surface of the material transition 9 and a layer of p-doped material 31 on the opposite main surface of the material transition 9.

(213) The material used to provide the electric field, in particular the n-doped material 29, the p-doped material 31 and possibly the undoped material are grown epitaxially by means of CVD (chemical vapor deposition) or PVD (physical vapor deposition) in such a way that a built-in bias is provided between adjacent pixels P on the thin waveguide. For n- and p-doping, InGaAlP can be doped with Si and Zn.

(214) By means of the doped material 29 and/or 31, a bias is provided which has the same effect as the embodiment as shown in FIG. 17. Furthermore, the material providing the electric field is directly applied to the material transitions 9, as no passivation layers 13 are required at these. Only exposed surface areas 11 of the pixels P are electrically insulated and passivated by a respective passivation layer 13. Their material may contain silicon dioxide, for example. The pixels P are electrically connected via electrical contact layers 33.

(215) FIG. 19 shows an eighth embodiment of a pixel array A in a cross-section. In this example, the active zone 5 was etched in a controlled manner. In other words, damage to the active zone 5 or the occurrence of defects in the active zone 5 in the area of the material transition is allowed in a controlled manner. According to FIG. 19, the material transition 9 is completely interrupted in its center to the two pixels P, between which the material transition 9 is formed. At the transitions to the two pixels P, the material transition 9 is formed with a maximum thickness dC.

(216) FIG. 20 shows a ninth embodiment of a pixel array A. On the left side, two different embodiments of the suppression of crosstalk between two adjacent pixels P are shown in cross section. The upper variant V1 shows the first embodiment according to FIG. 12, the lower variant V2 shows the fourth embodiment according to FIG. 16A. On the right side, a top view of four adjacent pixels P is shown.

(217) Four adjacent pixels P are assigned to each pixel P, whereby here along an x-direction material transitions 9 are formed according to the second variant V2. Along a y-direction the material transitions 9 are formed according to the first variant V1. In principle, each material transition 9 to the other material transitions 9 can be designed differently, in accordance with the embodiments described in this application. In principle, material transitions 9 can be designed in the same way along a respective spatial direction. The material transitions 9 can be designed according to the desired patterns. The material transitions 9 along a respective spatial direction can alternate in design.

(218) In this way, an array A according to this application includes all possible embodiments or variants as well as combinations of embodiments of material transitions 9. The plan view in FIG. 20 shows that all variants V can be combined depending on the direction, for example. This also applies to all possible shapes of pixels P, which can be round or square, especially here rectangular.

(219) FIG. 21 shows an example of a method of manufacturing a pixel array A according to the invention. The method of manufacturing an array A of optoelectronic pixels P comprises the following steps. In a first step S1, a whole-surface layer sequence of an n-doped layer 1 and a p-doped layer 3 is generated along the array A, between which an active zone 5 is formed. Various techniques are explained and disclosed in this application.

(220) In a second step S2, material of the layer sequence is removed between pixels P to be formed, in particular by etching, from the n-doped side and from the p-doped side. This is done in such a way that at least the active zone remains as a material transition. Likewise, thin cladding layers 7 can remain in the material transition 9 above or below or on both sides of the active zone 5. The thick dC is thus significantly reduced and optical modes cannot propagate laterally between the pixels. The higher resistance also reduces electrical crosstalk. Overall, the electrical and/or optical conductivity of the material transitions 9 is reduced.

(221) The thickness dC is sufficiently thin, which is required according to the specifications for array A or for a desired device in terms of brightness or responsivity. The thickness in the area of the material transition depends, among other things, on the material system and the wavelength of the emitted light.

(222) In one aspect, etching is performed from both sides up to or into the thin mantle layers 7 on each side of the active zone 5 or up to the active zone 5, in such a way that all fundamental modes are prevented from propagating along the active zone 5 to the next pixel P. The maximum thickness dc of an active zone 5 of a material transition 9 for this condition depends on the refractive index difference between the active zone 5 and the cladding layers 7 of the material transition 9 acting as a waveguide.

(223) Reducing the maximum thickness dC results in a reduction of optical crosstalk because more light is emitted from the waveguide. A reduction of the thickness dC also means a reduction of electrical crosstalk. The thin undoped cladding layers 7 of the active zone 5, which remain between individual pixels P, can hardly carry any current. This therefore reduces electrical crosstalk.

(224) With further steps S3 to S5, after etching, the individual pixels P and the waveguide can be covered with other materials necessary for further suppression of optical and/or electrical crosstalk outside the waveguide. In step S3, the exposed main surfaces of the material transitions 9 and exposed surface areas 11 of the pixels P are electrically insulated and passivated by means of a respective passivation layer 13, in particular comprising silicon dioxide. The electrical insulation and passivation of the exposed main surfaces of the material transitions 9 can be omitted, depending on which measure is used in the fourth step S4 to reduce crosstalk.

(225) In a fourth step S4, from the n-doped side and/or from the p-doped side, the removed material is at least partially replaced, e.g. by a filler material 15. In step S5, contact layers 33 are applied to the main surfaces of the Pixel P and thus the structure is electrically contacted. According to one design, steps S1 to S5 are first performed for one main surface of the array and then, after a substrate change, for the other main surface of the array.

(226) To reduce further optical and/or electrical crosstalk, further measures can be taken in the fourth step S4 cumulatively to form the material transitions 9 with the maximum thickness dC. Some of these are listed here as examples, others are described above for the various embodiment. For example, from the n-doped side and/or the p-doped side, areas of the removed material can be filled with light-absorbing material 17 and/or with more strongly refractive material or material 19 with an increased refractive index instead of filling material 15. No passivation layer 13 is formed here at the material transitions 9.

(227) Furthermore, in the fourth step S4, the light absorption and/or the electrical resistance of the active zone 5 can be increased alternatively or cumulatively. A passivation layer 13 should also be applied to the material transitions 9.

(228) The application of these concepts allows the manufacturing of arrays A of optoelectronic pixels P, in particular micropixel emitter and detector arrays without etching through the active zone 5, without optical and electrical crosstalk and without performance and reliability problems compared to solutions with etched active zones.

(229) FIG. 54 shows a modular architecture of subunits of -LEDs. These show different horizontal -LEDs, which are combined in so-called base modules for the provision of -LED modules. The base module comprises a layer stack, which has a first layer 3 formed on a carrier or replacement carrier 1, on which an active layer 7 and on which a second layer 5 is formed. A first contact 9 is applied to a surface area of the second layer 5 facing away from the carrier 1, and a second contact 11 is connected to a surface area of the first layer 3 facing away from the carrier 1. The second contact 11 is electrically insulated from the active layer 7 and the second layer 5 by means of a dielectric 10 and is formed to and on the surface region of the second layer 5 facing away from the carrier 1.

(230) When manufacturing the base module, a surface area of the first layer 3 facing away from the carrier 1 must be exposed after the generation of the layer stack. This means that material of the second layer 5, the active layer 7 and partly of the first layer 3 is removed at an edge area of the layer stack.

(231) This can be carried out, for example, by means of flank structuring of the at least one stack of layers, in particular from the side of the second layer 5, a trench being created surrounding the at least one stack of layers, in particular in a flank structuring area 13. A layer stack can also be described as a mesa structure. The trench is also referred to as a mesa trench. The flanks of a stack of layers are called mesa flanks accordingly. This structuring is carried out using appropriate masks.

(232) In the case of edge structuring, etched areas can be coated with an insulating layer or a dielectric, especially by means of inductively coupled plasma ICP or reactive ion etching RIE, using chemical vapor deposition. The dielectric used is SiO or ZnO. The second contact 11 can have ITO (indium tin oxide) and is produced by sputtering or physical vapor deposition.

(233) A plurality of base modules can be generated as a matrix along an X-Y plane along at least one row and along at least one column on a carrier 1. For this purpose, in addition to the flat one, a further, deep flank structuring through carrier 1 and the first layer 3 is implemented on the right edge area. Area 15 corresponds to the deep flank structuring.

(234) In this way, one module from a matrix of a plurality of base modules can be removed from a carrier 1. The deep edge structuring can be carried out by etching, in particular dry chemical etching or plasma etching.

(235) FIG. 55 shows an example of the embodiment of a base module B as shown in FIG. 54, arranged upside down on another carrier or end carrier 2. The further carrier or end carrier 2 can be transparent to the light emitted by the optoelectronic component. In addition, the material of carrier 1 has been removed. This can be done, for example, by grinding away or by so-called laser lift-off (LLO). The base module B is thus arranged as a flip chip on the further carrier or end carrier 2 and contacted there.

(236) FIG. 56 shows the embodiment according to FIG. 55 with a further base module B with edge area 15 without carrier 1. Both base modules B are oriented opposite to each other, whereby identical contacts, namely first contacts 9, are arranged adjacent to each other. Both base modules B may originally have been formed on carrier 1 in two adjacent rows of a matrix. After removing carrier 1, base modules B are arranged upside down on another carrier or end carrier 2. The two adjacent base modules B, oriented opposite to each other, have been created here as a common layer stack. In this case, the dashed line 17 in FIG. 56 would be a surface area of the second layer 5 in the middle between the two base modules. However, to prevent crosstalk, layer 5 in the middle has been removed by structuring. After such structuring, which also cuts through the active layer, the solid line 17 shows a surface area of the first layer 3.

(237) FIG. 57 shows the embodiment according to FIG. 56 with separate contacting of the contacts. First contacts 9 and second contacts 11 are electrically isolated and connected to corresponding contacts on the end carrier 2. A first contact 19 is electrically connected to the first contact 9 of each module and a second contact 21 is electrically connected to a second contact 11. Contacts 21 and 19 have been made in previous steps in end carriage 2. The base modules are then placed on the end carrier 2, thus creating an electrical connection.

(238) As in the previous version, the middle area is partially removed by additional structuring. Alternatively, it can also be left in place.

(239) FIG. 58 shows the embodiment according to FIG. 56 with common contacting of the first contacts. Second contacts 11 are electrically isolated and connected to contacts of end carrier 2. A first contact 19 applied to a surface of the end carrier 2 is electrically connected to two first contacts 9. Second contacts 21 are electrically connected separately to second contacts 11.

(240) As in the previous version, the middle area is partially removed by additional structuring. Alternatively, it can also be left in place.

(241) In FIGS. 56 to 58, a first layer 3, a transition layer 7 and a second layer 5 can be completely removed as a result of a deep flank structure between the two base modules B. The two base modules B can be contacted to the further carrier or end carrier 2 using flip-chip technology.

(242) FIG. 59 above shows another example of the embodiment of a proposed base module B of a single -LED to provide a -LED module with two rows and two columns of base modules B as shown below. The base module B shown above can be provided here on a carrier 1 but also without a carrier. In this top view, a first contact 9 and a second contact 11 are visible, and in addition, the first layer 3, the transition layer 7 and the second layer 5 are shown.

(243) As shown in FIG. 59 below, four base modules B have been grouped together to form a -LED module. Already on carrier 1, this matrix with two rows and two columns in an X-Y plane may have been selected. When producing adjacent rows on carrier 1, the base modules B of a row can be oriented in the same way. Here, the lower row has base modules B, which are arranged opposite to the upper base modules B. The -LED module shown in FIG. 59 below can still be arranged on the not shown carrier 1 after a flat edge structuring. It is grouped into the rectangular LED module by selecting a release area. This is extracted by means of a deep edge structuring along a rectangle surrounding the -LED module. The resulting 22 (two rows by two columns) -LED module comprises a width of approximately 20 micrometers and a length of approximately 30 micrometers.

(244) FIGS. 60A to 60D show four cross-sections of two oppositely oriented base modules B, which are arranged upside down, i.e. as flip chips on another carrier or end carrier 2. A base module B can have a width of approximately 10 micrometers and a length of 15 micrometers. Depending on the masking during mesa etching, especially to provide a shallow edge structuring, precursors of -LED modules can be created, which can subsequently be removed from a carrier, especially carrier 1, to or as a light emitting diode module, especially by means of a deep edge structuring. Reference symbol 10 designates a dielectric.

(245) According to FIG. 60A, two oppositely oriented individual base modules B are arranged adjacent to each other. Their first contacts 9 are in contact with each other, but do not touch each other. The cross section according to FIG. 60A shows that a flat flank structure was brought out from the side of the second layer 5. This creates a shallow trench that runs around a respective base module B or a respective layer stack. A deep flank structuring was led out from the side of the first layer 3 so that the individual base modules are separated. In this way, several base modules still connected to each other are first placed on the end carrier 2 and then separated from the side 3 by means of the flank structuring. The original carrier 1 was removed.

(246) According to FIG. 60B, two oppositely oriented individual base modules B are also arranged adjacent to each other. Their first contacts 9 are in contact with each other, but do not touch each other. The cross-section according to FIG. 60B shows that a shallow flank structuring of the layer stacks was carried out from the side of the second layer 5. In contrast to FIG. 60A, a deep flank structuring of the layer stacks was carried out from the side of the second layer 5, i.e. from the same side as the shallow flank structuring. The original carrier 1 was removed.

(247) FIG. 60C shows an intermediate step. After that, two oppositely oriented base modules B are arranged, which are created together as one piece. Their first contacts 9 are adjacent to each other. A common layer stack of two adjacent base modules oriented in opposite directions to one another is produced, with a first layer 3, a transition layer 7 and a second layer 5 each being produced as a unit along the end carrier 2. The cross section according to FIG. 60C shows that a shallow flank structuring of the layer stack was performed from the side of the second layer 5, with only the edge areas of the two second contacts 11 having a shallow flank structuring. The area between the first two contacts 9 is not flank structured, i.e. the second layer 5 there remains unprocessed. After contacting, a deep edge structuring of the layer stack is carried out here as shown in FIG. 60A from the side of the first layer 3 and the modules are separated (not shown). The original carrier 1 has been removed.

(248) According to FIG. 60D, two oppositely oriented base modules B are also arranged, which were created as one piece. Their first contacts 9 are adjacent to each other. A common layer stack of two adjacent base modules oriented in opposite directions to each other has been produced, whereby a first layer 3 has been produced as one unit along the end carrier 2. The cross-section shown in FIG. 60D shows that a shallow flank pattern has been created on the stack of layers from the side of the second layer 5, creating a shallow trench around each base module B. In particular, the area between the two first contacts 9 is flank structured, i.e. the second layer 5 there and the transition layer 7 as well as part of the first layer 3 have been removed there as well as in the edge area of the second contacts 11. A deep flank structuring of the stack of layers was carried out here, as in FIG. 60B, from the side of the second layer 5. Only a small ridge remains in the figure, but this can still be separated if necessary.

(249) FIG. 61 shows a further illustration of an embodiment of a proposed base module B to provide a -LED module with two rows and three columns (23) of base modules B, as shown below the base module B shown above can be provided here on a carrier 1, but also without a carrier. In this plan view, a first contact 9 and a second contact 11 are shown, as well as the first layer 3, the transition layer 7 and the second layer 5 are visible.

(250) According to FIG. 61 below, six base modules B are grouped together to form a -LED module. This matrix with two rows and three columns in an X-Y plane is already selected on carrier 1. In addition, when producing adjacent rows on carrier 1, the base modules B of one row are oriented in the same way. The lower row here has base modules B, which are arranged opposite to the upper base modules B. The -LED module shown in FIG. 61 below can still be arranged on carrier 1 after a flat edge structuring. A grouping into the rectangular LED module shown below takes place by selecting a release area. This can be detached by means of a deep edge structuring along a rectangle enclosing the -LED module. The generated 23 (two rows by three columns in an X-Y plane) -LED module has a width of approximately 30 micrometers and a length of approximately 30 micrometers. With this method, any combination of a matrix of base modules can be extracted and produced as a -LED module.

(251) FIGS. 62A to 62D show four cross sections of two oppositely oriented base modules B of a -LED module as shown in the lower illustration in FIG. 61.

(252) FIG. 62C shows, in contrast to FIG. 60C, that the first contacts 9 are electrically connected and contacted by means of a common first contact 19 created on the end carrier 2. The second contacts 11 are individually electrically connected to second contacts 21 on the end carrier.

(253) FIG. 62D shows, in contrast to FIG. 60D, that first contacts 9 are individually connected to first contacts 19 and second contacts 11 are individually connected to second contacts 21 of the end carrier 2.

(254) FIG. 63 shows a top view of a matrix of a carrier (wafer or carrier 1) with groupings in an X-Y plane, which has base modules B. The base modules B are all originally generated on a carrier, in particular carrier 1, in the same orientation. There was no rotation or rotation of base modules B. A generated PLED module only comprises one base module B in a Y-direction and is therefore single-line. Any number of base modules can be provided in an X direction. In FIG. 63 base modules B have been grouped into four -LED arrays or -LED modules M.

(255) FIG. 64 shows a top view of a matrix of a carrier (wafer or carrier 1) with other groupings, which comprises base modules B. Here, the base modules B of two adjacent rows are oriented opposite to each other by rotating the base modules B of one of these rows. The dotted lines represent the rectangles of the -LED modules M still to be separated. FIG. 64 shows -LED modules M with one or two rows along a Y-direction, whereby the number of columns in the X-direction can be arbitrary.

(256) FIG. 65 shows another top view of a further matrix of a carrier, in particular a carrier 1 or wafer, with a further grouping, which comprises base modules B. This grouping creates a rectangular -LED module M in an X-Y plane, which comprises three rows and five columns. The -LED module M thus has 15 base modules B, which are evenly distributed in the rectangle. The base modules B are equally spaced along one row. The rows are also equally spaced. All base modules B have the same orientation.

(257) FIG. 66 shows a further top view of a further matrix of a carrier, in particular a carrier 1 or wafer, with a further grouping, which comprises base modules B. This grouping creates a rectangular -LED module M in an X-Y plane, which has four rows and three columns. The -LED module M thus comprises 12 base modules B, which are evenly distributed in the rectangle. The base modules B are equally spaced along one row. The base modules B comprise two pairs of lines, whereby in one pair of lines the base modules B of both lines are oriented opposite to each other and are equally spaced apart. The distances between the pairs of lines can be different from the distances between the lines in a pair of lines. In this way, a chip cluster of -LEDs can be formed on a carrier 1 or wafer. The result is a modular -LED architecture.

(258) The manufactured -LED modules M can be electrically contacted by means of flip-chip technology and integrated into -LED displays, for example. Base modules B can be electrically connected in series or in parallel.

(259) FIG. 67A shows an embodiment in which the -LED module was structured either after the intermediate transfer step or before on the light emission side. Several periodically arranged holes were etched into the semiconductor layer facing the light emission side, which can be described as so-called negative pillars or columns. This result in a periodic variation of the refractive index, since the surrounding semiconductor material comprises a higher refractive index than the holes filled with air. In this embodiment, the depth of the periodic structure reaches approximately to the active region, but is at least in the order of one wavelength of the light to be emitted. In this embodiment, the holes in the semiconductor material are not filled. However, it can be useful to fill them with a material with a different refractive index in order to achieve the desired optical properties on the one hand and to achieve a planar surface on the other.

(260) The -LED modules can be transferred to a backplane after deep edge structuring as well as after a complete etching. The defined size of the -LEDs from the combined base modules is particularly suitable for this, as it defines the distances in a fixed manner. In addition, a class of stamps can possibly be used to transfer modules of different sizes. FIG. 67B illustrates an example of such a transfer process with a stamp, as described in more detail in this application. Stamp 20 has several cushions 21 and 22, spaced at fixed intervals, each of which can be charged with a surface tension or surface charge, as described in this application. The distances between the cushions correspond to the size of the individual base modules of each base module.

(261) If a base module or -LED module is to be removed from the composite and transferred, the stamp generates a potential on its side facing the module so that it adheres to the cushion. The adhesive force is determined by the charge or voltage of a cushion. In this respect, larger modules can also be transferred, provided that the electrostatic force generated by the cushions is sufficient.

(262) FIG. 68 shows an example of a proposed method for the manufacture of light emitting diode modules. In a first step S1, at least one layer stack providing the base module is created. The stack comprises a first layer formed on a carrier 1, on which an active layer and a second layer are applied. The active layer can comprise a quantum well or similar.

(263) In a second step S2, a surface area of the first layer facing away from substrate 1 is exposed. Finally, in a third step, a first contact is applied to a surface area of the second layer facing away from carrier 1. In addition, a second contact is created on the surface area of the first layer facing away from carrier 1 and exposed. The second contact is electrically insulated from the transition layer and the second layer by means of a dielectric and runs on the surface area of the second layer facing away from carrier 1.

(264) In this way, any number of base modules can be generated as a matrix on a wafer or carrier 1, whereby the base modules can be grouped into -LED modules and then separated. LED modules preferably have a rectangular or square shape in an X-Y plane of the matrix. In this plane, base modules can be arranged regularly in the rows and columns with equal spacing. The base modules are preferably generated and arranged evenly distributed along the matrix over a wafer, carrier or replacement carrier 1.

(265) The manufacturing process shown here is greatly simplified. In fact, a large number of the techniques described here can also be used. For example, each base module can have a current constriction by doping the change in band structure accordingly.

(266) Since the base modules are separated if necessary, it is also advisable to change the band gap of the material system and the active layer at the possible predetermined breaking points by quantum well intermixing or other measures. This reduces nonradiative recombination at possible edge defects, since the charge carriers are repelled by the changed potential of the band structure. The manufactured -LED modules can still be structured in the surface to improve the radiation characteristics. This makes it possible to apply a photonic crystal or a converter layer to larger modules or modules of different colors. Each -LED module can also be equipped with its own control unit, which has already been implemented in the end carrier 2.

(267) Another aspect deals with the question whether and to what extent such sub-units with sensor can be provided. As already mentioned, the manufactured and grouped modules are transferred to a target matrix, which comprises for example a backplane or similar.

(268) FIG. 69 shows the steps S1 to S5 of a proposed process for the production of a display with such sensors, which will be manufactured using the modules presented here.

(269) The method is used to produce a -display with a full-surface target matrix of components, in particular -LEDs 5, arranged in rows and columns next to each other on a first carrier 3 or end carrier. The -LEDs in turn are part of modules.

(270) In a first step S1, a number of -LEDs 5 are formed on a carrier or a replacement carrier 17 in a starting matrix 7. The spacing and size of the -LEDs 5 in the start matrix 7 are in a fixed, in particular integer, ratio to the spacing and size of the free spaces of the later target matrix 1 on the first carrier or end carrier 3. The -LEDs are formed by the methods described in this application. In particular, the wafer is prepared for deep mesa etching in order to obtain a module structure. The individual -LEDs later form the subpixels or also pixels on the target matrix. In this respect, the start matrix 7 can be congruent with at least part of the target matrix 1. In this way, groups of components 5 can be transferred for this part from the replacement carrier 17 to the final carrier 3. Correspondingly, the replacement carrier with the -LEDS formed on it can be at least partially congruent with the end carrier in terms of size and spacing.

(271) In a second step S2, the -LEDs 5 are grouped to a number of modules 9 on the replacement carrier 17, especially by means of deep mesa etching.

(272) In a subsequent step S3, the modules 9 structured in this way are lifted off the replacement carrier 17, in particular by means of laser lift-off or a mechanical or chemical process, and then transferred as modules to the final carrier 3 and thus to the target matrix 1. Contact areas of the modules contacting the -LEDs 5 are configured in such a way that they correspond to contact areas of the target matrix after the transfer. In other words, for at least a partial area of the final carrier 3 and thus the target matrix 1, the modules and the -LEDs are arranged with their contact areas on the replacement carrier 17 in rows and columns next to each other in such a way that the distances between the -LEDs 5 on the replacement carrier 17 are equal to the distances between the -LEDs 5 on the target matrix 1 of the final carrier 3.

(273) In the fourth step S4, the modules 9 are positioned and electrically connected to the primary end carrier 3 in the target matrix 1 in such a way that a number of unoccupied positions 11 remain in this matrix. For this purpose, the modules themselves may be unevenly designed, so that, for example, one module is missing. Alternatively, the modules can also be transferred to the target matrix in such a way that some positions, for example rows or columns, remain unoccupied.

(274) In a fifth step S5, at least one sensor element 13 is positioned and electrically connected at least partially at each of the unoccupied positions 11.

(275) FIG. 70A shows a diagram to illustrate the different aspects and differences between -LED, module and the replacement carrier. Replacement carrier 17 comprises a sapphire substrate on which various semiconductor layers, including at least one active layer, have been deposited in several steps disclosed in this application. A starting matrix 7 of -LEDs is created on the replacement carrier 17 by means of shallow etching. The -LEDs 5 are still interconnected and have only electrically mutually insulating areas created by means of shallow etching, so that they can be individually addressed. Such methods are disclosed in this application. In one aspect, vertical -LEDs are formed in which a first contact faces the substrate and a second contact faces away from the substrate. In addition to this embodiment, -LEDs can also be produced which are designed as flip-chips with their contacts next to each other on the same side. In the present example, a -LED 5 is designed as a flip chip, with the two contacts facing away from the substrate and electrically insulated from each other. The -LED 5 forms a cuboid element. The -LED 5 represents a basic element and comprises, for example, a width of approximately 10 m and a length of approximately 15 m. A component 5 is shown as a base unit on the left side of FIG. 70A.

(276) By means of an additional, this time deep mesa etchingthis corresponds to the second step S2 of FIG. 69the -LED 5 are grouped to modules 9. In the middle of FIG. 70A, a start matrix 7 of twelve components 5 is created on the replacement carrier 17 by means of a shallow etching, whereby the -LEDs 5 are arranged along common sides 15 in four rows and three columns next to each other. The thick edges in FIG. 70A center surround modules 9 grouped in this way, which can combine a plurality of components 5. In this way, two modules 9a are created, each grouping together three -LED 5. Furthermore, two modules 9b with two -LEDS each and two modules 9c with one -LED each are created.

(277) FIG. 70B shows an illustration of the modules and -LEDs after transfer to the final carrier 3. 6 columns and rows can be seen on the final carrier 3, whereby the number of columns and rows can of course be chosen at will. The module arrangement is chosen so that there is no further distance between the modules, i.e. the components are close together. However, modules are selected which do not completely fit into this matrix. For example, 22 modules could completely cover the end carrier shown here. However, two modules are configured in such a way that they are not designed as a 22 matrix but as a 21 matrix, i.e. they only have three -LEDs, so that one position 11 remains unoccupied. When positioning in the above-mentioned way, two positions 11 thus remain free, whereby the position of these in turn depends on the positioning of the respective module. The left of the two free positions is occupied by a sensor element 13. In the version shown, only one position is already occupied. In embodiments, however, the sensor element can also consist of two individual or several elements, which are then divided between the unoccupied positions.

(278) FIG. 70B thus shows a large number of -LED 5, which are grouped together in the form of modules 9 and arranged on the end carrier 3. In this way, a single full-surface target matrix 1 is equipped. For a -display, modules 9 are designed and combined as subpixels. Modules 9 for the three different colors red, green and blue are created and arranged next to each other in such a way that they together create a pixel (picture element) as subpixels. Then the picture elements are arranged along the target matrix 1 in rows and columns. By using redundant -LEDs, sensor elements can also be positioned in some places instead of redundant subpixels.

(279) FIG. 70C shows a representation of an arrangement of a large number of full-surface target matrices 1.

(280) In contrast to FIG. 70B, a large number of full-surface individual target matrices 1 are used, each of which can also comprise a large number of modules 9 according to FIG. 70B. For a clear description of FIG. 70C, each single full-surface target matrix 1 comprise only two rows and two columns. Here, the target matrices 1 comprise the same uniform size in the area. Alternatively, the target matrices 1 can create areas of different sizes. In this way, a display device can be flexibly adapted to a particular application.

(281) For example, in the upper left target matrix 1, a module 9 covers all the vacant positions in target matrix 1. To the right of it, only one module 9 is formed with a component 5 in target matrix 1, leaving three positions 11 unoccupied. Below this, two components 5 form a module 9, leaving two positions 11 unoccupied. A module 9 is positioned in the target matrix 1 at the bottom left, consisting of three components 5, whereby only one position 11 remains unoccupied. For example, sensor elements 13 can be formed at least partially at the unoccupied positions 11. Three of the four above-mentioned target matrices 1 can each have components 5 for one color red, green and blue and together form a picture element. This picture element can be repeated horizontally and vertically along the first carrier or end carrier 3 so that a display function can be provided. Since a homogeneous radiation of the sub-pixels is generally desired, they are preferably equipped with the same modules 9 for each color. The fourth target matrix 1 can alternatively be completely equipped with sensor elements 13.

(282) The distances a and c for respective distances of the target matrices 1 in a row and the distance b as an example for a distance of the target matrices 1 in a column can be selected according to the desired resolution of the display. This also applies to the distances to the edges of the first carrier or end carrier 3. The distances a and b, or a and c, or b and c or a, b and c can be the same. Likewise, the distances a and b and c can be whole multiples of the spatial extension of a component 5 or the distance of the components 5 to each other.

(283) FIG. 70D shows examples of different contact possibilities for electrical contacting of -LED modules on a backplane or other substrate. In M1 a contact panel M1 with two areas KB1 and KB2 is shown, which are suitable for two single base modules. The base modules can be placed on the surface individually or also in combination. Contact panel M1 expands the contact area KB3. This allows a -LED module comprising two connected base modules with shallow mesa etching to be placed and controlled together. Panels M1 are similar to Panel M1, but only contact areas are provided for one base module. In Panel M2 a -LED module is shown, which is arranged above the contact areas. Panel M1 illustrates an area where a common connection is provided.

(284) FIG. 70E shows a section of a partially equipped backplane or plane to illustrate some aspects of this. As already mentioned, the -LEDs can be manufactured as an array in rows and columns. This allows the assembly of several -LED modules and modules with different colors. This is shown in FIG. 70E. The section shows a red module rM in direct top view. It is manufactured from a 61 module according to the proposed principle and is mounted and contacted on the plane. Adjacent to the red module is a blue module bM in a kind of sectional view to illustrate the different contacts. Contacts connected together are marked with K. In this context, the term common should be understood to mean that these contacts have the same potential as at least some other adjacent contacts. Accordingly, a common contact area AB4 is applied on the plane. This always contacts contacts K of several base modules as shown. Further contacts Kb are used for individual control of each base module. Consequently, a total of 5 contact areas must be formed on the plane in order to control 4 base modules individually. As shown in the illustration, the jointly used contact areas can thus also be used jointly by -LED modules of different colors.

(285) FIG. 71 finally shows another aspect of the transfer process. By periodically arranging and organizing the -LED modules into base modules, after a separation of -LED modules in the desired way, the modules can be transferred using the twofold transfer process presented in this application. FIG. 71 shows a transfer arrangement 20 with two cushions 22 whose size corresponds to the distance between the base modules.

(286) In addition to the production of monolithic pixel arrays, -LEDs can also be separately applied to a carrier board and subsequently contacted. FIG. 72 shows an embodiment of a pixel module for different mounts 10 with some aspects according to the proposed principle. Module 10 comprises a body 2 with a first main surface 3, a total of four side surfaces 11 and a second main surface, not shown here in this view, which forms the bottom. Body 2 is made of, for example, silicon or another semiconductor material. In some embodiments, however, the body can also be formed from another material, conductive or nonconductive. The second main surface is arranged parallel to the first main surface 3 and thus forms the underside of the module and body 2. The side surfaces are diagonal to the first main surface or upper side of the body, thus forming a truncated pyramid as shown. Thus, as shown in FIG. 74, an angle between the first main surface and the side surfaces shows more than 90, while the angle between the second main surface 5 and the side surfaces is less than 90.

(287) Referring again to FIG. 72, the upper surface 3 comprises an insulating layer 22, which is arranged in the middle. In this example, the insulation layer does not extend completely over the first main surface, but a free area remains at the corners.

(288) Several contact pads 14a to 14c are now arranged on the insulation layer. Each contact pad 14a to 14c is connected to a contact bar 12a to 12c, the width of which is smaller than the actual contact pad as shown. The contact pads 12a to 12c are also insulated from body 2 of the module. Continuations 13a to 13c of the contact bars are now attached to the side faces 11 of the body. As contact tabs, these are in turn much wider on the side surface than the contact bars 12a to 12c. This increases the possible contact area on the side faces, allowing greater positioning tolerance and greater flexibility in contacting.

(289) One -LED with vertical design is arranged on each of the contact pads 14a to 14c. These are configured to emit light in different wavelengths, for example red, green and blue light. The -LEDs comprise an edge length of a few m, for example 5 m, and are therefore slightly smaller than the contact pads 1a to 14c. The latter are also spaced apart from each other on surface 3, so that a slight offset is possible when positioning the -LEDs without restricting the functionality of module 10. The -LEDs are designed as vertical -LEDs, i.e. they comprise one electrical contact each on their bottom and top side. The contact on the bottom side is electrically connected to the contact pad.

(290) On the upper side, a transparent conductive layer 21 forms a common contact pad for the three -LEDs and leads to a fourth contact bar 12d. This is excellent, as it forms the common connection for all three -LEDs. In the embodiment, it is significantly wider and thicker than the contact bars 12a to 12c. This enables visual identification, making it easier to transfer and position the -LED modules correctly for connection. The contact bar is electrically connected to a contact tab 13d on the last side surface.

(291) With the contact tabs on the side surface, the module or the -LEDs can be electrically contacted if the module is inserted into a matrix or similar. FIG. 73 also shows another aspect, which increases the possible applications of the module. Several contact pads 15a to 15d are arranged on the underside of the module, which are electrically connected to the contact tabs 13a to 13d. The contact pads on the underside can be configured in different ways and can thus be adapted to the requirements of different applications. In the example, the contact pads 14a to 14d are substantially rectangular.

(292) FIG. 74 shows a section through the -LED module along the XX-axis in FIG. 73. The bevelled side faces are clearly visible. These include an angle greater than 90 with the first main surface, i.e. the top of the module. For example, the angle can be between 100 and 150, especially in the range 110 to 130. The angle depends on the manufacturing process and the parameters used for production, as explained in detail below. Accordingly, the angle is less than 90. The contact tabs and bars form a continuous metallization. The thickness of the module body is in the range of 10 m to 100 m, the metallization has a thickness in the range of some 100 nm to approx. 10 m. This allows the module itself to be kept quite flat, but the body itself is stable enough.

(293) FIG. 75 shows a top view of a further embodiment of the -LED module according to the proposed principle, from which further aspects can be seen. In this embodiment, the module with the module body is equipped with only two -LEDs 20 and additionally a further semiconductor chip 30 containing integrated circuits. In this version, the -LEDs are configured as horizontal flip-chips, whose underside, which cannot be seen, comprises the two contacts. The -LEDs are mechanically and electrically connected to the contact bars 12. Each -LED is thus connected to two contact bars 12, some of which are guided to corresponding contact tabs on the side surfaces. In addition, some contact tabs are arranged on the top side of the module, thus forming further contact pads. The IC chip 30 is connected to contact tabs on one side of the module body via its own contact bars.

(294) In this embodiment, the individual contact bars do not run in a straight line to the side surfaces. Instead, the embodiment shows a rewiring in which contact bars are used that run along the surface and/or the side surfaces in order to electrically connect the chip 30 as well as the components 20. The contact tabs 13 along the side face are placed substantially parallel to the edge of the side face, i.e. they run along the side edge. This increases the effective contact area with external contacts. The module can thus also be easily offset or placed with greater placement tolerance on a matrix, display or similar.

(295) In a side view according to FIG. 76, this aspect is clarified once again. It shows a combination of contact tabs on one side surface and a contact pad 15 on the bottom of the module. The contact tabs 13 are placed on the side face, but at different heights.

(296) FIG. 77A shows an example of further processing of a -LED module according to the proposed principle. Module 10 is manufactured in a separate process and then placed on a carrier in a separate step. Carrier 50 comprises a large number of signal, control and power lines, of which line 56 is shown here as an example. In addition, carrier 50 also includes integrated circuits 55, buffers and similar. In this example, the module is placed on the carrier directly next to line 56 and fixed there. In order to achieve an electrical contact and connection between pad 56 and contact tab 13, these two are connected in a further step. This is shown in FIG. 77B. Contact pad 56 is attached to contact tab 13 by reflow or other soldering method. Material 57 is a conductive metal. This not only creates an electrically conductive connection, but also fixes the module mechanically to the carrier. In such a case, additional fastening of the module body to the carrier is not necessary.

(297) FIG. 77C shows various contact options in this context. In the upper illustration of FIG. 77C, the module body is placed on contact pads 56b on carrier 50 in such a way that the contact pads on the underside of the module body overlap with them. A firm connection between the two pads is created by means of paste, reflow or other methods after heating. This requires an exact positioning of the module on the carrier.

(298) In the lower illustration of FIG. 77C, a similar shape is shown as in FIG. 77B. The contact tab on the side face of module body 2 is attached to carrier 50 by soldering a wire to the carrier 50. In one case, this lead 56 on the carrier is designed so that it also partially overlaps with the contact pad on the underside of the module body. This makes the electrical connection even more reliable. At the same time, this embodiment is somewhat less sensitive to positioning fluctuations, as the lines on carrier 50 can be made larger and at the same time, a connection is improved with the additional solder. To ensure that the solder does not create a short circuit, the area 50 should be insulated apart from the contact area of line 56. However, it is advisable to configure the area around the contact of line 56 in such a way that solder also reaches the line, thus improving the electrical connection.

(299) FIGS. 78A and 78B show an example of another version of a special module body. In this module, body 2 is configured with a central recess in which the components 20 and 30 are arranged. This allows the height of the module to be further reduced. In addition, the edge area of the module body can serve as a mounting for optical elements such as lenses and the like. The contact lines to the optical semiconductor components 20 and 30 run along the bottom of the recess and the side surface. As shown in FIG. 78B, the side surface of the recess is sloped. To make contact, the leads 80 are routed along the inner side face, over the main face along the outer side face, to the rear contact pad 15. In this illustration, the outer side surface is substantially vertical. However, this is not necessary, in some configurations this side surface can also be bevelled in the same way as in the previous embodiments.

(300) The module body also has a through hole or via 60, which extends through the material of the module body in the recess. The via is filled with a metal for contacting, which is also insulated from the body. This combination of vias and contact tabs and pads creates a very flexible concept that can produce modules for a variety of technologies and connection variants in a standardized way.

(301) FIGS. 79A and 79B continue this principle. In both FIGS. 79A and 79B, module body 2 also comprises a recess or notch, but the recess or notch is in the bottom of the module body. The -LEDs are located on the upper side of module body 2. In the examples, several vias 60 are provided which extend through the material of body 2 and are connected to contacts of components 20. On the side facing away from the components, i.e. in the recess, contact bars 12 are now provided which connect the via 60 in an electrically conductive manner and lead along the recess to ridges 80 on the side surfaces. The bars 80 on the inner side surface of the recess are then connected to contact pads 15 on the bottom side.

(302) In contrast to FIG. 79A, the lower contact pads in the FIG. 79B version are contacted via the outer surfaces of the module body. Both versions can also be combined with each other, i.e. through-plated holes are provided as well as contact lines, which are electrically connected to contact tabs on the outer side surface and/or contact pads. Due to the increased surface area of the module body, a specifically adapted wiring can be carried out, the flexibility for wiring is significantly increased. The embodiment of FIGS. 79A and 79B makes it possible, when positioning the module, to provide 10 additional circuits on the carrier whose position is in the recess. This results in a higher integration density.

(303) FIG. 80 shows in this context an example of a manufacturing process for a module according to the proposed principle. It should be noted in this context that various techniques disclosed in this application are used for the production. One component, however, is a structured membrane wafer as shown in step S1. This is done by providing the membrane wafer and structuring it by etching in such a way that V-shaped recesses and trenches are formed in sections. A plan view of such a structured membrane wafer is shown in FIG. 84.

(304) In step S2, contact pads and leads or contact bars and tabs are generated on the structured membrane wafer. For this purpose, a photomask is applied and, for example, the metallic leads are formed by MOCVD. If necessary, previously formed isolated vias can also be filled with a metallization in this step. In step S3, the -LEDs are now placed on the contact pads and connected to them.

(305) In step S4, the membrane wafer is rebonded onto an auxiliary carrier so that the back of the membrane wafer is exposed. Then in step S5, this is etched back to the trenches. This allows the modules to be separated so that each module now carries the intended number of -LEDs. In the exemplary step S5, it is a component. Alternatively, step S6 can also be carried out, in which etching is also carried out, but several -LEDs are now combined to provide a module, which is similar to the previous examples. There is no limit to the number of -LEDs and their positioning, but depends on the requirements and the later use. In a last optional step, contact pads are attached to the underside of the module body and these are electrically connected to the contact tabs on the side surface.

(306) FIG. 81 shows a perspective view of the module of FIG. 72 after it has been placed on a carrier. The carrier includes several supply lines and control lines. A supply line 92 is connected to the common contact pad 13d via a contact bar 90b. Contact pad 13b is designed as a top contact and connects the top contacts of the respective vertical -LEDs to a common connector. A further supply line 91 contacts the contact pad 13a on the side surface of the module body via bar 90 and thus connects a connection of the red -LED. The slanted side surfaces ensure a secure electrical connection between bar 90 or 90b and the respective contact tabs. In addition, the module is attached using a soldering process, in which the bars 90 are soldered to the tabs 13a to 13d. Since the contact tabs 13a to 13d cover a relatively large part of the respective side surface, the requirements for positioning accuracy are somewhat lower.

(307) FIG. 82A shows a top view of a module with three -LEDs of different colors with metal bars 12a to 12d on the surface of the module body for contacting three -LEDs. These form a subpixel of a pixel and are designed as SMT -LEDs. They have a contact pad on their underside on each side and thus form horizontal LEDs. Schematically, the -LEDs 20 are represented by the dotted line. Their contact pads are arranged laterally. For perfect contacting they are thus connected on one side to one of the contact bar 12a to 12c. In addition, a common contact is realized with the bar 12d and the metallization there. Each of the bars 12a to 12c leads into one of the corners and to a contact tab 13a to 13c along one corner.

(308) FIG. 82B shows an alternative embodiment in which the -LED components 20 are vertical -LEDs with one contact pad on the bottom and another on the top. In this example, the contact pads 14a to 14c are larger and have essentially the same dimensions as the -LED. The latter is placed on the contact pad and electrically connected to it. Contact bars 12a to 12c also connect the respective corner tabs 13a to 13c with the contact pads. The fourth common contact bar 12d is wide and serves to contact the top side of the -LEDs 20 via a transparent electrically conductive material.

(309) FIG. 83 shows the underside of the version according to FIG. 82A. Contact pads 15 on the underside are contacted by the contact tabs 13a to 13d on the side surface. These are designed to have a relatively large surface area. The cut-out also shows a side view. In one design, one of the contacts is larger than the other and forms the connection for the common contact lead 12d on the top side.

(310) In addition to the production of a monolithic display, some applications and designs also involve the transfer and attachment of -LEDs to a carrier substrate and contact areas there. In order to reduce the error rate during a transfer and the following process steps, the following propose examples and designs show for a pixel array with redundant -LEDs positions. Those can assembled with components if needed. The FIGS. 85A to 85C show a top view of the contacts 13 provided for one pixel 11 on a substrate 15. The substrate 15 comprise several such contacts 13 for further pixels, which are arranged in field or array fashion. After an assembly with subpixels, as shown below, a pixel field or pixel array results, which can be arranged in a display, for example.

(311) The contacts 13 can be divided into a set 17 of primary contacts 17a, 17b and 17c and a set 19 of replacement contacts 19a, 19b and 19c. Each of the contacts 13 can be equipped with a subpixel, for example a -LED. FIG. 85A shows the unpopulated state.

(312) In a first assembly step the pixels 11 of the substrate 15 are assembled in such a way that for each pixel 11 the primary contacts 17a-17c are assembled with one subpixel 21a, 21b, 21c each, while the spare contacts 19a, 19b, 19c remain free. The subpixel 21a can be a -LED, for example, which can emit light in the red spectral range. The subpixel 21b, for example, can be a -LED that can emit light in the green spectral range. The subpixel 21c, for example, can be a -LED that can emit light in the blue spectral range. Pixel 11 thus has a set of RGB subpixels 21a-21c after the first assembly, as FIG. 85B shows.

(313) After the first placement, the subpixels 21a-21c can be checked for errors. For example, subpixel 21c can be identified as faulty.

(314) In a second assembly step, the replacement sub-pixel 19c can be equipped with a replacement sub-pixel 23, which can be a -LED emitting in the blue spectral range. The replacement subpixel 23 thus replaces the faulty subpixel 21c, which can be left on the primary contact 17c.

(315) In the case of substrate 15 as shown in FIGS. 85A to 85C, each pixel 11 has a respective, assigned replacement contact 19a-19c for each primary contact 17a, 17b, 17c. The substrate 15 thus allows each sub-pixel 21a-21c on a primary contact 17a-17c to be replaced by a substitute sub-pixel on a substitute contact 19a-19c.

(316) In contrast, as shown in FIGS. 86A to 86C, the substrate 15 comprises three primary contacts 17a, 17b and 17c per pixel 11 and only one replacement contact 19a, which makes it possible to replace a faulty subpixel on one of the primary contacts 17a to 17c. Additional circuitry measures shall be provided to ensure that the pixel with its subpixel on the secondary contact is addressed in the correct color.

(317) FIG. 86A again shows a top view of the contacts 13 for a pixel 11 in unpopulated condition. As FIG. 86B shows, after a first assembly step, the primary contacts 17a-c are equipped with subpixels 21a-21c, which in turn can be -LEDs for the primary colors red, green and blue.

(318) In a subsequent step, for example, subpixel 21a can be identified as faulty. As a replacement for this faulty subpixel, a replacement subpixel 23 can be placed on the replacement contact 19a as shown in FIG. 86C, which emits light of the same color as subpixel 21a if it were faultless.

(319) FIGS. 87A to 87C show a respective top view of a substrate 15, in which a set of primary contacts is provided for a respective pixel 11, comprising six primary contacts 17a, 17b, 17c, 17d, 17e and 17f. In addition, the substrate 15 comprise three spare contacts 19a, 19b, 19c for a respective pixel 11. FIG. 87A shows the primary and replacement contacts in an unpopulated state.

(320) In a first assembly step as shown in FIG. 87B, the primary contacts 17a-17f are assembled with respective subpixels 21a-21f. Two subpixels of each primary color red, green and blue can be provided. This provides double redundancy for each of the primary colors red, green and blue. In addition, the provision of 2 subpixels per color allows a more precise gradation of brightness and thus an improved brightness resolution. Despite the redundancy, subpixels 21a-21f can be checked for errors. For example, if it turns out that both subpixels 21c and subpixels 21f, which emit light of the same color, are faulty, a replacement subpixel 23 can be provided on the replacement contact 19c to replace the two faulty subpixels 21c and 21f.

(321) The primary contacts 17a-17f as well as the spare contacts 19a-19c can be used for the electrical contacting of the subpixels 21a-21f, 23 arranged on them. The subpixels can be -LEDs in particular, as explained above.

(322) The described manufacturing method is particularly suitable for the production of pixel fields for -displays, which use -LEDs as subpixels with horizontal flip-chip design. In this design, p- and n-contact are located on the bottom side of each -LED. This allows an electro-optical characterization of the individual -LEDs before further process steps prevent the substrate 15 from being refilled. The described manufacturing process is also advantageous for pixel arrays with vertical -LED chips. Depending on the test method used to find defective subpixels, the redundant replacement contacts 19a-19c can be re-equipped in different steps of the manufacturing process. Attention should be paid to a further processing option for the electrical contacting of the replenished replacement contacts 19a-19c or the replacement subpixels 23.

(323) With regard to the electrical connection of the primary contacts 17a-17f and the replacement contacts 19a-19c there are different approaches. For example, with reference to FIG. 87, the redundant contacts 21a and 21d or 21b and 21e or 21c and 21f can be integrated into the same respective subpixel circuit. The redundancy can thus only refer to the primary contacts for the subpixels, but not necessarily to a circuit for controlling the subpixels.

(324) The spare contacts 19a-19c can be wired in such a way that they can be controlled after an assembly instead of a subpixel identified as faulty.

(325) The primary and replacement contacts assigned to each other can also be connected in parallel, whereby a supply line to a primary contact is disconnected if the sub-pixel arranged on it proves to be faulty and the replacement contact is equipped with a replacement sub-pixel.

(326) As can be seen with reference to FIGS. 86A to 86C, at least one spare contact 19a may also be provided as a redundant placement facility for the sub-pixels on primary contacts 17a-17c, the spare contact 19a allowing for a placement of a spare subpixel regardless of the color of the emitted light. This redundant spare contact 19a can be connected like a fourth subpixel. A programming of the control of the replacement contact should be adapted to the population of the replacement contact 19a depending on the color of the subpixel identified as defective on one of the primary contacts 17a-17c.

(327) In the following, some concepts for measures to improve a transfer in the form of an improved mass transfer printing process are presented. Background of the process is a transport of -LEDs of a wafer onto a carrier surface of a display. There, the individual -LEDs are fixed and attached and electrically connected. On the one hand, the dimensions of the individual -LEDs are in the range of only a few [m]n, on the other hand a large number of these -LEDs have to be transferred locally at the same time. Often several million of such microstructures have to be transferred from a large number of wafers to a common carrier surface.

(328) In the example shown here in FIG. 27A, a wafer 12 is initially planned on which epitaxial layers have been created by various semiconductor manufacturing processes, from which the individual -LEDs 16 are then formed. In some aspects, the -LEDs can emit different colors and wavelengths during operation. This is indicated here by the different shades. The -LEDs are flat at least on their underside and/or top surface to allow for easy mounting and transport, for example. As part of the manufacturing process, the -LEDs 16 can be mechanically separated from wafer 12. This is done by removing a so-called sacrificial layer (see for example FIGS. 24A to 24D as well as 22J, 23J and 25J), if necessary supplemented by one or more release layers.

(329) FIG. 27B shows how an elastomer stamp 18 is moved vertically from above towards the wafer 12 and adheres to a surface of the -LEDs 16 by means of a suitable surface structure of the elastomer stamp 18. For example, a maximum tensile force can be proportional to a size of the surface of the -LED 16. Adhesion can be created by silicone materials, for example, especially by so-called PDMS elastomers. Due to the separation of the -LEDs 16 from wafer 12, the -LEDs in their plurality can be lifted off wafer 12 together, whereby they adhere to the elastomer stamp 18. This elastomer stamp 18 is now moved in a transfer movement away from wafer 12 to a carrier surface 14 of a display mounted next to it, for example. This can be done, for example, with the aid of a transfer tool, whereby the elastomer stamp 18 can be regarded as part of such a tool.

(330) In FIG. 27C, the elastomer punch 18 is now initially located above the carrier surface 14 and is lowered onto a surface of the carrier surface 14 in a lowering movement. In this process, the underside of the -LEDs 16 comes into mechanical contact with the carrier surface 14. In a subsequent step, as shown in FIG. 27D, the -LEDs 16 are detached from the elastomer stamp 18. The elastomer stamp 18 is then moved upwards, for example to start a new transfer cycle. The -LEDs 16 can, for example, be permanently attached to the carrier surface 14 by an adhesive process.

(331) The steps shown in FIGS. 27A to 27D indicate that due to the high number of -LEDs 16, reliable and accurate placement in the shortest possible time is desirable. Especially when the -LEDs 16 are picked up by the stamp 18, it may be desirable to keep the occurring forces low on the one hand and to achieve a reliable positioning and holding of the -LEDs 16 on wafer 12 on the other hand. In particular, avoiding fluctuations in the adhesive force or excessive adhesive forces on the wafer and/or on the stamp can bring about significant improvements here.

(332) FIGS. 22A to 22J show a first example of a process for manufacturing a -LED with a -LED supporting holding structure. The manufacturing process of the -LED is simplified. It should be noted in this context that the process can be supplemented and extended with the measures disclosed here.

(333) FIG. 22A shows a step in which a sacrificial AlGaAs sacrificial layer is first applied to a substrate 3, which here shows GaAs. A functional layer stack 1 is then epitaxially grown on this sacrificial layer stack, which thus has at least one quantum well or another optically active structure 13. In addition, the layer stack comprises two layers 15 and 17, which are doped differently. The n-doped semiconductor layer 15 is here attached to the sacrificial layer 11. A first electrically conductive contact layer 5 is then deposited on a side of the functional layer stack 1 facing away from the substrate 3. This may, for example, contain ITO (indium tin oxide).

(334) FIG. 22B shows a step in which a first lithographic processing is carried out on the main surface side of the functional layer stack 1 on the first electrically conductive contact layer 5, which is turned away from the substrate 3. In particular, a first masking layer 19 is applied to the first electrically conductive contact layer 5, whereby an area of the first electrically conductive contact layer 5 remains uncovered by the first masking layer 19 in order to create a holding structure 9. From this side of the layer sequence, the first electrically conductive contact layer 5, the functional layer stack 1, the sacrificial layer 11 and a part of the substrate 3 can then be etched out in the uncovered area so that the recess shown in cross-section is formed. The sidewalls are very steep or fall down essentially vertically.

(335) FIG. 22C shows a step in which a support structure 9 is formed in the etched out area of the layer sequence. This is done by depositing material from a gas phase, which extends over the masking 19 and fills the trench until a small recess remains in the material of the web 9 at the level of the masking layer. The recess can be production-related and optionally omitted, for example by applying material until the recess is completely filled. A too thick layer of material on masking 9 can be thinned again by CMP or other methods.

(336) FIG. 22D shows another aspect after the material on masking layer 19 and layer 9 itself has been removed. A second photomask 21 is then applied and patterned in a second area to provide access to the sacrificial layer. The area between the holding structure and the patterning forms the -LED. After patterning, etching is again carried out through layers 5 and 1 to the sacrificial layer 11. This results in the structure shown in FIG. 22J. Here the etching process can form a trench or similar to define the dimensions of the -LED.

(337) FIG. 22E shows the structure after the etching process, in which the sacrificial layer 11 is removed from the layer sequence, especially by wet chemical etching. The functional layer stack 1 is then supported by the holding structure 9, which is attached to the substrate 3. In a final step, a second electrically conductive contact layer 7 is attached to the functional layer stack 1 on the side of the functional layer stack 1 facing the substrate 3 in the area of the removed sacrificial layer 11. The material of the second electrically conductive contact layer 7 may contain ITO (indium tin oxide). In the area where the sacrificial material has been etched away, the second electrically conductive contact layer 7 can be applied by sputtering, see FIG. 22F. In this way, the space between the substrate 3 and the functional layer stack 1 can be accessed. In addition, when the second electrically conductive contact layer 7 is applied, flanks of the functional layer stack 1 and an area of the exposed area of substrate 3 can be covered. It is also possible to deposition from the gas phase, electroplating or other techniques.

(338) After finishing the contacts 7 on the underside of the structure, the electrically conductive material is removed again on the flank and especially in the area of the trench. The structure thus produced is shown in FIG. 22G. FIG. 22H shows a step in which the flanks of the functional layer stack 1 that are free of electrically conductive material are covered by a passivation layer 23. This is optional. The second masking layer 21 has also been removed. A further passivation layer 25 can also be created on the substrate 3 covered with electrically conductive material of the second electrically conductive contact layer 7.

(339) The structure shown in this way can now be broken away from the holding structure using the stamp described above or another transfer tool. The flanks of layer stack 1 are also covered by a passivation layer 23. FIG. 22J again shows the step of breaking off the -LED thus produced as a top view. The large arrow is intended to show the break-off from a holding structure 9 and the jagged area is intended to represent a break point 29.

(340) A further example is shown in FIGS. 23A to 23J. FIGS. 23A to 23F show steps identical to those in FIGS. 22A to 22F. In contrast to the steps shown in FIG. 22G, FIG. 23G involves removing the electrically conductive material deposited on the flanks of the functional layer stack 1. Then, before or instead of passivation, a metal is deposited on the flanks and diffused. This material can be Zn in particular. It diffuses into the edge area of the layer stack and produces a change in the band structure there, so that charge carriers are kept away from this area of high defect density. Accordingly, the non-radiative recombination of charge carriers in the functional layer stack is reduced in this way. This is followed by the same steps as in FIGS. 22H to 22J as shown in FIGS. 23H to 23J.

(341) FIGS. 24A to 24I show a third embodiment of a proposed process for manufacturing a -LED with a holding structure.

(342) FIG. 24A shows a step in which a functional layer stack 1 was epitaxially deposited on a GaAs substrate 3 over a sacrificial layer 11 of AlGaAs. Between the functional layer stack 1 and the sacrificial layer 11, a second supporting layer 24 is also epitaxially formed, which contains, for example, InGaAlP and is relatively thin compared to the sacrificial layer 11. Similar to the previous explanations, the doped semiconductor layer of layer stack 1, which is adjacent to layer 24 and the sacrificial layer, is n-doped. The second semiconductor layer 17 is p-doped. A first electrically conductive contact layer 5 not shown here is subsequently applied to a side of the functional layer stack 1 remote from the substrate 3, especially the main surface side. This can then have ITO (indium tin oxide), for example.

(343) FIG. 24B shows a step in which a first lithographic processing is carried out on the main surface side of a functional layer stack 1 that faces away from a substrate 3. For this purpose, a first masking layer 19 is applied to the second semiconductor layer 17 of the functional layer stack 1, whereby, for the creation of a holding structure 9, outer edge regions of the functional layer stack 1 remain uncovered by the first masking layer 19. From this side of the layer sequence, the functional layer stack 1, the second supporting layer 24 and the sacrificial layer 11 can be removed, in particular etched away by means of ICP (inductively coupled plasma etching), in these uncovered edge regions up to the substrate 3. Finally, the first masking layer 19, is removed again. The trench thus formed can extend around all sides of the body, thus forming one or more -LED structures separated by trenches.

(344) FIG. 24C represents a further step in the process, in which a first support layer 20 is formed on the substrate 3, on exposed edge areas of the layer sequence and on a main surface of the -LED 1 facing away from the substrate 3 to provide a support structure 9. The material of the support layer 20, which is deposited from a gas phase and epitaxially grown, for example, has InGaAlP. The support layer 20 envelops the layer sequence at least on one side up to substrate 3, it thus extends from the second main surface side over at least one side flank to substrate. Finally, a second masking layer 21 is applied to the main surface of the first support layer 20 facing away from substrate 3. An outer edge region of the layer sequence remains uncovered by the second masking layer 21.

(345) FIG. 24D shows a step in which an outer edge region uncovered by the second masking layer 21 of the layer stack 1, the second support layer 24 and the sacrificial layer 11 up to the substrate 3 has been removed, in particular by etching. In this way, an access to the sacrificial layer 11 will be formed from this side of the layer sequence. The areas covered by the second masking layer 21 remain intact even after the second masking layer 21 has been removed in FIG. 24D.

(346) FIG. 24E shows a step in which the sacrificial layer 11 is removed from the layer sequence, in particular by wet chemical etching. The removal is performed from the outer edge of the layer sequence exposed in step 24D. The functional layer stack 1 is then supported by the first support layer 20 and the second support layer 24, the first support layer 20 being attached to the substrate 3. In this way, a support structure 9 is provided which supports the functional layer stack 1, without the sacrificial layer 11.

(347) FIG. 24F shows the structure after which a first electrically conductive contact layer 5 and a second electrically conductive contact layer 7 are formed. An electrically conductive layer is formed, which is attached to the side facing away from the substrate 3 on the first supporting layer 20, which is attached to the functional layer stack 1 in a supporting and electrically conductive manner. The electrically conductive layer is also applied to the side of the functional layer stack 1 facing the substrate 3 in the area of the removed sacrificial layer 11 on the second supporting layer 24. The material of the electrically conductive layer may contain ITO (indium tin oxide). Especially in the area where the sacrificial layer 11 was etched away, the electrically conductive layer can be applied by sputtering. In this way, a space between the substrate 3 and the functional layer stack 1 is easily accessible. When the electrically conductive layer is applied, flanks of the functional layer stack 1 and at least part of the exposed area of substrate 3 can also be covered.

(348) FIG. 24G shows a step in which the electrically conductive material deposited on the flanks of the functional layer stack 1 is at least partially removed, in particular etched away, in such a way that the first electrically conductive contact layer 5 on the side facing away from the substrate 3 is produced electrically separately from the second electrically conductive contact layer 7 on the side of the functional layer stack 1 facing the substrate 3. In this way, a contacted functional layer stack 1 is formed.

(349) For this purpose, a third masking layer 31 is first applied to the first base layer 20. This third masking layer 31 leaves edges to the flanks of the functional layer stack uncovered. This third masking layer 31 covers edge areas of the first support layer 20 that are attached to the substrate 3. By means of removal, in particular by etching, firstly the first and second contact layers 5 and 7 are electrically separated from each other and the support layer 20 is mechanically reinforced by the first contact layer 5 in such a way that a retaining structure 9 is additionally mechanically reinforced.

(350) FIG. 24H shows a step where the third masking layer 31 has been removed. The functional layer stack 1 is attached to the substrate 3 by a retaining structure 9. For attachment, the first support layer 20, reinforced by the first electrically conductive contact layer 5, interacts with the functional layer stack 1, stabilized and protected by the second support layer 24. By means of a lifting head 27, the contactedi.e. indirectly coated with the contact layers 5 and 7functional layer stack 1 can be lifted off and thereby broken off from the holding structure 9. Reference mark 29 denotes a predetermined breaking point at which an electronic component or a contacted functional layer stack 1 can be detached from a substrate 3.

(351) FIG. 24I again shows a step of breaking a layer stack 1, which has electrical contacts and provides at least one function, in contrast to the cross-sections in FIGS. 24A to 24H, this time as a top view. The large arrow is intended to show the breaking off of a retaining structure 9 and the jagged point is intended to represent a break point 29. A detachable electronic component, in particular a detachable micro-light-emitting diode, may be attached to several retaining structures 9, for example, in planar view, at rounded corners of the component.

(352) FIGS. 25A to 25J show a fourth example of a proposed method. FIGS. 25A to 25D show steps similar to those in the previous example in FIG. 24.

(353) In contrast to FIG. 24E, FIG. 25E shows a step in which only part of the sacrificial layer 11 is removed by wet chemical means. This exposes a part of layer 24 and the contact layer 7 is then applied. The removal is performed from the outer edge of the layer sequence exposed in step 141D. The functional layer stack 1 is then supported by the first support layer 20 and the second support layer 24, with the first support layer 20 attacked to the substrate 3. In this way, a support structure 9 is provided to support the functional layer stack 1 without the complete sacrificial layer 11.

(354) FIG. 25F shows a step in which a first electrically conductive contact layer 5 and a second electrically conductive contact layer 7 are formed on a sacrificial layer 11, which is only partially removed in FIG. 25E. In this process, an electrically conductive layer 5 is formed, which is attached to the side facing away from the substrate 3 on the first support layer 20, which is attached to the functional layer stack 1 in a supporting and electrically conductive manner. The electrically conductive layer also extends to the side of the functional layer stack 1 facing the substrate 3 in the area of the removed sacrificial layer 11. Especially in the area where the sacrificial layer 11 has been etched away, the electrically conductive layer can be applied by sputtering. In this way, a space between the substrate 3 and the functional layer stack 1 is easily accessible. When applying the electrically conductive layer, flanks of the functional layer stack 1 and the exposed area of the substrate 3 can also be covered with the electrically conductive material.

(355) FIG. 25G shows a step in which the electrically conductive material deposited on the flanks of functional layer stack 1 is at least partially removed. The first electrically conductive contact layer 5 on the side facing away from the substrate 3 is thus electrically separated from the second electrically conductive contact layer 7 on the side of the functional layer stack 1 facing the substrate 3.

(356) For this purpose, a third masking layer 31 is applied to the first base layer 20. This third masking layer 31 leaves edges to the flanks of the functional layer stack uncovered. This third masking layer 31 covers edge areas of the first support layer 20 that are attached to the substrate 3. By means of an etching process, the first and second contact layers 5 and 7 are electrically separated from each other. Independently of this, the first contact layer 5 mechanically reinforces the support layer 20. The remaining sacrificial layer 11 is retained during this step.

(357) FIG. 24H shows the structure after removing the third masking layer 31 and the remaining sacrificial layer 11, both of which can be removed by various etching processes. The functional layer stack 1 is attached to the substrate 3 by a retaining structure 9. For attachment, the first support layer 20, reinforced by the first electrically conductive contact layer 5, interacts with the functional layer stack 1, stabilized and protected by the second support layer 24. FIG. 251 again shows the predetermined breaking point 29. FIG. 25J again shows a step of breaking a -LED 1 with electrical contacts as a top view. Depending on the design, a holding structure can hold several such -LEDs so that they can be lifted off together or one after the other by a transfer instrument.

(358) In the last versions shown here, a breaking edge is formed. Although this is only very narrow, it can still lead to non-radiating recombination centers, so that the efficiency of the -LED is somewhat reduced. In addition, somewhat higher demands are placed on the transfer stamp or transfer technology.

(359) An aspect that leads to a further reduction of the influence of non-radiative recombination centers is shown in FIGS. 26A and 26B. As already mentioned, the fracture edge often generates recombination centers, which leads to an increase in non-radiative recombination in this area and thus reduces efficiency. After processing the semiconductor layer sequence, a photomask 23 is now applied and patterned so that the surface adjacent to the later edge regions is exposed. In contrast, photoresist remains over the area of the later active layer or the active region. Subsequently, a dopant, for example Zn, is deposited on the surface. In the next step, shown in FIG. 26B, a diffusion step is performed. The Zn diffuses through layer 17 and reaches the active region. With suitable process parameters, quantum well intermixing occurs, provided that the active region is formed by one or more quantum wells. Quantum well intermixing shows a strong change in the region of the mask edge as explained in this application, so that the course of the band gap is quite steep and resembles a band gap jump. The increased band gap thus occurs mainly in the edge region and also in the region 25a, where the breaking edge is later formed. The breaking edge is thus formed in an area of increased band gap, so that charge carriers are kept away from the defects caused by the edge during operation. After quantum well intermixing has been generated, the device can be further processed as described above.

(360) Referring back again to FIGS. 27 and 28, these show a further embodiment of a support structure 10 according to some suggested principles for avoidance of breakage edges and improved liftoff. In principle, the basic structure corresponds to the diagram in FIG. 27A. In particular, the wafer shown in FIGS. 27A and 27B comprises the wafer structure shown in the following, whereby FIG. 28 refers to a simplified top view of a wafer 12 from a top side. Three -LEDs 16 can be seen, which in this example are each flat rectangular and arranged next to each other. Other shapes of chips are possible for example hexagonal. On a wafer 12, a large number of such -LEDs 16 can be provided on a surface of 16 or 18 inches, for example, arranged side by side.

(361) Prior to a transfer process, these -LEDs 16 are mechanically detachably arranged on wafer 12. This means that they can be removed by a stamping tool 18. In the example shown here, the -LEDs 16 are partially detached from wafer 12 on their underside (not visible) and are now held by holding elements 20. The mounting elements, which appear round here due to the top view, can be columnar or pole-like with, for example, a round, angular or elliptical cross-section, made from a carrier substrate 22 underneath. As shown, the -LED 16 shown here in the middle is held in position by a total of three mounting elements 20. The three support points in particular make it possible to achieve coplanarity, i.e. an arrangement that is stable from the point of view of the distribution of forces and is in the same plane as the other -LEDs 16. Two of the mounting elements 20 each hold two -LEDs 16 at their corners or edges.

(362) In the following FIGS. 29A to 29D, a vertical sectional view (see line 24 in FIG. 28) is shown for various possibilities of designing a support structure 10. A wafer 12 or, in general, a carrier material or bonding material serves as the basis for mechanical stabilization and for accommodating other components such as electrical connections, electronic control elements and the like. A first release layer 26 is arranged vertically above it. The release layer 26 serves to enable controlled delamination, i.e. the deliberate and controlled separation of the layers from each other by means of a defined tensile force. Furthermore, such a layer can serve as an etch stop layer to leave adjacent layers unchanged during an etching process. This can, for example, replace a breakage process, as it has been used up to now in the state of the art, with a peeling process in which no disturbing residues remain on the -LED.

(363) A sacrificial Layer 28 is also provided for. The background to this is that silicon, for example, is used as the material for such layers, which can then be removed in one process step by chemical processes, for example to separate the -LED 16 from the wafer 12 below it. The -LED 16 also has a contact pad 30, which can have a semiconductor active area such as a p-n junction. FIG. 29A and FIG. 29B show the cross-section of a -LED 16 with an epitaxial layer 32 as an example. This epitaxial layer 32 can also be supplemented by a second release layer 34, which is formed between the sacrificial layer 28 and the epitaxial layer 32. This second release layer 34 can be arranged at different locations depending on the design variant.

(364) FIGS. 29A and 29B each show a design variant in which a receiving element 20 as a pole-like, columnar or post-like elevation from wafer 12 extends in one piece vertically between two -LEDs 16 through the sacrificial layer 28 and ends before the epitaxial layer 32. Here, the epitaxial layer 32 tapers tightly towards the top, thus forming a V-shaped mesa trench 38 (see FIGS. 30 and 31). While in FIG. 29A the second release layer 34 extends to a side or partial underside of contact pad 30, the second release layer 34 ends horizontally in front of contact pad 30 with sacrificial layer 28 filling the remaining gap. A gaseous or liquid etching substance can then reach the sacrificial layer 28 via the mesa trench 38, i.e. the space between two -LEDs 16.

(365) In FIG. 29B, the delamination layer on the exposed surface of the receiving element is also removed by the etching process. By controlling the etching process, the removal of the delamination layer can be selectively adjusted. For example, the delamination layer may have a significantly lower etch rate than the sacrificial layer 28 with respect to the etching process used. This ensures complete removal of the sacrificial layer without overly attacking the delamination layer or the carrier substrate by the etching process. In an alternative embodiment, which is not shown here, the etching process is also used to etch through the delamination layer and into the carrier substrate. In other words, the funnel-shaped recess between the two -LEDs is continued in the receiving element. This results in a V- or U-shaped recess for the receiving element, leaving two columns on which the -LEDs are placed. The depth of such an etch in the receiving element can also be set by the process. In general, however, not the entire receiving element is etched through. Rather, the receiving element is etched only up to half of its height or less, so that sufficient stability of the receiving elements is ensured. In particular, it is ensured that the remaining columns do not break when the -LEDs are removed, but that the -LED is lifted off by overcoming the adhesive force of the delamination layer.

(366) FIGS. 29C and 29D show a further embodiment, particularly with regard to the design of the mounting element 20. Here, the receiving element 20 protrudes in one piece from the plane of wafer 12 through the sacrificial layer 28 to an opposite side of the support structure 10. In this case, the pick-up element 20 is tapered at its upper end or designed with slanted -LED retaining surfaces 36, which can allow easier lifting of the -LEDs 16 while at the same time ensuring a secure fit on wafer 12. In FIG. 29D, according to one example, the receiving element 20 ends vertically before the end of the epitaxial layer 32. The contact pad 30 connects the layers inside the -LED and especially the light emitting layer. As shown in FIGS. 29B and 29D, the contact pad 30 is the vertically lowermost element in each case and can therefore come into direct mechanical and thus electrical contact with an electrical contact element (not shown) on a support surface of the display or module, if necessary without additional bridging solder or conductive adhesive. A contact pad 30, for example, can have edge lengths in the range of 1-15 m.

(367) Finally, FIG. 29E shows an embodiment in which the receiving element is significantly widened and the delamination layer extends completely over the surface of the receiving element. As shown in FIGS. 29C and 29D, sacrificial layer 28 extends through the funnel-shaped region between the individual -LEDs with its epitaxy 32. Each -LED comprises an epitaxy whose lateral dimensions are larger on the light-emitting side than on the side facing the contact pad 32. In other words, the -LEDs widen from the side with the contact pad 32, resulting in an inverted V-shape in the shown sectional structure. A further layer 34 is applied to the surface of the areas of the epitaxial layer 32, especially on the sloping sides forming the funnel and on the surface containing the contact pad. This serves as an etching stop and, together with the delamination layer 26, produces a defined adhesive force. For lift-off, the sacrificial layer 28 is now removed by plasma etching, gaseous etching or another process in the V-shaped areas between the -LEDs and below, so that the chips only rest with their layer 34 on the delamination layer of the receiving elements.

(368) FIG. 30 and FIG. 31 each show an example of a carrier structure 10 with exemplary 24 -LEDs 16 arranged in a matrix on a wafer (not shown). FIG. 30 shows a total of 17 carrier elements 20. These are partly arranged in a mesa trench 38 between two adjacent -LEDs 16, partly also at the corners of the respective -LEDs 16. This arrangement can lead to the fact that a total of fewer pick-up elements 20 are required than a total number of -LEDs 16. In addition, a mounting element 20 in the example shown here can support or accommodate up to four adjacent -LEDs 16.

(369) In FIG. 31, the base of receptacle 20 is not round as in FIG. 30, but has a rectangular or square base. This means that the contact area 36, with which the mounting element is in contact with the -LED 16, may vary. This can ensure stable mounting of the -LED 16, even if the -LED 16 shifts slightly in its position in the x-direction or y-direction. In other words, a total contact area consisting of all contact surfaces 36 on the -LED 16 remains the same or at least approximately the same, even with small shifts in the lateral direction. Furthermore, the mounting elements 20 can also be arranged on the outer edge of a carrier structure 12 and engage on an outer lateral surface of a -LED 16. As an example, it can be seen here that exactly three support points for the same -LED can provide particularly stable spatial stabilization. Here, too, a mounting element 20 can support two or more adjacent -LEDs 16 and thus reduce space requirements and thus costs through multiple use. In the examples shown, the contact area is shown much larger than the chip area. In practical implementations, the contact area is significantly smaller to reduce the adhesive force so that the delamination layer remains on the carrier and does not break off.

(370) FIG. 32A shows an embodiment in which several -LEDs 16 have been monolithically produced on a carrier substrate. Each -LED has the shape of a hexagon, i.e. 6 side faces, each facing a side face of an adjacent -LED. The corners of the individual -LEDs each rest on a mounting element 20. In addition, an edge structuring has been carried out, i.e. trenches have been etched so that the -LEDs are only held by the mounting elements. Each -LED comprises a centrally arranged and round active area 2a. This is surrounded by an area 2b, the diameter of which substantially corresponds to the distance between two opposite side surfaces of a -LED. In other words, the area extends to the side edge of each hexagonal structure of the -LEDs, while the corners of each -LED do not include the area 2b.

(371) In a different embodiment, area 2b is slightly larger, so that two areas 2b of two adjacent -LEDs would meet virtually extended beyond the side edges. However, this part of the second area is removed during processing of the deep edge structure. The second region now comprises a larger band gap generated by quantum well intermixing than the band gap of the active region 2a. The quantum well intermixing was generated, for example, using one of the methods disclosed and presented in this application. The quantum well intermixing and the resulting increase in the band gap effectively keeps the charge carriers away from the edge regions and thus the edges of the -LED, since there is an increased defect density there due to the processing, which leads to non-radiative recombination.

(372) FIG. 32B shows another version of the embodiment, which was created by an improved mask structuring. The benefit for this embodiment is to reduce the number of photomasks and transfer steps required. In this version, a photomask was chosen which leads to smaller bulges at the corners. This results in this slightly changed structure.

(373) In the examples shown here, the -LEDs are manufactured using various semiconductor technologies. The techniques disclosed in this application can be used for this purpose. However, it is also possible to transfer the antenna structures in this way. The wafer onto which the transfer is made can have contact areas, so that electrical contact is possible. Likewise, control, power sources and other elements may already be present in this wafer. The -LEDS transferred in this way will then be further processed in several versions. For example, a converter layer or a light-shaping element will be applied to the -LED. In principle, individual -LEDs were transferred in these designs. However, the process is not limited to such. The above modules can also be formed with these carrier structures to facilitate the transfer of such modules. The columns or the carrier elements are formed after it is known what size the modules should have.

(374) Traditionally, there are various ways of transferring chips from a carrier wafer to a corresponding target substrate.

(375) State of the art transfer processes such as laser transfer printing or self-assembly of individual micro light emitting diode chips from a solution or electrostatically activated or diamagnetic transfer processes are known.

(376) An extension of these concepts achieved with the electrostatic transfer is explained in more detail. A method is to be specified with which optoelectronic semiconductor chips with particularly small dimensions, i.e. -LEDs, are picked up and deposited and at the same time, those with a defect are sorted out.

(377) FIG. 33A schematically shows a device 10 for picking up and placing optoelectronic semiconductor chips as an example of an invention. In this example, the optoelectronic semiconductor chips are designed as -LEDs 11 and are arranged on a carrier 12 at a distance from each other. The device 10 comprises a pick-up tool 13, an excitation element 14 and a voltage source 15.

(378) The excitation element 14 emits light 16 with which the -LEDs 11 are irradiated. The light 16 emitted by the excitation element 14 comprises wavelengths that generate electron-hole pairs in the optically active region of the -LEDs 11 by excitation. The electron-hole pairs cause an electrostatic polarization within the -LEDs 11, which generates an electric dipole field in the vicinity of the respective -LED 11. In the present embodiment, the pick-up tool 13 is arranged between the excitation element 14 and the -LEDs 11. The pick-up tool 13 is at least partially transparent for the light 16 emitted by the excitation element 14 so that the light 16 can reach the -LEDs 11.

(379) The pick-up tool 13 has metal contacts embedded, for example, in polydimethylsiloxane (PDMS for short) or another suitable material. The metal contacts are connected to the voltage source 15. An electrostatic field can be generated by applying a voltage to the metal contacts. Furthermore, the pick-up tool has 13 elevations 17, which extend from a surface on the underside of the pick-up tool 13 in the direction of the -LEDs 11.

(380) Based on FIGS. 33A to 33D, a procedure for picking up and placing the -LEDs 11 with the aid of the fixture 10 is described below as an embodiment according to the proposed concept. The light 16 emitted by the excitation element 14 causes an excitation and a resulting electrostatic polarisation in the -LEDs 11. At the same time, the pick-up tool 13 is charged by the voltage source 15 in such a way that an attractive interaction between the pick-up tool 13 and the -LEDs 11 is caused.

(381) The pick-up tool 13 is moved down to the -LEDs 11 until the elevations 17 are in contact with the -LEDs 11 below. In this example, every second -LED 11 is in contact with one of the protrusions 17. As FIG. 33B shows, the pickup tool 13 is then raised together with the LEDs 11 adhering to the bumps 17. FIG. 33C shows an enlarged section of FIG. 33B. FIG. 33C shows the electrostatic charge of pick-up tool 13 and the polarization of the -LEDs 11. For simplicity, the excitation element 14 and the voltage source 15 are not shown in FIG. 33B and all subsequent figures.

(382) The -LEDs 11 located between the elevations 13 are not lifted by the pick-up tool 13. Furthermore, -LEDs 11 are not lifted where the light 16 emitted by the excitation element 14 causes little or no polarization due to defects in the -LEDs 11. These -LEDs 11 are highlighted in FIG. 33A to 33C. The lower polarization compared to intact -LEDs 11 makes it possible to sort out -LEDs 11 with corresponding defects without having to test the -LEDs 11 beforehand. Then, as shown in FIG. 33D, the -LEDs 11 are transferred to a desired location using the pick-up tool 13 and stored there.

(383) FIG. 34 schematically shows a device 20 for picking up and placing optoelectronic semiconductor chips as a further example of an invention. The device 20 shown in FIG. 34 is largely identical to the device 10 in FIG. 33A. The difference is that the excitation element 14 in FIG. 34 is located below the carrier 12 on which the -LEDs 11 are located. In this case, the support 14 must be at least partially transparent to the light 16 emitted by the excitation element 14 in order for photoluminescence excitation to occur in the -LEDs 11.

(384) FIG. 35A schematically shows a cylindrical shaped pick-up tool 13, which can be designed like the drum of a laser printer. The pick-up tool 13 is electrostatically charged in such a way that there is an attractive interaction between the surface of the pick-up tool 13 and the -LEDs 11 below it due to the polarization caused by the photoluminescence excitation. As shown in FIG. 35B, the cylindrical pick-up tool 13 is rolled over the support 12 and those -LEDs 11 are picked up in which sufficient polarization has been produced by the incident light 16.

(385) FIG. 36 schematically shows a pick-up tool 13 with elevations 17 on its underside extending in the direction of the -LEDs 11 located below the pick-up tool 13. The light 16 emitted by the excitation element 14 not shown in FIG. 36 passes through the pick-up tool 13 onto the -LEDs 11. To allow the passage of the light 16, the pick-up tool 13 is made of a material that is at least partially transparent to the light 16. Alternatively, corresponding through-holes or light guides can be integrated into the pick-up tool 13.

(386) FIG. 37 shows the pick-up tool 13 from FIG. 36, but in FIG. 37, only certain -LEDs 11 are selectively irradiated with the light 16, e.g. every second -LED 11. To make this possible, corresponding through-holes or light guides may be integrated in the pick-up tool 13 or a corresponding shadowing mask may be provided which allows the light 16 to fall only on the specified -LEDs 11. As a result, only the -LEDs 11 irradiated with the light 16 are excited to photoluminescence and only these -LEDs 11 can be picked up by the pick-up tool 13, provided that they form a sufficient polarization by the photoluminescence excitation.

(387) FIG. 38 schematically shows a pick-up tool 13, which comprises a continuous flat surface 21 on its underside. The flat surface 21 makes it possible to pick up -LEDs 11 arranged in different patterns and/or at different distances. Furthermore, shading elements, e.g. a mask, can be provided to excite selectively only certain -LEDs 11 to photoluminescence.

(388) FIG. 39A to 39C shows the fixture 10 while placing the -LEDs 11. After picking up the -LEDs 11 as shown in FIG. 33A to 33D, the pickup tool 13 is transferred to a board shown in FIG. 39A on which some of the -LEDs 11 are to be mounted.

(389) Using the voltage source 15 shown in FIG. 39B, the electrostatic charge of the pick-up tool 13 is changed in such a way that the attractive interaction between the pick-up tool 13 and the -LEDs 11 is reduced or converted into a repulsive interaction. By means of the individually controllable metal contacts in the pick-up tool, the electrical charge in certain areas of the pick-up tool can be changed in the desired way so that only a predetermined number of -LEDs 11 are deposited on the board 22. The pickup tool 13 is then removed from the board 22, as shown in FIG. 39C. The -LEDs 11 remaining on the pickup tool 13 can be removed or placed elsewhere, for example on a cleaning tape.

(390) FIGS. 40A through 40C schematically illustrate various options for generating an electric field using pickup tool 13. The field lines 23 shown in FIG. 40A through 40C indicate the direction and strength of the electric field at the location.

(391) In the configuration shown in FIG. 40A, charges are located in the elevations 17 of the pick-up tool 13, and the counter charges are located in the vicinity of the pick-up tool 13. This results in an electric field around each of the bumps 17, similar to the field of a point charge. In FIG. 40B, there are dipole charges in the pick-up tool 13, arranged in such a way that the electric field strength is particularly strong at the tips of the bumps 17. In FIG. 40C, the bumps 17 of the pickup tool 13 are electrically charged and the countercharges are arranged below the carrier 12 so that the -LEDs 11 to be picked up are located between the pick-up tool 13 and the countercharges and thus within the electric field.

(392) The electric fields generated by the pick-up tool 13 should not be homogeneous in order to exert an effective force on the dipoles of the -LEDs 11 so that they can be recorded by the carrier 12. FIGS. 40A to 40C also show electric field lines 24 of -LEDs 11 generated by the excitation. The interaction of the field lines 24 of the -LEDs 11 with the field lines 23 of the pick-up tool 13 is not shown for simplification.

(393) FIGS. 41A and 41B show illustrations with regard to transfer steps of a conventional method and with regard to a method according to the concept of a double transfer process. The parallel, error-free transfer of many -LEDs from a carrier substrate 3 to a display substrate 7 plays a decisive role in the production of -displays. The number of necessary transfer steps is important for the manufacturing costs. The fewer transfer steps required, the lower the corresponding process costs. Parallel to the cost consideration, the technical feasibility of reducing the number of transfer steps is also relevant.

(394) In general, the density of -LEDs on a carrier substrate is 3 orders of magnitude higher than on a -display. The ratio depends on the -LED size, the chip-to-chip distance (wafer pitch) on carrier substrate 3 and the target resolution of the -display (pixel pitch).

(395) The transfer from carrier substrate 3 to the target substrate 7 can be carried out according to a conventional method in such a way that the -LEDs are removed from carrier substrate 3 according to the pixel pitch of the display and transferred to the corresponding substrate 7. The size of the transfer stamp as well as the size of the removable area on carrier substrate 3 and the total size of the -display then define the number of transfer steps for a -display. It is advantageous if the stamp size is selected in such a way that the display size can be fully populated by means of integer multiples of the stamp size in x and y direction. In this way, individual transfer processes can be avoided. For the production of color displays, the transfer for all three colors red, green, blue of the -LED onto the target substrate must be carried out.

(396) Both FIGS. 41A and 41B show a carrier substrate 3 on which -LEDs 1 have been formed. Accordingly, a carrier substrate 3 provides -LEDs of one color, for example red, green and blue. Now the number of transfer steps by means of which -LEDs are transferred from a carrier substrate 3 directly to a -display is to be determined, whereby this corresponds to a conventional method.

(397) For example, the display has a spatial extension of 200 mm in the x-direction and 100 mm in the y-direction. The carrier substrate 3, for example, has a diameter of 300 mm. The pitch between the -LEDs is 10 m. The pitch between the pixels of the display is 100 m, ten times as large. A color display with red, green and blue -LEDs is to be produced. Therefore, this whole process has to be done for each color.

(398) FIG. 41A shows maximum stamp positions per carrier substrate 3 for a small transfer stamp size. FIG. 41B shows maximum stamp positions per carrier substrate 3 for a relatively large transfer stamp size. In FIG. 41A, the size of the transfer stamp is 10 mm in the x-direction and also 10 mm in the y-direction. Accordingly, for a display area of 20,000 mm.sup.2 (200 mm100 mm) with the selected area of the transfer stamp of 100 mm.sup.2, a total of s=200 transfer steps must be performed for each color. Using the three colors red, green and blue results in 600 transfer steps for one display. FIG. 41A shows that up to 610 transfer steps can be carried out with this design, allowing 86.3% of the wafer to be used. However, it should be noted that it is assumed that each transfer step does not involve a transfer error, i.e. all -LEDs to be transferred are also picked up.

(399) Small transfer stamps result in a large area of use on the carrier substrate 3 In other words, a large number of -LEDs can be removed from a carrier substrate if the transfer stamp is small. However, the resulting high utilization factor is associated with a large number of transfer steps. FIG. 41B shows a design, in which the size of the transfer die is designed with spatial extensions of 40 mm in an x-direction and 50 mm in a y-direction.

(400) Accordingly, for a display area of 20,000 mm.sup.2 with the selected area of the transfer stamp of 2,000 mm.sup.2, a number of r=10 transfer steps must be carried out for each color. Using the three colors red, green and blue results in only 30 transfer steps for one display. FIG. 41B shows, however, that up to 24 transfer steps can be carried out with this design, which means that only 67.9% of the wafer can be used. As a result, although larger transfer dies result in a smaller number of transfer steps, the usable area on carrier substrate 3 is also smaller. In other words, a larger stamp cannot easily reach some areas on the carrier substrate.

(401) Now the number of transfer steps is to be determined by means of which -LEDs are transferred from a carrier substrate 3 via an intermediate carrier 5 to a target substrate for a -display. In contrast to the conventional method, instead of a display, an intermediate carrier 5 is now first assembled in the same way as in the conventional method. All size specifications described above still apply. Accordingly, a transfer stamp as shown in FIG. 41A requires s=200 transfer steps per color and a transfer stamp as shown in FIG. 41B requires r=10 transfer steps per color.

(402) Since the pitch of the -LED on the carrier substrate 3 is 10 m, and the pitch of the pixels of the display is ten times as large at 100 m, the conventional transfer method can only transfer fewer -LEDs than possible by a factor of n=100. In other words, both stamps transfer less -LED per transfer in the conventional manner than it would be possible.

(403) In the method according to the proposed principle, all -LEDs present on the carrier substrate 3 and accessible by the stamp are transferred to the intermediate carrier 5 during the transfer. These are so-called first transfer steps, which are carried out by means of a first transfer stamp 4. In the proposed process, the intermediate carrier 5 is the same size as the display, so that a display for one color can be completely assembled with one transfer by means of a second transfer step using a second transfer stamp 6 of the same size. Since the first density of -LEDs on the intermediate carrier 5 is greater by a factor of n=100 than the density of the pixels on the display, a number of n=100 displays of one color is produced from an intermediate carrier 5. For color displays, 3100 second transfer steps are then required, which, together with the first transfer steps, result in a respective following total number of transfer steps per 100 color displays:

(404) For the small transfer stamp 4 as shown in FIG. 41A, this results in a total number of 3200+3100 transfer steps for 100 color displays, i.e. 9 transfer steps per 1 color display. For the larger transfer stamp 4 as shown in FIG. 41B, the total number of transfer steps is 310+3100 for 100 color displays, i.e. 3.3 transfer steps per 1 color display.

(405) This is a significant improvement over the conventional method, which requires 600 transfer steps per 1 color display for the small transfer stamp shown in FIGS. 41A and 30 transfer steps per 1 color display for the larger transfer stamp shown in FIG. 41B. The transfer steps per color display are average values from which real manufacturing processes may differ within tolerances and due to defects.

(406) FIG. 42 shows a first embodiment of an inventive start structure for an inventive process in a top view. This start structure is used to execute the two transfer steps safely and reliably. FIG. 42 shows -LEDs 1 arranged at module areas 11, which adhere to a carrier substrate 3 by means of first anchor elements 9. The module areas 11 can be assembled from one or several carrier substrates 3.

(407) The first anchor elements 9 are connected to the carrier substrate 3 and are designed to hold several module areas 11 detachably between the first anchor elements 9 in such a way that the module areas 11 can be separated from the carrier substrate 3 in first transfer steps S2 with a first defined minimum lifting force transverse to the substrate plane by means of the first transfer stamp 4, moved out and then transferred to the intermediate carrier 5. The minimum lift-off force must be applied at least to enable lift-off and must be set in a defined manner by the anchor elements 9.

(408) The adhesive force with which the -LEDs 1 adhere to the first transfer stamp 4 is greater than the first defined minimum lifting force. FIG. 43 shows the first embodiment according to FIG. 42 of the starting structure in an enlarged view using the proposed concept for the procedure.

(409) The enlarged view shows that the -LEDs 1 adhere to module areas 11 by means of second anchor elements 13. The module areas 11 thus carry a plurality of transferable -LEDs. In particular, second anchor elements 13 are formed which are connected to the module areas 11 and are configured to hold -LEDs 1 detachably between the second anchor elements 13 in such a way that the -LEDs 1 are separated from an intermediate carrier 5 by means of the second transfer stamp 6 in a respective second transfer step S3 with a second defined minimum lifting force transverse to the plane of a respective module area 11, moved out and then transferred to the target substrate 7.

(410) The adhesive force with which the -LEDs 1 adhere to the second transfer stamp 6 is greater than the second defined minimum lifting force. FIG. 42 and FIG. 43 show the first starting structures that can be used to carry out the presented method. By means of first anchor elements 9 a respective first transfer step can be performed and by means of second anchor elements 13 a respective second transfer step can be performed safely and reliably. By means of the anchor structures 9, 13 defined minimum lift-off forces are set for a lift-off during the two transfer steps.

(411) FIG. 44 shows a further illustration with regard to the production of a first launch structure in accordance with the invention. On the left, a round carrier substrate 3 is shown, in which rectangular module areas 11 are drawn. Carrier substrate 3 has the double anchor elements in the form of the first anchor elements 9 for the module areas 11 and the second anchor elements 13 for the micro light emitting diodes. On the right side, an enlarged representation of a rectangular module area 11 is shown. The module also includes lifting elements 15 at two diagonally opposite corners. These serve to ensure that the module areas 11 can be safely transferred. The lifting elements 15 can alternatively be formed in the four corners of a module area 11 or in the four corners of a module area 11 and additionally in its center. Lifting elements 15 provide working surfaces for a first transfer stamp for lifting module areas 11. Thus, module areas with -LEDs 1 can be assembled from different carrier substrates 3.

(412) In some aspects, the lifting elements 15 are designed as -LEDs 1, which are not to be transferred and are directly attached to the module areas 11. Lifting elements 15 are thus -LEDs 1, which are directly connected to module areas 11 without second anchor elements 13. Without anchor elements, the lifting elements 15 have a high adhesive force on the respective wafer area 11. Lifting elements 15 create a square or round surface or structures such as crosses. The number of lifting elements 15 can be selected proportionally to the size of the module area 11. If the lifting elements 15 are only structures directly connected to module area 11, the arrangement of the structure of the lifting elements 15 is selected as an integer multiple of the display pixel pitch to generate the least loss of chip area. If -LEDs 1 are provided as lifting elements 15, they can no longer be used as display elements.

(413) Alternatively or cumulatively, according to the lifting elements 15 positioning elements 17 can be designed as positioning aids for a spatially accurate transfer. Lifting elements 15 are then the positioning elements 17. The accuracy of a wafer pitch of the individual -LEDs on the transferred module areas 11 is not affected by the transfer process. Since the positioning accuracy of large-area module areas 11 in relation to one another is not negatively influenced by the expansion effects of a transfer stamp during the transfer, greater overall accuracy can also be achieved when denominating a temporary intermediate carrier 5. This also results in lower tolerances in the final assembly of displays with micro light emitting diodes.

(414) FIG. 45 shows an example of an inventive method. In a first step, an intermediate carrier 5 is produced in the target size of the display product with the same -LED density as the carrier substrate 3. The basic shape of the intermediate carrier 5 is rectangular. It is then thinned out during transfer to the display. For this purpose, the intermediate carrier 5 is provided on which module areas 11 of wafer 3 can be temporarily transferred completely. In a second stamping step or transfer step S3, individual -LEDs with the correct pixel pitch are removed again to be transferred to a final target substrate 7. An important criterion is the positional accuracy during transfer to the intermediate carrier 5 as well as the spatially accurate, preferably error-free placement during transfer to the target substrate 7.

(415) To create a color display, the following steps are carried out for each of the colors red, green and blue, in particular in the example of FIG. 46:

(416) With a first step S1, -LEDs 1 are generated on a carrier substrate 3 with a first density. In this process, first anchor elements 9 and second anchor elements 13 are formed on the carrier substrate 3 for positioning module areas 11 and -LEDs 1. These anchor elements 9, 13 thus provide double anchor element structures or double anchor element structures as starting structures for the process. After the carrier substrate 3 has been processed, the module areas 11 located on the carrier substrate 3 are tested in such a way that, for example, functioning -LEDs are distinguished from defective -LEDs 1, a yield is determined or color locations are determined.

(417) With a second step S2, a respective first transfer step is carried out by a first transfer stamp 4, which transfers the -LEDs 1 to an intermediate carrier 5 with the first density. Depending on the test results, only certain module areas 11 are arranged on an intermediate carrier 5. In this way, for example, only functioning module areas 11 or only module areas 11 with suitable color can be formed.

(418) Depending on the design, a multiple transfer takes place until the intermediate carrier 5 is completely equipped with module areas 11. These are attached to the intermediate carrier 5 with an adhesive material or adhesive film. The adhesive force can be generated by self-hardening or cross-linking by means of ultraviolet light or exposure to high temperature. Optionally, thermal or thermocompressive treatment of the intermediate carrier 5 can be carried out, which improves the planarity and/or adhesion. An intermediate carrier 5 is used for each color, for example a 12.3 inch intermediate carrier 5. The intermediate carrier 5 can be equipped with module areas 11 of different carrier substrates 3.

(419) With a third step S3 a respective second transfer step is executed. Here, a second transfer stamp 6 is used to transfer the -LEDs 1 from the intermediate carrier 5 to a target substrate 7 with a second density that is a factor n smaller than the first density. The distance between the pixels and thus also between the -LEDs on the target substrate 7 corresponds to a multiple of the distance between -LEDs of the same type on the intermediate carrier 5 and can be different in both spatial directions. In other words, -LEDs on the intermediate carrier are selected and transmitted based on the pitch on the target substrate 7. This result in a thinning of the -LEDs on subcarrier 5, but a corresponding number of color displays can be created from three assembled subcarriers.

(420) The target substrate 7 provides a common array area for each of the n arrays, especially for all three colors. Size and shape of the intermediate substrate 5 and the second transfer stamp 6 are equal to each other and preferably equal to the array surface. In this way, a backplane of a display can be equipped with -LEDs of one color in a second transfer step. If intermediate carrier 5 and second transfer stamp 6 are smaller than the display by a factor k, correspondingly k second transfer steps must be carried out, which increases the manufacturing effort. The target substrate 7 can be equipped with several intermediate carriers 5, for example to produce colored screens.

(421) The display can be further processed by means of a further processing S4. For example, the production of a respective electrical top contact in the case of vertical micro light emitting diodes or the production of both electrical contacts in the case of horizontal micro light emitting diodes. In addition, optical out-coupling structures or out-coupling layers or surface refinement layers can be formed, which can serve to improve the black impression, for example. A modulation can also be carried out.

(422) FIG. 46 shows the first embodiment of a start structure for the proposed method in cross-section. The start structure comprises several -LEDs 1, which are connected to module areas 11 by means of second anchor elements 13. These in turn are connected to a carrier substrate 3 by first anchor elements 9. Between carrier substrate 3 and module areas 11 on the one hand and -LEDs 1 and module areas 11 on the other hand, anchor elements 9, 13 are configured in such a way that with a defined first minimum lifting force of the lifting first transfer stamp 4, the module areas 11 are separated from the module areas 11 in a first transfer step S2 and with a defined second minimum lifting force of the lifting second transfer stamp 6, the -LEDs 1 are separated from the module areas 11, lifted and then transferred in a second transfer step S3.

(423) FIGS. 47A to 47E show a further example of a proposed method using the first start structure shown.

(424) FIG. 47A shows how a large number of module areas 11 with -LEDs 1 are detached from the first anchor elements 9 and the wafer 3 with a step S2.1. This is done by means of a first transfer stamp 4. For lifting off the module areas 11, the adhesive force of the -LEDs 1 on the module areas 11 (second adhesive force) is greater than the adhesive force (first adhesive force) of the module areas 11 on the carrier substrate 3. In addition, the adhesive force of the first transfer stamp 4 on the -LEDs 1 is also greater than the first adhesive force of the module areas 11 on the carrier substrate 3. The first minimum lifting force applied by the first transfer stamp 4 is again greater than the first adhesive force of the module areas 11 on the carrier substrate 3 and smaller than the second adhesive force of the -LEDs 1 on the module areas 11 and less than the adhesive force of the -LEDs 1 on the first transfer stamp 4.

(425) For successful placement of the module areas 11 carrying -LEDs 1 on the intermediate support 5 as described in FIG. 47B, the second adhesive force of the -LEDs 1 on the module areas 11 must be greater than the adhesive force of the -LEDs 1 on the first transfer stamp 4. The adhesive force of the module areas 11 on the intermediate support 5 must be greater than the adhesive force of the -LEDs 1 on the first transfer stamp 4. First anchor elements 9 and second anchor elements 13 are used to set the respective first and second adhesive forces. Thus, the first adhesive force between the module areas 11 and the wafer 3 is provided by the first anchor elements 9. The respective second adhesive force between the -LEDs 1 and the module areas 11 is provided by the second anchor elements 13. The release force applied by the first transfer stamp 4 must be greater than the adhesive force of the -LEDs 1 on the first transfer stamp 4 and smaller than the second adhesive force of the -LEDs 1 on the module areas 11. The release force is the minimum force that must be applied in order to carry out releasing.

(426) FIG. 47B shows a subsequent step S2.2 of applying the module areas 11 carrying -LEDs 1 to the intermediate carrier 5, which is also carried out using the first transfer stamp 4.

(427) By selecting a suitable material, a connection between the module areas 11 and the intermediate support 5 can be provided with the required adhesive force. For example, an adhesive can be used. The adhesive force of the -LEDs 1 on the first transfer stamp 4 can also be changed by suitable movement guidance of the first transfer stamp 4 during lifting and setting down, e.g. by movement guidance with shear component, i.e. parallel to the plane of the intermediate carrier. The adhesive force of the -LEDs 1 on the first transfer stamp 4 can be reduced, e.g. during setting down.

(428) Steps S2.1 and S2.2 are carried out several times until, for example, for a color of red, green or blue, the intermediate carrier 5 is fully loaded.

(429) FIG. 47C shows a subsequent step S3.1 of lifting the -LEDs 1 from the module areas 11 for transfer to the target substrate 7, which is done by a second transfer stamp 6. The -LEDs 1 are released from the second anchor elements 13 and the intermediate carriers 5. Here -LEDs 1 are released simultaneously from several intermediate carriers. The density of the -LEDs 1 on the module areas 11 does not correspond to the density of the -LEDs 1 on the target substrate 7. For example, the first density can be twice as high as the second density. Accordingly, the second stamp has 6 sensing elements 19, which correspond to the distance of the -LEDs 1 on the target substrate 7. FIG. 47C shows that the first density of -LEDs 1 on module areas 11 is twice as high as the second density of -LEDs 1 on target substrate 7.

(430) The adhesion of the second transfer stamp 6 must also be stronger than the adhesion of the -LEDs 1 on the intermediate carrier 5. To lift off the -LEDs 1, the adhesive force of the -LEDs 1 on the second transfer stamp 6 must be greater than the second adhesive force of the -LEDs 1 on the module areas 11. Furthermore, the adhesive force of the module areas 11 on the intermediate carrier 5 must also be greater than the second adhesive force of the -LEDs 1 on the module areas 11. The defined second minimum lifting force applied by the second transfer stamp 6 must be greater than the second adhesive force of the -LEDs 1 on the module areas 11 and less than the adhesive force of the module areas 11 on the intermediate carrier 5 and less than the adhesive force of the -LEDs 1 on the second transfer stamp 6.

(431) For successful placement of the -LEDs 1 from the second transfer stamp 6 onto the target substrate 7 as described in FIG. 47D, the adhesive force of the -LEDs 1 on the target substrate 7 must be greater than the adhesive force of the -LEDs 1 on the second transfer stamp 6. Conversely, the release force applied by the second transfer stamp 6 is greater than the adhesive force of the -LEDs 1 on the second transfer stamp 6 but less than the adhesive force of the -LEDs 1 on the target substrate 7. The second anchor elements 13 as well as connecting means and the movement guide of the second transfer stamp 6 are used to set the respective adhesive forces. The respective second adhesive force between the -LEDs 1 and the module areas 11 is provided by the second anchor elements 13.

(432) FIG. 47D shows a subsequent step S3.2 of applying the -LEDs 1 to the target substrate 7, which is also done with the second transfer stamp 6. -LEDs 1 are applied to a target substrate 7, which is part of a display.

(433) The adhesive force of the -LEDs 1 on the second transfer stamp 6 can also be changed by suitable movement guidance of the second transfer stamp 6 during lifting and setting down, e.g. by movement guidance with shear component, i.e. parallel to the target substrate plane. The adhesive force of the -LEDs 1 on the second transfer stamp 6 can be reduced, e.g. during setting down. By selecting a suitable material, a connection between the -LEDs 1 and the target substrate 7 can be provided with the required adhesive force. For example, adhesives, intervias or solder can be used.

(434) Steps S3.1 and S3.2 are carried out several times until, for example, target substrate 7 of a display is fully populated for all colors of red, green and blue.

(435) FIG. 47E shows further processing steps S4 on the target substrate 7, including the production of mechanical and electrical contacts on the target substrate 7 by means of conventional processes, such as deposition of an Intervia material, curing and subsequent structuring and/or back etching.

(436) For example, a respective electrical top contact is produced in vertical -LEDs or both electrical contacts are produced in horizontal -LEDs. In addition, out-coupling structures or outcoupling layers or surface refinement layers are formed, for example to improve the black impression. Modularization can also be carried out. In this way, a large number of arrays A in -display design can be produced simply and cost-effectively.

(437) FIG. 48 shows a further example of a connection of -LEDs 1 at module areas 11, for which additional anchor elements 13 and second release elements 23 are provided in addition to the second anchor elements 13 and on these. Before executing a second transfer step S3 the -LEDs 1 are in contact with second anchor elements 13 and second enabling elements 23, each of which is connected to a module area 11. The -LEDs 1 are mechanically connected to the module area 11 with a large adhesive force by means of the second anchor elements 13 and the second enabling elements 23.

(438) FIG. 49 shows the embodiment according to FIG. 48, whereby the second release elements 23 have been removed, thus effectively and purposefully reducing the adhesive force of the -LEDs 1 to the module area 11.

(439) FIG. 50 shows a second start structure with -LEDs 1, which are connected to module areas 11 by means of second anchor elements 13 and second release elements 23, which are connected to a wafer 3 by means of first anchor elements 9 and first release elements 21. The -LEDs 1 are in contact with second anchor elements 13 and second enabling structures 23, which in turn are in contact with module area 11. The module areas 11 are in contact with first anchor elements 9 and first enabling elements 21. In contrast to the first start structure according to FIG. 46, enabling elements 21, 23 are used in addition to anchor elements 9, 13. In this way adhesive forces can be reduced in a targeted manner so that module areas 11 are removed first and -LEDs 1 afterwards by removing first release elements 21 and then second release elements 23.

(440) The first anchor elements 9 for module areas 11 can vary in number, size and distribution. For example, they can be used to optimize a release process depending on the size of the module areas 11 in such a way that adhesive forces are selected in the correct ratio to lifting forces. A minimum lift-off force must be applied to enable lift-off. This minimum lift-off force can be set in a defined manner using anchor elements and release elements.

(441) FIGS. 51A to 51E show a further example of an inventive method using the second launch structure shown in FIG. 50, which uses first release elements 21 and second release elements 23 in addition to first anchor elements 9 and second anchor elements 13. FIG. 51B shows that the first release elements 21 are removed first. FIG. 51C shows that in a first transfer step S2 module areas 11 are detached from wafer 3 and placed on the intermediate carrier 5. Then, as shown in FIG. 51D, the second release elements 23 are removed. In a second transfer step S3, the -LEDs 1 of module areas 11 are detached and placed on the target substrate 7. This step can be seen in FIG. 51E.

(442) FIGS. 52A and 52B illustrate the aspect of selectivity of enabling elements. In FIG. 52A, the first share elements 21 are removed. FIG. 52B shows how two second release elements 23 are removed after the first release element 21 has been removed, the module areas 11 containing -LEDs 1 have been transferred to an intermediate carrier 5 and protective layers 25 have been removed.

(443) Selectivity between first enabling elements 21 and second enabling elements 23 for successive removal can be achieved in different ways: a) Different materials with different properties can be used, which are matched to each other. For example, SiO.sub.2 can be etched with HF. Si can also be etched with SF6. Further possible materials are for example SiO.sub.2, Si, Al.sub.2O.sub.3, SiN, SiON, AlN, HfOx, metallic layers as well as organic materials, which can be used as adhesives. b) Different rates of material removal can be used. For example, by exposing relatively large areas of the first release element 21 to the removal process. In second release approval element 23, relatively small areas are exposed to the removal process. For example, only small openings are designed in such a way that liquids and/or gases can only penetrate slowly. c) The second release elements 23 can be protected from the removal process by protective layers 25. After removal of the first release elements 21, the protective layers 25 can be removed, for example by dry chemical, wet chemical or gaseous etching, after which the second release elements 23 can be removed. d) The release elements 21, 23 can be removed in different ways. For example, by means of chemical processes such as wet chemistry or by means of gas phases, by means of thermal processes, by means of mechanical processes, by means of optical processes, for example by using UV light.

(444) FIGS. 53A to 53F show embodiments of the arrangement of second anchor elements 13 and second release elements 23 between -LEDs 1 and module areas 11, which are here alternatively designed as a complete carrier substrate 3. The second anchor elements 13 for the -LEDs 1 can vary in number, size and distribution. For example, a release process can thus be optimized depending on the size of the -LEDs 1 in such a way that adhesive forces are selected in the correct ratio to lift-off forces. The second release elements 23 rest against the second anchor elements 13 accordingly. Anchor element 13 and release element 23 are also arranged on a module area 11, which is a carrier substrate 3. The main surface area of the module area 11 is greater than or equal to the main surface area of the release element 23.

(445) FIG. 53A shows an embodiment in which a second anchor element 13 forms a smaller main surface area to -LED 1 and is partially connected to -LED 1 in an edge area at one corner of -LED 1. A second release element 23 comprises a larger main surface area than the -LED 1 and is arranged on the -LED 1 in such a way that the second release element 23 at least partially frames the second anchor element 13.

(446) FIG. 53B shows a further embodiment in which two second anchor elements 13 each form a smaller main surface compared to -LED 1 and are arranged in the edge area at opposite corners of the -LEDs 1. A second release element 23 comprises a larger main surface area compared to the -LED and is arranged on the -LED 1 in such a way that the second release element 23 at least partially frames the second anchor elements 13. FIG. 53C shows a further embodiment in which a second anchor element 13 forms a smaller main surface compared to the -LED 1 and is arranged completely on the -LED 1 in a core area of the -LED 1. A second release element 23 completely frames the second anchor element 13.

(447) FIG. 53D finally shows another embodiment in which a plurality of -LEDs 1 are arranged in a row to each other. Two second anchor elements 13 each form a smaller main surface compared to a -LED 1 and are each partially arranged in the edge area at opposite corners of a -LED 1. Each anchor element 13 is arranged on two -LEDs 1 arranged side by side and comprises a surface area uncovered by -LEDs 1. A second release element 23 comprises a larger main surface area than all -LEDs 1 and is arranged on the -LEDs 1 in such a way that the second release element 23 completely frames the second anchor elements 13.

(448) FIG. 53E shows a further embodiment in which twelve second anchor elements 13 together form a smaller main surface than the -LED 1 and are arranged in the interior of the -LEDs 1 in the form of a matrix. A second release element 23 comprises a larger main surface area than the -LED 1 and completely frames the second anchor elements 13. Anchor elements 13 and release element 23 are also arranged on a module area 11, which can alternatively be a wafer 3. The main surface area of the module area 11 is greater than or equal to the main surface area of the release element 23.

(449) FIG. 53F shows a final embodiment in which a second anchor element 13 forms a larger main surface area compared to -LED 1 and in its core area a protrusion which is completely arranged at -LED 1. A second release element 23 comprises a larger main surface area than the -LED 1 and is arranged on the -LED 1 in such a way that the second release element 23 completely frames the elevation of the second anchor element 13 and is arranged on the second anchor element 13. The main surface of the module area 11 is greater than or equal to the main surface of the second anchor element 13. The main surface of the release element 23 corresponds to the main surface of the second anchor element 13.

(450) In the following, various devices and arrangements as well as methods for manufacturing, processing and operating as items are again listed as an example. The following items present different aspects and implementations of the proposed principles and concepts, which can be combined in various ways. Such combinations are not limited to those listed below:

(451) 342. Pixel with several -LEDs for generating a pixel of a display, where the pixel is formed from at least two subpixels, in particular two subpixels of the same color emission, and in particular each subpixel is formed by a -LED; wherein a subpixel separating element is provided between two adjacent subpixels of the same pixel element; and wherein the subpixel separating element is configured to be separating with respect to electrical control of the respective subpixels and is configured to be optically coupling with respect to the light emitted by the respective subpixels.

(452) 343. Pixel according to item 342, wherein the subpixels have a common epitaxial layer and the subpixel separating element extends trench-like into the epitaxial layer transversely to an epitaxial layer plane in a main emission direction.

(453) 344. Pixel according to any of the preceding items, wherein the subpixels of the pixel are independently electrically contactable and/or controllable.

(454) 345. Pixel according to any of the preceding items, in which the at least two sub-pixels have a common active layer separated by the sub-pixel separator.

(455) 346. Pixel according to any of the preceding items, in which the subpixel separator extends to or at least partially through an active layer of the pixel.

(456) 347. Pixel according to any of the preceding items, in which the subpixel separation element is formed by quantum well intermixing generated by a diffused dopant, in particular in the region of the active layer.

(457) 348. Pixel according to any of the preceding items, in which a light-shaping structure is formed having first and second regions, the regions extending at least partially into a semiconductor material of the pixel.

(458) 349. Pixel according to item 348, wherein the light-shaping structure extends into a partial area of the active layer.

(459) 350. Pixel according to any of the preceding items, in which the light-shaping structure has a converter material in second areas.

(460) 351. Pixel according to any of the preceding items with a light-shaping or photonic structure having features according to any of the following or preceding items.

(461) 352. Pixel according to any of the preceding items, further comprising a microlens extending over the surface of a pixel.

(462) 353. Pixel according to any of the preceding items, in which a transparent conductive layer is formed on a surface.

(463) 354. Pixel according to any of the preceding items, wherein at least one contact surface for contacting at least one subpixel is provided on a side opposite to the light emission side.

(464) 355. Display with a large number of pixels according to any of the preceding items, wherein a pixel element separation layer is provided between two adjacent pixels, which is adapted to separate electrically the adjacent pixels with respect to the controlling of the respective pixels and to separate optically the adjacent pixels with respect to the light emitted by the pixels.

(465) 356. Display according to item 355, wherein the pixels and the associated sub-pixels have a common epitaxial layer and the pixel element separation layer extends trench-like into the epitaxial layer transversely to the epitaxial layer plane in the main emission direction.

(466) 357. Display according to any of the preceding items, wherein a trench depth d1 of the pixel element separation layer is greater than a trench depth of the sub-pixel separation element.

(467) 358. Display according to any of the preceding items, in which adjacent pixels or sub-pixels comprise an active layer separated by a pixel element separation layer and/or a sub-pixel separation element.

(468) 359. Display according to any of the preceding items, further comprising a support layer having contact areas corresponding to contact areas of pixels, wherein in the support layer at least one of the following elements is provided: electrically conductive lines to a power supply of the pixel, Current driver circuits or supply circuits, in particular according to any of the items 836 to 930; Control circuit for adjusting a brightness; one or more fuses that are electrically connected to at least one subpixel of a pixel.

(469) 360. Method for calibrating a pixel, comprising the steps of: driving a subpixel of a pixel according to any of the item 836 to 930; acquiring of defect information of a subpixel; storing of the defect information in a memory unit of the control unit.

(470) 361. Method according to item 360, wherein the driving, acquisition and storage is performed sequentially for all individual subpixels of a pixel.

(471) 362. Array with at least two -LEDs, wherein a respective -LED between an n-doped layer and a p-doped layer forms an active zone suitable for light emission, characterized in that between two adjacent formed -LEDs material of the layer sequence from the n-doped side and from the p-doped side up to or in cladding layers or up to or at least partially into the active zone is interrupted or removed in such a way that material transitions with a maximum thickness dC are formed, whereby electrical and/or optical conductivities in the material transition are reduced.

(472) 363. Array according to any of the preceding items, characterized in that, at the material transition, the active zone and, at least on one side of the active zone, a residual layer of small thickness.

(473) 364. Array according to item 362 or 363, characterized in that the removed material is at least partially replaced by a filling material.

(474) 365. Array according to any of the preceding item, characterized in that the removed material is at least partially replaced by a material comprising a relatively small band gap and thus absorbing light of the active zone.

(475) 366. Array according to any of the preceding items, characterized in that the removed material is at least partially replaced by a material with an increased refractive index, in particular greater than the refractive index of the doped material or a filler material.

(476) 367. Array according to any of the preceding items, characterized in that the light absorbing material and/or the material with increased refractive index has been applied to a respective material transition.

(477) 368. Array according to any of the preceding items, characterised in that the material has been formed with an increased refractive index by diffusing or implanting a refractive index-increasing material into the filling material, in particular into a respective cladding layer.

(478) 369. Array according to any of the preceding items, characterised in that a material for increasing light absorption and/or a material for increasing electrical resistance has been diffused or implanted into the active zone of a respective material transition.

(479) 370. Array according to any of the preceding items, characterised in that along the material transitions, at or in these, at least one optical structure, in particular a photonic crystal and/or a Bragg mirror, is generated.

(480) 371. Array according to any of the preceding items, characterised in that an electrical bias voltage is applied to the two main surfaces of the material transitions by means of two opposite electrical contacts and an electrical field is generated by a respective material transition.

(481) 372. Array according to any of the preceding items, characterised in that by means of an n-doped material and/or p-doped material applied or grown on at least one of the two main surfaces of the material transitions, an electric field is generated by a respective material transition.

(482) 373. Array according to any of the preceding items, characterised in that the exposed main surfaces of the material transitions and/or exposed surface regions of the -LED are electrically insulated and passivated by means of a respective passivation layer, in particular comprising silicon dioxide.

(483) 374. Array according to any of the preceding items, characterised in that the main surfaces of the -LED by contact layers are electrically contacted.

(484) 375. Array according to any of the preceding items, characterised in that the material and/or the material transitions between one -LED and its adjacent -LEDs are formed differently from one another, in particular depending on the direction.

(485) 376. Array according to any of the preceding items, further comprising a light-shaping structure which is applied to a surface of the array facing the main emission direction, which in particular has a photonic structure with features according to any one of the following or previous items.

(486) 377. Array according to any of the preceding items, in which the light-shaping structure has areas of different refractive index.

(487) 378. Array according to item 376, in which the light-shaping structure extends into the semiconductor material of the -LED.

(488) 379. Array according to any of items 376 to 378, in which portions of the light-shaping structure are filled with a converter material.

(489) 380. Array according to any of the preceding items, further comprising a converter material applied to a surface facing the main radiation direction.

(490) 381. Method for producing an array of optoelectronic pixels, in particular a micropixel emitter array or a micropixel detector array, comprising the steps: providing a whole-surface layer sequence of an n-doped layer and a p-doped layer along the array, between which an active zone suitable for light emission is formed; at least partially removing of material between adjacent pixels to be formed from the n-doped side and from the p-doped side so that a material transition with a maximum thickness dC remains, which comprises the active zone, such that the electrical and/or optical conductivities between adjacent pixels are reduced.

(491) 382. Method according to item 381, wherein the step of removing material comprises removing the layer sequence from the n-doped side and from the p-doped side up to or into undoped cladding layers or up to or at least partially into the active zone.

(492) 383. Method according to item 381, characterized in that from the n-doped side and/or from the p-doped side the removed material is at least partially replaced by a filler material.

(493) 384. Method according to any of the preceding items, characterised in that the removed material is at least partially replaced from the n-doped side and/or from the p-doped side by a material having a relatively small band gap and thus absorbing light of the active zone.

(494) 385. Method according to any of the preceding items, characterised in that the removed material is replaced from the n-doped side and/or from the p-doped side by a material with an increased refractive index, in particular greater than the refractive index of the doped material or a filler material.

(495) 386. Method according to any of the preceding items, characterised in that the light absorbing material and/or the material with increased refractive index is applied to a respective material transition.

(496) 387. Method according to any of the preceding items, characterised in that the material with increased refractive index is formed by diffusing or implanting a material increasing the refractive index into the filling material, in particular into a respective cladding layer.

(497) 388. Method according to any of the preceding items, characterised in that a material for increasing light absorption and/or a material for increasing electrical resistance is diffused or implanted into the active zone from the n-doped side and/or from the p-doped side.

(498) 389. Method according to any of the preceding items, characterised in that at least one optical structure, in particular a photonic crystal and/or a Bragg mirror, is generated from the n-doped side and/or from the p-doped side along the material transitions, at or in these.

(499) 390. Method according to any of the preceding items, characterized in that two electrical contacts opposite each other are formed from the n-doped side and from the p-doped side for applying an electrical bias voltage to the two main surfaces of the material transitions and for generating an electric field through a respective material transition.

(500) 391. Method according to any of the preceding items, characterised in that by means of an n-doped material and/or p-doped material applied or grown on at least one of the two main surfaces of the material transitions, an electric field is established through a respective material transition.

(501) 392. Method according to any of the preceding items, characterised by electrically insulating and passivating the exposed main surfaces of the material transitions and/or exposed surface areas of the pixels by means of a respective passivation layer, in particular comprising silicon dioxide.

(502) 393. Method according to any of the preceding items, characterised by electrical contacting of the main surfaces of the pixels by means of contact layers.

(503) 394. Method according to any of the preceding items, characterised in that the material and/or the material transitions between a pixel and its neighbouring pixels are formed differently from one another, in particular depending on the direction.

(504) 395. Method according to any of the preceding items, characterised in that the steps are first performed for one major surface of the array and then, after a substrate change, for the other major surface of the array.

(505) 396. Carrier structure with flat optoelectronic components, especially -LEDs, comprising a flat carrier substrate, and at least two receiving elements that are designed to hold a first -LED detachably between the at least two receiving elements in such a way that the -LED can be moved out with a defined minimum force perpendicular to a carrier structural plane; wherein at least one receiving element of the at least two receiving elements is designed to simultaneously hold and/or support a second, adjacently arranged -LED.

(506) 397. Carrier structure according to item 396, wherein the receiving elements are arranged on the support substrate in such a way that the -LED is held by three receiving elements.

(507) 398. Carrier structure according to item 396, wherein at least two receiving elements of the three receiving elements are configured to hold and/or support a further adjacent -LED.

(508) 399. Carrier structure according to one of the items 396 to 398, wherein a delamination layer is provided, which is arranged between the receiving element and the -LED and remains on the receiving element in particular after the -LED has been moved out.

(509) 400. Carrier structure according to any of the preceding items, wherein the receiving elements are arranged in a mesa trench of a semiconductor wafer.

(510) 401. Carrier structure according to any of the preceding items, in which the support substrate and the receiving elements are made in one piece.

(511) 402. Carrier structure according to any of the preceding items, wherein the support elements are configured to hold a -LED laterally and from a bottom side of the -LED.

(512) 403. Carrier structure according to any of the preceding items, wherein the receptacle elements have -LED holding surfaces which are inclined relative to the carrier substrate plane so that a holding force on the -LED is reduced when the -LED is moved away from the receptacle elements.

(513) 404. Carrier structure according to any of the preceding items, wherein at least one of the receiving elements is adapted to receive a lateral corner portion or side surface of a -LED.

(514) 405. Carrier structure according to any of the preceding items, wherein a contact area between the receiving element and -LED is less than 1/20, in particular less than 1/50 of a total area of the -LED.

(515) 406. Carrier structure according to any of the preceding items, in which the first -LED and second -LED partially rest on the at least one receiving element, and between the first and second -LED a part of the surface of the receiving element is exposed or rises between the first and second -LED.

(516) 407. -LED with a semiconductor layer stack which comprises an active layer and which is arranged on a carrier structure according to any of the preceding items.

(517) 408. -LED according to item 407, said -LED comprising a peripheral region formed by the mesa trench, wherein the active layer in said peripheral region has a band gap increased by quantum well intermixing.

(518) 409. -LED according to any of the preceding items, in which an edge region comprises a protuberance, which is arranged on the support structure.

(519) 410. Carrier structure according to any of the preceding items articles containing a -LED, in particular a -LED according to any of the preceding items.

(520) 411. Method for transferring at least two -LEDs, in particular optoelectronic components, wherein the at least two -LEDs are arranged on a common receiving element of a carrier and the carrier comprises a sacrificial layer on which the -LEDs are arranged, comprising the steps: removing of the sacrificial layer on which the -LEDs are arranged, so that the -LEDs are held by the common receiving element; removing at least one of the at least two -LEDs from the common mounting element.

(521) 412. Method for producing a -LED, comprising the steps: providing of a substrate; applying of a sacrificial layer, in particular comprising AlGaAs or InGaAlP, to the substrate; creating a functional layer stack with an active layer between oppositely doped semiconductor layers; applying of a first electrically conductive contact layer on a first major surface side of the functional layer stack; forming at least one holding structure which is attached to the substrate, supports the functional layer stack and from which a contacted functional layer stack can be broken off during lift-off; at least partial removing of the sacrificial layer located between a second major surface side of the functional layer stack and the substrate; applying a second electrically conductive contact layer to the second main surface side of the functional layer stack in the area of the removed sacrificial layer.

(522) 413. Method according to item 412, wherein the step of generating a functional layer stack comprises the step of forming one or more quantum wells or quantum wells in the active layer.

(523) 414. Method according to any of the preceding items, wherein the step of creating a functional layer stack comprises the step of: forming of a quantum well intermixing in edge regions of the active layer and/or in regions, which are at least adjacent to the retaining structure or adjacent to a possible break-off edge.

(524) 415. Method according to item 414, wherein the step of forming a quantum well intermixing comprises: providing a structured photomask on the functional layer stack; applying of a dopant with first process parameters; diffusing and/or formation of quantum well intermixing with second process parameters.

(525) 416. Method according to any of the preceding items, in which the step of creating a functional layer stack comprises the step forming a quantum well intermixing with features according to any of the preceding items.

(526) 417. Method one of the previous articles, further comprising: lifting the contacted functional layer stack by breaking it off the holding structure and positioning it on a secondary substrate.

(527) 418. Method according to any of the preceding items, in which the step of forming the support structure comprises forming of the retaining structure, in particular having a conical shape, on the functional layer stack from its first main surface side into the substrate.

(528) 419. Method according to any of the preceding items, in which the step of applying a first electrically conductive contact layer comprises: application of a first bearing layer to the functional layer stack on its first main surface side; applying of the first electrically conductive contact layer to the first support layer, wherein the first support layer and the first electrically conductive contact layer are attached to the substrate at least at one point and thus form the support structure at least partially.

(529) 420. Method according to any of the preceding items, wherein the step comprises applying a second electrically conductive contact layer: applying a second support layer to the second major surface side of the functional layer stack facing the substrate directly to the functional layer stack; and applying the second electrically conductive contact layer to the second base layer.

(530) 421. Method according to any of the preceding items, in which the structure is formed at least partially epitaxially or by means of steam or electroplating.

(531) 422. Method according to any of the preceding items, in which the structure of the functional layer stack is passivated by means of the retaining structure, whereby the retaining structure can in particular be transparent.

(532) 423. Method according to any of the preceding items, characterised by removing of the sacrificial layer by wet chemical etching.

(533) 424. Method according to any of the preceding items, characterised by removing of the sacrificial layer in two steps, before and after applying the second electrically conductive contact layer.

(534) 425. Method according to any of the preceding items, further comprising: covering one flank of the functional layer stack with a passivation layer.

(535) 426. Method according to any of the preceding items, characterised by diffusing of a metal, in particular Zn, from a flank of the functional layer stack into an outer edge region of the functional layer stack.

(536) 427. Method according to any of the preceding items, characterised by applying of the first and/or the second electrically conductive contact layer by sputtering, vaporizing or electroplating.

(537) 428. -LED or -LED module or array of -LEDs, comprising: a functional layer stack; wherein a first electrically conductive contact layer is applied to a first main surface side of the functional layer stack facing away from a substrate and a second electrically conductive contact layer is applied to a second main surface side of the functional layer stack facing the substrate; wherein the contacted functional layer stack is supported by at least one holding structure which is attached to the substrate and from which the contacted functional layer stack can be broken off during lift-off.

(538) 429. -LED or -LED module or array of -LEDs according to item 428, characterized in that the functional layer stack has an optically active layer between oppositely doped layers, in particular an active layer formed by one or more quantum wells.

(539) 430. -LED or -LED module or array of -LEDs according to any of the preceding items, in which the active layer has an increased band gap in edge regions of the -LED and/or in regions, which are at least adjacent to the holding structure or adjacent to a possible break-off edge.

(540) 431. -LED or -LED module or array of -LEDs according to any of the preceding items, comprising quantum well intermixing in edge regions of the active layer or in regions of the active layer adjacent to the support structure or adjacent to a possible break-off edge.

(541) 432. -LED or -LED module or array of -LEDs according to any of the preceding items, characterized in that the contacted functional layer stack was transferred to a secondary substrate by lifting and positioning.

(542) 433. -LED or -LED module or array of -LEDs according to any of the preceding items characterized in that the substrate comprises GaAs.

(543) 434. -LED or -LED module or array of -LEDs according to any of the preceding items, characterised in that the support structure comprises in particular InGaAlP or AlGaAs or BCB or an oxide, for example SiO.sub.2, or a nitride or a combination of such materials, and/or is in particular electrically non-conductive.

(544) 435. -LED or -LED module or array of -LEDs according to any of the preceding items, characterised in that a first supporting layer comprises, in particular InGaAlP and/or AlGaAs, attached to the functional layer stack on the first main surface side.

(545) 436. -LED or -LED module or array of -LEDs according to any of the preceding items, characterised in that a second supporting layer attached to the functional layer stack on the second main surface side comprises in particular InGaAlP and/or AlGaAs.

(546) 437. -LED or -LED module or array of -LEDs according to any of the preceding items, characterised in that the first and/or the second electrically conductive contact layer comprises ITO or ZnO or a metal and/or in particular are attached to a first and a second supporting layer.

(547) 438. -LED or -LED module or array of -LEDs according to any of the preceding items, characterised in that the -LED is smaller than 70 m, in particular smaller than 50 m or smaller than 20 m or smaller than 10 m.

(548) 439. Method for picking up and placing optoelectronic semiconductor chips, wherein electron-hole pairs are generated in optoelectronic semiconductor chips and an electric dipole field is thereby generated in the vicinity of the respective optoelectronic semiconductor chip, a pick-up tool generates an electric field, and the optoelectronic semiconductor chips are picked up with the pick-up tool during or after the generation of the electron-hole pairs and deposited at predetermined positions.

(549) 440. Method according to item 439, where the optoelectronic semiconductor chips are -LEDs or LEDs.

(550) 441. Method according to item 439 or 440, wherein the optoelectronic semiconductor chips for generating the electron-hole pairs are irradiated with light having a predetermined wavelength or a predetermined wavelength range.

(551) 442. Method according to item 441, wherein the light for generating the electron-hole pairs is incident on the optoelectronic semiconductor chips through the pick-up tool.

(552) 443. Method according to item 442, wherein the optoelectronic semiconductor chips are arranged on a carrier and the light for generating the electron-hole pairs falls through the carrier onto the optoelectronic semiconductor chips.

(553) 444. Method according to any of the preceding items, wherein a plurality of optoelectronic semiconductor chips are provided and the electrical dipole fields are generated only in selected optoelectronic semiconductor chips of the plurality of optoelectronic semiconductor chips.

(554) 445. Method according to any of the preceding items, whereby the pick-up tool generates an electric field only in predetermined areas.

(555) 446. Method according to any of the preceding items, wherein the pick-up tool has a plurality of elevations on a surface facing the optoelectronic semiconductor chips, and the optoelectronic semiconductor chips are picked up by the elevations of the pick-up tool.

(556) 447. Method according to any of the preceding items, wherein at least a portion of a surface of the pick-up tool facing the optoelectronic semiconductor chips is flat, and the optoelectronic semiconductor chips are picked up with the flat portion of the pick-up tool.

(557) 448. Method according to any of the preceding items, wherein the pick-up tool has the shape of a cylinder, which is rolled over the optoelectronic semiconductor chips to pick up the optoelectronic semiconductor chips.

(558) 449. Method according to any of the preceding items, wherein for depositing the optoelectronic semiconductor chips the electric field generated by the pick-up tool is changed.

(559) 450. Method according to any of the preceding items, wherein the pick-up tool for picking up the optoelectronic semiconductor chips directly contacts the optoelectronic semiconductor chips and holds them by means of Van der Waals forces.

(560) 451. Apparatus for picking up and putting down optoelectronic semiconductor chips, -LED arrays or -LED according to any of the preceding or subsequent items, comprising: an excitation element for generating electron-hole pairs in optoelectronic semiconductor chips in order to generate an electric dipole field in the vicinity of the respective optoelectronic semiconductor chip, and a pick-up tool for picking up and depositing the optoelectronic semiconductor chips, wherein the pick-up tool is configured such that it generates an electric field, then picks up the optoelectronic semiconductor chips with the electron-hole pairs generated by the excitation element and deposits the optoelectronic semiconductor chips at predetermined locations.

(561) 452. Apparatus according to item 451, wherein the excitation element is configured to generate light with a predetermined wavelength or a predetermined wavelength range for generating the electron-hole pairs in the optoelectronic semiconductor chips.

(562) 453. Apparatus according to item 452, wherein the excitation element is arranged in such a way that the light for generating the electron-hole pairs is incident on the optoelectronic semiconductor chips through the pick-up tool or through a carrier on which the optoelectronic semiconductor chips are arranged.

(563) 454. Apparatus according to one of the items 451 to 453, wherein the pick-up tool has a plurality of projections on a surface facing the optoelectronic semiconductor chips, and the optoelectronic semiconductor chips are picked up by the projections of the pick-up tool.

(564) 455. Apparatus according to any one of the items 451 to 453, wherein at least a portion of a surface of the pick-up tool facing the optoelectronic semiconductor chips is flat and the optoelectronic semiconductor chips are picked up with the flat portion of the pick-up tool.

(565) 456. Apparatus according to any one of the items 451 to 453, wherein the pick-up tool has the shape of a cylinder, which is rolled over the optoelectronic semiconductor, chips to pick up the optoelectronic semiconductor chips.

(566) 457. Method for processing a number of arrays of optoelectronic components, in particular -LEDs or -LED arrangements, comprising the following steps: generating of -LEDs on a carrier substrate with a first density; executing of first transfer steps by means of a first transfer stamp, which transfers the optoelectronic microchips onto an intermediate carrier of the first density; carrying out second transfer steps by means of a second transfer stamp, which transfers the optoelectronic microchips from the intermediate carrier to a target substrate with a second density smaller by a factor n than the first density, which provides a common array area for a respective one of the number of arrays, in particular for all three colors, wherein the size of the intermediate carrier is equal to or larger than that of the second transfer stamp and the size of the second transfer stamp is equal to or smaller by a factor k than that of the array area.

(567) 458. Method according to item 457, characterized in that the -LEDs are generated connected to respective module areas, which are generated connected to the carrier substrate.

(568) 459. Method according to item 458, characterized in that when the -LEDs are generated, first armature elements for connecting with a first adhesive force are formed between module areas and the carrier substrate and/or second armature elements for connecting with a second adhesive force are formed between the -LEDs and the module areas.

(569) 460. Method according to any of the preceding items, characterised in that when carrying out the first transfer steps, the lifting force of the lifting first transfer stamp is set to be greater than the first adhesive force and less than the second adhesive force in such a way that the module areas are lifted off the carrier substrate and transferred to the intermediate carrier.

(570) 461. Method according to any of the preceding items, characterised in that when carrying out the second transfer steps, the lifting force of the lifting second transfer stamp is set to be greater than the second holding force in such a way that the -LEDs are lifted off the module areas and transferred to the target substrate.

(571) 462. Method according to any of the preceding items, characterised in that when generating the -LEDs, first release elements for connecting with an additional first adhesive force are additionally formed between the module areas and the carrier substrate and/or second release elements for connecting with an additional second adhesive force are additionally formed between the -LEDs and the module areas.

(572) 463. Method according to item 462, characterized in that when carrying out the first transfer steps, the lifting force of the lifting first transfer stamp is set to be greater than the total first adhesive force and less than the total second adhesive force in such a way that the module areas are lifted off the wafer and transferred to the intermediate carrier.

(573) 464. Method according to item 463, characterized in that the additional initial holding force has been reduced, especially to zero, by removing the first release elements beforehand.

(574) 465. Method according to any of the preceding items, characterised in that when carrying out the second transfer steps, the lifting force of the lifting second transfer stamp is set to be greater than the total second holding force in such a way that the -LEDs are lifted off the module areas and transferred to the target substrate.

(575) 466. Method according to item 465, characterized in that the additional second holding force has been reduced, in particular to zero, by means of prior removing the second release elements.

(576) 467. Method according to any of the preceding items, characterized in that for the adhesion of the module areas on the intermediate carrier, materials with a respective adhesive force greater than the total second adhesive force must be used.

(577) 468. Method according to any of the preceding items, characterized in that when generating the -LEDs for carrying out the first transfer steps, lifting elements are formed directly on the module areas for lifting and transferring the module areas to the intermediate carrier.

(578) 469. Method according to any of the preceding items, characterised in that when generating the microchips for carrying out the first transfer steps, positioning elements are formed directly on the module areas for the precise transfer of the module areas to the intermediate carrier.

(579) 470. Method according to any of the preceding items, characterised in that to carry out the second transfer steps, tapping elements are formed on the second transfer die for thinning the microchips to the second density.

(580) 471. Method according to any of the preceding items, characterised in that the size of the, in particular rectangular, first transfer stamp is chosen to be smaller by a factor s than the size of the, in particular round, wafer in such a way that the size of an area of lost -LEDs at the edge of the carrier substrate for the first transfer for complete loading of the intermediate carrier is small, in particular per color less than or equal to 20% or less than or equal to 30% of the carrier substrate area.

(581) 472. Method according to any of the preceding items, characterised in that the size of the, in particular rectangular, first transfer stamp is chosen to be smaller than the size of the intermediate carrier by the factor r in such a way that the number of first transfer steps r for the first transfer for complete loading of the intermediate carrier is small, in particular per color less than or equal to 10 or less than or equal to 50.

(582) 473. Method according to any of the preceding items, characterised in that the shape of the intermediate carrier corresponds to the shape of the second transfer stamp and said shape in particular to the shape of the array surface.

(583) 474. Method according to any of the previous items, characterised in that the intermediate carrier is equipped with tested module areas of the carrier substrate or several, in particular different, carrier substrates.

(584) 475. Method according to any of the preceding items, characterised in that the distances between the -LEDs on the respective carrier substrate correspond to the distances between the -LEDs on the intermediate carrier substrate.

(585) 476. Method according to any of the preceding items, characterised in that the distances between microchip on a respective intermediate carrier and on a respective target substrate in an x-direction are different from those in a y-direction.

(586) 477. Method according to any of the preceding items, characterised in that the target substrate is loaded with several intermediate carriers.

(587) 478. Method according to any of the preceding items, characterised in that the color of the -LEDs of a respective intermediate carrier is monochrome red, green or blue and the number of arrays is formed from three intermediate carriers, which have -LEDs of different colors to each other.

(588) 479. Method according to any of the preceding items, characterised in that between carrier substrate and module areas first release elements and then between -LEDs and module areas second release elements are selectively removed.

(589) 480. Array with a multitude of -LEDs, -LED modules or -LED arrays, which are manufactured in particular for each of the colors red, green and blue by the following steps: generating -LEDs, on a carrier substrate with a first density; executing of first transfer steps by means of a first transfer stamp, which transfers the -LEDs to an intermediate carrier of the first density; carrying out second transfer steps by means of a second transfer stamp which transfers the -LEDs from the intermediate carrier to a target substrate with a second density which is smaller by a factor n than the first density, wherein the intermediate carrier provides a common array area for a respective one of the arrays, in particular for all three colors, wherein the size of the intermediate carrier is equal to or larger than that of the second transfer stamp and the size of the second transfer stamp is equal to or smaller by a factor k than that of the array area.

(590) 481. Array comprising a plurality of -LEDs, -LED modules or -LED arrays manufactured by a process according to any of the preceding items.

(591) 482. Start structure for use in a process according to any of the preceding items, characterized in that module areas are attached to a carrier substrate by means of first anchor elements, and -LEDs are attached to the module areas by means of second armature elements.

(592) 483. Start structure for use in a process according to any of the preceding items, characterised in that module areas are fixed to a carrier substrate by means of first anchor elements and removable first release elements, and -LEDs are attached to the module areas by means of second armature elements and removable second release elements.

(593) 484. Method for producing modules of -LEDs, comprising the steps of: generating at least one layer stack providing a base module on a carrier having a first layer, an active layer applied thereto and a second layer formed thereon; exposing a surface area of the first layer facing away from the substrate; forming a first contact on a surface area of the second layer facing away from the carrier; forming a second contact on the surface area of the first layer facing away from the carrier.

(594) 485. Method according to item 484, characterized in that forming a second contact comprises: forming an electrically insulating dielectric over a portion of the active layer and the second layer forming the second contact with a conductive material, which electrically contacts the remote surface area of the first layer via the dielectric to a surface area of the second layer remote from the carrier.

(595) 486. Method according to item 484 or 485, characterised by exposing the surface region of the first layer remote from the substrate by means of a flat edge structuring of the at least one stack of layers, in particular from the side of the second layer, a flat trench in particular being produced around the respective stack of layers.

(596) 487. Method according to any of the preceding items, characterised by generating a plurality of base modules as a matrix along an X-Y plane along at least one row and along at least one column, wherein base modules of a respective row are oriented in the same way.

(597) 488. Method according to item 487, characterized in that the base modules of two adjacent lines are oriented in the same way; or that the base modules of two adjacent lines are oriented in opposite directions, whereby contacts of the same polarity, in particular first contacts, are thus arranged adjacent to one another.

(598) 489. Method according to item 488, characterised by generating of a common layer stack of two adjacent base modules oriented opposite to each other.

(599) 490. Method according to any of the preceding items, characterised by at least one of the following steps: grouping a number of base modules to form at least one -LED module, in particular rectangular or square along the X-Y plane, wherein, in particular in a plurality of rows, each row has the same columns occupied by base modules; and forming the at least one -LED module from the plurality of base modules by means of a deep edge structuring through the first layer, in particular from the side of the second layer.

(600) 491. Method according to any of the preceding items, characterised in that the base modules are arranged on a different carrier when structuring the deep edges, as opposed to exposing the first and second contacts.

(601) 492. Method according to any of the preceding items, characterised by at least one of the following steps: detaching the base module or -LED module from the carrier Laser Lift-Off; and detaching the base module or -LED module from the carrier, using a mechanical process.

(602) 493. Method according to any of the preceding items, characterised by a contacting the contacts of the -LED module to a replacement carrier or end carrier, especially by means of flip-chip technology.

(603) 494. Method according to item 493, characterized in that common contact areas can be created for contacts of adjacent oppositely oriented base modules of the -LED module.

(604) 495. Method according to any of the preceding items, characterized in that the first layer is n-doped and the second layer is p-doped, the active layer being configured in particular to emit blue or green light; and/or in that the first layer is p-doped and the second layer is n-doped, the active layer being configured in particular to emit red light.

(605) 496. Method according to any of the preceding items, characterized in that the at least one layer stack is created by epitaxy; and/or in that exposure and/or grouping is performed by means of etching.

(606) 497. Method according to any of the preceding items, further comprising a generating of quantum well intermixing in areas of the active layer adjacent to a deep edge structuring.

(607) 498. -LED module comprising at least one layer stack forming a base module, with a first layer formed on a carrier, an active layer and a second layer, wherein a first contact is formed in or on a surface region of the second layer facing away from the carrier, and a second contact is formed in or on the surface region of the first layer facing away from the carrier, and the first and second contact are spaced apart from one another.

(608) 499. -LED module according to item 498, in which a light-emitting surface is formed on a side of the stack of layers facing away from the first and second contact.

(609) 500. -LED module according to item 498, characterized in that the second contact is formed by means of a dielectric to the transition layer and to the second layer electrically insulated from and on the surface region of the second layer remote from the carrier.

(610) 501. -LED module according to item 499, characterized in that the -LED module comprises a plurality of base modules arranged in a matrix of at least one row and at least one column.

(611) 502. -LED module according to item 501, in which a -LED adjacent to the -LED module is separated by a deep edge structuring.

(612) 503. -LED module according to item 502, in which regions of the active layer which run adjacent to a deep edge structure have an elevated band structure produced in particular by quantum well intermixing.

(613) 504. -LED module according to any of the preceding items, characterized in that the base modules of two adjacent lines are oriented in opposite directions so that contacts of the same polarity, in particular first contacts, are arranged adjacent to each other.

(614) 505. -LED module according to any of the preceding items, characterised in that the module, in particular a light-emitting diode module, has been produced by means of a process according to any of the preceding items.

(615) 506. -display or -LED display module with an all-surface target matrix formed on a first carrier, which has rows and columns of -LEDs, occupy-able locations, one or more -LED modules following one of the items 498 to 505 comprising one or more base modules whose size corresponds to the vacant positions;
characterised in that the -LED modules are positioned and electrically connected to the first carrier in the target matrix in such a way that a number of base modules remain unoccupied in the target matrix, at least some of which each have at least one sensor element positioned and electrically connected.

(616) 507. -display or -LED display module according to item 506, characterized in that a plurality of full-surface target matrices formed on the first carrier and of equal or different size to one another are formed along rows and columns with target matrix-occupy-able locations at respective distances from one another.

(617) 508. -display or -LED display module according to item 506 or 507, characterized in that the base modules form rectangles in a matrix plane, and in -LED modules any number of base modules adjacent to each other along a common side are grouped together.

(618) 509. -display or -LED display module according to any of the preceding items, characterized in that at least one -LED module comprises four base modules in two rows and two columns.

(619) 510. -display or -LED display module according to any of the preceding items, characterized in that at least one -LED module comprises three base modules in two rows and two columns.

(620) 511. -display or -LED display module according to any of the preceding items, characterized in that at least seven -LED modules, each with four base modules, and at least two -LED modules, each with three base modules, are positioned and electrically connected to the target matrix.

(621) 512. -display or -LED display module according to item 511, characterized in that in that at least two positions which are unoccupied by base modules are produced, at which in each case at least one sensor element is positioned and electrically connected.

(622) 513. -display or -LED display module according to item 512, characterized in that the positions occupied by sensor elements are framed by base modules.

(623) 514. -display or -LED display module according to any of the preceding items, characterized in that the base modules are configured to emit electromagnetic radiation from a first side of the first carrier.

(624) 515. -display or -LED display module according to any of the preceding items, characterized in that the -LED modules comprise base modules, which are configured as subpixels.

(625) 516. -display or -LED display module according to any of the preceding items, characterized in that the locations of the target matrices are configured as subpixels of a pixel.

(626) 517. -display or -LED display module according to any of the preceding items, characterized in that a plurality of sensor elements are formed as part of sensor means formed on said first carrier to receive electromagnetic radiation incident on a first side of said first carrier.

(627) 518. -display or -LED display module according to any of the preceding items, characterized in that at least one sensor element is configured as a vital sign monitoring sensor.

(628) 519. -display or -LED display module according to item 519, where said vital sign monitoring sensor is disposed within a display screen or behind the rear surface of a display screen, and said vital sign monitoring sensor is adapted to measure one or more vital sign parameters of a user placing a body part to the front major surface of the display screen at said vital sign monitoring sensor.

(629) 520. -display or -LED display module according to any of the preceding items, characterized in that a base module comprises in each case a first layer, which is formed on a second carrier and on which an active transition layer is formed and on which a second layer is formed, a first contact being connected to a surface region of the second layer which faces away from the second support, a second contact being connected to a surface region of the first layer which faces away from the second support.

(630) 521. -display or -LED display module according to item 520, in which the second contact is formed by means of a dielectric to the transition layer and to the second layer, electrically insulated from and on the surface region of the second layer remote from the second carrier.

(631) 522. -display or -LED display module according to any of the preceding items, characterized in that the respective sensor element is adapted in the form of a -photodiode, or in the form of a phototransistor, or in the form of a photoconductor, or in the form of an ambient light sensor, or in the form of an infrared sensor, or in the form of an ultraviolet sensor, or in the form of a proximity sensor, or in the form of an infrared component.

(632) 523. Method for producing a -display or -LED display module with a whole-surface target matrix formed on a first carrier and having rows and columns of target matrixes which can be occupied by base modules, wherein a number of base modules are formed on a second carrier in a starting matrix having a spacing, equal to the target matrix, of points which can be occupied by base modules, in particular by means of a flat mesa etching, are grouped there, in particular by means of a deep mesa etching, to form a number of -LED modules and these -LED modules are separated from the second carrier, in particular by means of laser lift-off or a mechanical or chemical process,
characterised in that the -LED modules are positioned and electrically connected on the first carrier in the target matrix in such a way that a number of base modules remain unoccupied in the target matrix, at least some of which at least one sensor element in each case is positioned and electrically connected.

(633) 524. Method according to item 523, characterized in that a plurality of full-surface target matrices of identical or different sizes formed on the first carrier are formed along rows and columns with target matrix-occupy-able locations at respective distances from one another.

(634) 525. Method according to any of the preceding items, characterised in that the base modules form rectangles in a matrix plane, and in -LED modules any number of base modules adjacent to each other along a common side can be grouped together.

(635) 526. Method according to any of the preceding items, wherein in at least one -LED module four base modules can be grouped in two rows and two columns.

(636) 527. Method according to any of the preceding items, wherein in at least one -LED module three base modules can be grouped in two rows and two columns.

(637) 528. Method according to any of the preceding items, characterised in that at least seven -LED modules, each with four base modules, and at least two -LED modules, each with three base modules, are positioned and electrically connected to the target matrix in such a way that at least two positions which are unoccupied by base modules are generated at which in each case at least one sensor element is positioned and electrically connected.

(638) 529. Method according to any of the preceding items, wherein the positions occupied by sensor elements are framed by base modules.

(639) 530. Method according to any of the preceding items, wherein the base modules are configured to emit electromagnetic radiation from a first side of the first carrier.

(640) 531. Method according to any of the preceding items, characterised in that a plurality of sensor elements are formed as part of sensor means formed on said first carrier to receive electromagnetic radiation incident on a first side of said first carrier.

(641) 532. Method according to any of the preceding items, characterised in that a sensor element is configured as a vital sign monitoring sensor.

(642) 533. Method according to item 532, characterised in that said vital sign monitoring sensor is disposed within a display screen or behind the rear surface of a display screen, wherein said vital sign monitoring sensor is adapted to measure one or more vital sign parameters of a user who places a body part to the front major surface of the display screen at said vital sign monitoring sensor.

(643) 534. Method according to any of the preceding items, characterised in that a base module has in each case a first layer formed on a second carrier, on which an active transition layer and on said active transition layer a second layer is formed, a first contact being connected to a surface region of the second layer facing away from the support, a second contact being connected to a surface region of the first layer facing away from the second support.

(644) 535. Method according to item 534, characterized in that the second contact is formed by means of a dielectric to the transition layer and to the second layer, electrically insulated from and on the surface region of the second layer remote from the second carrier.

(645) 536. Method according to any of the preceding items, characterised in that a sensor element is formed in each case in the form of a micro-photodiode, or in the form of a phototransistor, or in the form of a photo-resistor, or in the form of an ambient light sensor, or in the form of an infrared sensor, or in the form of an ultraviolet sensor, or in the form of a proximity sensor, or in the form of an infrared component.

(646) 537. -LED module comprising: a body with a first major surface and four lateral surfaces; at least three contact pads arranged on the first main surface, wherein a -LED with an edge length of 15 m or less is arranged on at least one of the at least three contact pads; a plurality of contact bars, one contact bar being electrically connected to one of the at least three contact pads in each case, and the three contact bars being arranged on the first main surface and at least one of the four side surfaces.

(647) 538. -LED module according to item 537, further comprising: a fourth contact bar arranged on a second of the four side faces and which is connected on the first major surface to a fourth contact pad electrically connected to the at least one -LED; or is electrically connected on the first main surface to an optically transparent contact pad which electrically connects the at least one -LED on a side opposite the at least one of the three contact pads.

(648) 539. -LED module according to item 537, in which the second side surface of the four side surfaces has only the fourth contact bar.

(649) 540. -LED module according to any of the preceding items, where at least two of the three contact bars are arranged on different side surfaces.

(650) 541. -LED module according to any of the preceding items, in which the body forms a prismatic body in which the first major surface forms an angle of 90 or more with each of the four lateral surfaces.

(651) 542. -LED module according to any of the preceding items, further comprising: a second major surface substantially opposite the first major surface; wherein the second main surface has a larger area than the area of the first main surface.

(652) 543. -LED module according to any of the preceding items, where the side surfaces are not perpendicular to the first main surface.

(653) 544. -LED module according to any of the preceding items, further comprising: a second main surface opposite the first main surface; at least three contact pads arranged on the second main surface and connected to one of the at least three contact bars on at least one of the four side surfaces.

(654) 545. -LED module according to any of the preceding items, in which the contact bars and/or the contact pads comprise a metal tab, in particular a vapour-deposited metal tab, the thickness of which is less than 5 m, in particular less than 2 m.

(655) 546. -LED module according to any of the preceding items, the body comprising at least one through hole at least partially filled with an electrically conductive material, wherein the electrically conductive material on the first main surface is connected to one of the at least three contact pads arranged on the first main surface.

(656) 547. -LED module according to any of the preceding items, in which the body comprises a recess on the second main surface in which at least one contact bar runs, which connects a contact pad on the second main surface to a through-hole and at least one optoelectronic component arranged on the first main surface is connected to the through-hole.

(657) 548. -LED module according to any of the preceding items, in which the body comprises silicon and/or has a thickness of less than 30 m, in particular in the range 5 to 15 m.

(658) 549. -LED module according to any of the preceding items, in which the contact bars each run along one corner of two side surfaces from the first main surface to the second main surface.

(659) 550. Method for producing -LED module, comprising the steps: providing a structured membrane wafer having a plurality of substantially V-shaped trench-shaped depressions such that a first major surface of the structured membrane wafer bounded by trenches forms an angle of 90 or greater with the edges of the trenches; producing of contact pads on the first main surface of the membrane wafer, including optional rewiring applying of at least one -LED; applying of a temporary support facing the first main surface; Etching back the membrane wafer to around or just before the trenches; applying of rear contacts and optional separation to form a -LED module.

(660) 551. Method for producing a pixel array comprising the steps of: providing a substrate for the field-like arrangement of pixels on the substrate and for electrical contacting of the pixels, said substrate providing a set of primary contacts for a pixel, said set of primary contacts being for electrically contacting a group of -LEDs of said pixel, said substrate also providing a set of spare contacts for said pixel, equipping the primary contacts of the pixel with the group of -LEDs, whereby the set of replacement contacts of the pixel is not equipped, identifying a faulty -LED or a faulty contact in the group of -LEDs, and equipping one spare contact of the set of spare contacts of the pixel with a spare -LED for the faulty -LED or the faulty contacting.

(661) 552. Method according to item 551, characterized in that the steps of identifying a defective -LED in the group of -LEDs and providing a replacement contact with a replacement -LED for the identified -LED are repeated until a replacement -LED is present in the pixel for each -LED identified as defective.

(662) 553. Method according to any of the preceding items, characterised in that a -LED identified as faulty is not removed.

(663) 554. Method according to any of the preceding items, characterised in that a -LED identified as defective and the replacement -LED are intended to emit light of the same color.

(664) 555. Method according to any of the preceding items, characterised in that the group of -LEDs comprises one or more sets of RGB -LEDs.

(665) 556. Method according to any of the preceding items, characterised in that no replacement contact of the pixel is equipped with a replacement -LED, if no faulty -LED is found in the pixel.

(666) 557. Method according to any of the preceding items, characterised in that the primary contacts and/or the replacement contacts are configured for contacting the -LED or the replacement -LEDs on the anode side or on the cathode side or both on the anode and cathode side.

(667) 558. Method according to any of the preceding items, characterised in that a -LED or a replacement -LED is a -LED or a -LED module or a base module according to features according to any of the preceding items.

(668) 559. Method according to any of the preceding items, characterised in that an electrical contact for an identified, faulty -LED is disconnected.

(669) 560. Method according to any of the preceding items, characterised in that the replacement contact is equipped with a replacement -LED for a -LED identified as faulty, irrespective of the color of the light emitted by the replacement -LED.

(670) 561. Method according to any of the preceding items, characterised in that all primary contacts of the pixel are equipped with -LEDs.

(671) 562. Pixel field, with: a substrate for field-like arrangement of pixels on the substrate and for electrical contacting of the pixels, the substrate providing a set of primary contacts for at least one pixel, the set of primary contacts of the pixel being adapted for electrical contacting of a group of -LEDs, the substrate also providing a set of spare contacts for the at least one pixel, wherein the primary contacts of the pixel are equipped with the group of -LEDs, wherein the group of -LEDs comprises a faulty, deactivated -LED, and wherein one spare contact of said set of spare contacts of said pixel is equipped with a spare -LED as a replacement for said faulty, deactivated -LED.

(672) 563. Pixel field according to item 562, characterised in that the number of occupied spare contacts is different for at least two pixels.

(673) 564. -display comprising a pixel array according to any of the preceding items or a pixel array produced by a process according to any of the preceding items.

(674) The description with the help of the exemplary embodiments does not limit the various embodiments shown in the examples to these. Rather, the disclosure depicts several aspects, which can be combined with each other and also with each other. Aspects that relate to processes, for example, can thus also be combined with aspects where light extraction is the main focus. This is also made clear by the various objects shown above.

(675) The invention thus comprises any features and also any combination of features, including in particular any combination of features in the subject-matter and claims, even if that feature or combination is not explicitly specified in the exemplary embodiments.