Device for providing a bandgap voltage reference

Abstract

A device for providing a bandgap voltage reference. The device comprises a first switching circuit for providing a first temperature voltage which behaves proportionally to a present temperature, wherein the first switching circuit has two parallel current paths, first and second diode elements being respectively arranged in first and second current paths of the parallel current paths, a second switching circuit for providing a second temperature voltage which behaves in a complementary manner relative to the present temperature, a control circuit which is designed to control a voltage difference between the parallel current paths of the first switching circuit, and a current-bias circuit which is designed to control a ratio of a flow of current through the first diode element to a flow of current through the second diode element, the current-bias circuit comprising a calibration circuit which sets the ratio to a target value.

Claims

1. A device for providing a bandgap voltage reference, comprising: a first switching circuit configured to provide a first temperature voltage which behaves proportionally to a present temperature, wherein the first switching circuit has two parallel current paths, wherein a first diode element is arranged in a first current path of the parallel current paths, and a second diode element is arranged in a second current path of the parallel current paths; a second switching circuit configured to provide a second temperature voltage which behaves in a complementary manner relative to the present temperature; and a current-bias circuit configured to control a ratio of a flow of current through the first diode to a flow of current through the second diode, the current-bias circuit including a calibration circuit which sets the ratio to a target value, wherein the current-bias circuit includes a number of internal current paths, and the current-bias circuit is configured to respectively provide, in successive cycles: a flow of current through the first diode element of the first switching circuit using a number x of the internal current paths; and a flow of current through the second diode element of the first switching circuit using a number y of the internal current paths.

2. The device as recited in claim 1, wherein, in the successive cycles, different combinations of the internal current paths are respectively assigned to the number x and the number y, and wherein the ratio of the flow of current corresponds to a value corresponding to the ratio of the number x in relation to the number y.

3. The device as recited in claim 2, wherein the number of the internal current paths of the current-bias circuit is greater than the number x plus the number y, and the calibration circuit is configured to calibrate, in a cycle, respectively one of the internal current paths to a target value that is assigned to neither the number x nor the number y in the cycle.

4. The device as recited in claim 3, wherein the target value corresponds to a reference current provided by a reference current source.

5. The device as recited in claim 2, wherein each of the internal current paths includes an associated internal current source.

6. The device as recited in claim 2, wherein, when respectively assigning different combinations of the internal current paths to the number x and the number y in successive cycles, the internal current paths are assigned to the number x or the number y according to a rotation principle or a random principle.

7. The device as recited in claim 1, further comprising: a control circuit configured to control a voltage difference between the parallel current paths of the first switching circuit.

8. The device as recited in claim 7, wherein the control circuit regulates the voltage difference to a target value of 0 V.

9. The device as recited in claim 7, wherein the characterized in that the control circuit includes a control element and an amplifier, wherein the amplifier is coupled to the first switching circuit in such a way that the voltage difference is applied to input contacts of the amplifier, and wherein the control element is configured to control, based on an output voltage of the amplifier, an amount of currents flowing through the current-bias circuit.

10. The device as recited in claim 1, wherein a resistor is arranged in one of the parallel current paths and one of the parallel current paths includes the second switching circuit.

11. The device as recited in claim 1, wherein the first diode element and/or the second diode element is: (i) a diode, or (ii) a transistor in a diode circuit, wherein in the diode circuit, a diode is simulated by a transistor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Exemplary embodiments of the present invention are described in detail below with reference to the figures.

(2) FIG. 1 shows a schematic diagram of a device for providing a bandgap voltage reference according to one example embodiment of the present invention.

(3) FIG. 2 shows a schematic illustration of a mode of operation of the current-bias circuit, according to an example embodiment of the present invention.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

(4) FIG. 1 shows a schematic diagram of a device 10 for providing a bandgap voltage reference. In particular, FIG. 1 shows a part of the circuit through which a first temperature voltage PTAT and a second temperature voltage CTAT are provided. The device 10 optionally comprises further components, by which the first temperature voltage PTAT and the second temperature voltage CTAT, which form the voltage reference, are combined to form a reference voltage.

(5) The device 10 comprises a first switching circuit 20, a second switching circuit 30, a control circuit 40 and a current-bias circuit 50.

(6) The first switching circuit 20 is designed to generate and provide the first temperature voltage PTAT. The first temperature voltage PTAT is a voltage which behaves proportionally to a present temperature. This means that with increasing present temperature, the first switching circuit 20 outputs a higher first temperature voltage PTAT.

(7) The first switching circuit 20 comprises two parallel current paths 21, 22. A first diode element 23 is arranged in a first current path 21 of the parallel current paths 21, 22. A second diode element 24 and a resistor 25 are arranged in a second current path 22 of the parallel current paths 21, 22. The first diode element 23 and the second diode element 24 are each provided by a bipolar transistor, which is connected in diode operation. The first diode element 23 and the second diode element 24 are coupled via a respective first side to a supply voltage VDD. Thus, in particular, a base and a collector of the transistors forming the diode elements 23, 24 are respectively coupled to the supply voltage VDD. In the first current path 21, a second side of the first diode element 23, i.e., the emitter of the transistor of the first diode element 23, is coupled to a first input of the current-bias circuit 50. In the second current path 22, a second side of the second diode element 24, i.e., the emitter of the transistor of the second diode element 24, is coupled via the resistor 25 to a second input of the current-bias circuit 50.

(8) In order for the first switching circuit 20 to provide the first temperature position PTAT, it is necessary that a ratio between a current flowing through the first current path 21 in relation to a current flowing through the second current path 22 is known. This is achieved by the current-bias circuit 50, which is designed to control the ratio of flow of current through the first diode element 23 to the flow of current through the second diode element 24. For example, n times the current is conducted through the first current path 21 than is conducted through the second current path 22 and thus through the second diode element 24. The ratio is thus, for example, n:1.

(9) The current-bias circuit 50 comprises a number of internal current paths 51-59. In this case, the current-bias circuit 50 is designed to respectively assign, in successive cycles, a number X of the internal current paths 51-59 to the first current path 21 and a number Y of the internal current paths 51-59 to the second current path 22. Each of the internal current paths 51-59 of the current-bias circuit 50 comprises an internal current source. It is desirable that each of the internal current sources, and thus each of the internal current paths 51-59, provides the same current. However, structural or age-related deviations may occur. A ratio of the number of internal current paths 51-59 assigned to the first current path 21 in relation to the number of internal current paths 51-59 assigned to the second current path 22 results in the ratio of the flow of current through the first diode element 23 to the flow of current through the second diode element 24. Thus, in this embodiment, the number X is equal to the number n and the number Y is equal to 1. The following thus applies: X/Y=n/1.

(10) The current-bias circuit 50 comprises a switching matrix 70, which connects the first current path 21 via X, in particular n, of the internal current paths 51-59 to a circuit ground and connects the second current path 22 via Y, in particular one, of the internal current paths 51-59 to a circuit ground. The internal current sources 41 are arranged on an output side of the switching matrix 70, wherein the number of internal current sources 41 corresponds to the number of internal current paths 51-59 of the current-bias circuit 50.

(11) If the selected ratio is, for example, 7:1, a number of 7 of the internal current paths 51-59 is respectively assigned to the first current path 21 and one of the internal current paths 51-59 is assigned to the second current path 22. Consequently, 7 times the current flows through the first current path 21 and thus through the first diode element 23 than the current flowing through the second current path 22 and through the second diode element 24.

(12) In successive cycles, different combinations of the internal current paths 51-59 are respectively assigned to the number X and the number Y. Thus, X of the internal current sources are respectively assigned to the first current path 21 by the current-bias circuit 50, wherein the same internal current paths 51-59 are not always assigned to the first current path 21. This applies accordingly to the second current path 22, to which the same internal current path of the internal current paths 51-59 is not always assigned. With each cycle, other internal current paths 51-59 are assigned to the first current path 21 or to the second current path 22. In so doing, the internal current paths 51-59 are preferably assigned to the number X or to the number Y, and thus to the first current path 21 or to the second current path 22, according to the rotation principle or the random principle.

(13) FIG. 2 by way of example shows a number of internal current paths 51-59 of the current-bias circuit 50. Thus, FIG. 2 shows a first current path 51, a second current path 52, a third current path 53, a fourth current path 54, a fifth current path 55, a sixth current path 56, a seventh current path 57, an eighth current path 58, and a ninth current path 59. Each of the current paths 51-59 comprises exactly one internal current source of the internal current sources 41.

(14) FIG. 2 shows an exemplary cycle. The first to seventh internal current paths 51-57 are assigned to the number X, and thus to the first current path 21. Furthermore, the eighth current path 58 is assigned to the number Y, and thus to the second current path 22. The internal current paths associated with the number X are connected in parallel. Thus, in the cycle shown in FIG. 2, seven times the current flows through the first current path 21 than through the second current path 22. In a subsequent cycle, other ones of the internal current paths 51-59 are assigned to the number X. For example, the second to eighth current paths 52-58 are assigned to the number X, and thus to the first current path 21, and the ninth internal current path 59 is assigned to the number Y, and thus to the second current path 22.

(15) However, in the successive cycles, the ratio of the internal current paths assigned to the number X in relation to the number of current paths assigned to the number Y is maintained.

(16) If the current sources in the internal current paths 51-59 were identical in such a way that they would provide exactly the same current, the ratio of X:Y, and thus the ratio of the current through the first current path 21 to the current in the second current path 22, would be exactly 7:1. However, differences may occur between the currents provided by the individual current sources in the internal current paths 51-59 due to aging of the current-bias circuit 50 or due to temperature-related variations. The current-bias circuit 50 therefore comprises a calibration circuit 60 which sets the ratio to a target value. This takes place in that the number of the internal current paths 51-59 of the current-bias circuit 50 is greater than the number X plus the number Y, and the calibration circuit is designed to calibrate, in a cycle, respectively one of the internal current paths 51-59 to a target value, wherein the internal current path to be calibrated is assigned to neither the number X nor the number Y in this cycle. For example, it can be seen in FIG. 2 that in the cycle shown, the ninth internal current path 59 is assigned neither to the number X nor the number Y. The ninth internal current path 59, which comprises an associated internal current source, is calibrated in this cycle. In so doing, the internal current source of the ninth internal current path 59 is set in such a way that the current provided by this current source corresponds to a reference current I.sub.ref, which is provided by a reference current source 61. In successive cycles, each of the internal current sources of the individual internal current paths 51-59 is set such that the current provided by the respective internal current source corresponds to the reference current I.sub.ref. It is thus achieved that the same current is provided by each of the internal current paths 51-59. Thus, it is achieved that the ratio of the currents provided by the current-bias circuit 50 for the first current path 21 and for the second current path 22 also corresponds to the ratio between the number of the internal current paths of the current-bias circuit 50 assigned to the parallel current paths 21, 22.

(17) In a corresponding manner, it can be seen in FIG. 1 that in each case, one of the internal current paths 51-59 is coupled to the calibration circuit 60, which provides the reference current I.sub.ref, n of the internal current paths 51-59 are coupled to the first current path 21, and one of the internal current paths 51-59 is coupled to the second current path 22. The circuit shown in FIG. 1 therefore has n+2 internal current paths, wherein exactly one internal current source of the internal current sources 41 is associated with each of the internal current paths. In so doing, the switching matrix 70 preferably respectively assigns n of the internal current paths 51-59 to the first current path 21, one of the internal current paths 51-59 to the first current path 22, and one of the internal current paths 51-59 to the calibration circuit 60 for calibration.

(18) The control circuit 40 comprises an operational amplifier 42 and a control element 41. The control element 41 in the described embodiment is formed by the internal current sources 43 which are controllable current sources. The operational amplifier 42 is connected via a non-inverting input to the second input of the current-bias circuit 50 and thus also to the second current path 22. An inverting input of the operational amplifier 42 is connected to the first input of the current-bias circuit 50, and thus to the first current path 21. The control circuit 40 controls the internal current sources 43 in the same manner and sets the total current flowing through the current-bias circuit 50. The control circuit 40 does not change the ratio between the flow of current through the first current path 21 in relation to the flow of current in the second current path 22 since this ratio is defined by the numerical ratio of the internal current paths 51-59 assigned to the first current path 21 and to the second current path 22 by the switching matrix 70. Since a different current flows through the first current path 21 and through the second current path 22, the control circuit 40 adjusts a voltage difference between the first current path 21 and the second current path 22 since this voltage difference depends on the total current flowing through the current-bias circuit 50. This voltage difference is regulated to a target value of 0 V. The first switching circuit 20 is thus adjusted to a predetermined operating point at which the former provides the first temperature voltage PTAT.

(19) The second switching circuit 30 for providing the second temperature voltage CTAT is formed by the second diode element 24. The second temperature voltage CTAT behaves in a complementary manner relative to the present temperature. This means that the second temperature voltage CTAT decreases with increasing temperature voltage.

(20) The first temperature voltage PTAT can thus be tapped via the resistor 25 or can be tapped between the first current path 21 and the second current path 22. The second temperature voltage can be tapped via the second diode element 24.

(21) In addition to the above disclosure, reference is explicitly made to the disclosure of FIGS. 1 and 2.