Light-emitting semiconductor chip

Abstract

A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.

Claims

1. A semiconductor chip comprising: a semiconductor body with a semiconductor layer sequence, the semiconductor layer sequence comprising an n-conductive multilayer structure, a p-conductive semiconductor layer, and an active region provided for generating radiation; and a contact layer; wherein the n-conductive multilayer structure has a doping profile comprising at least one doping peak; wherein the semiconductor body has a recess that extends through the p-conductive semiconductor layer and the active region into the n-conductive multilayer structure; wherein the recess penetrates the at least one doping peak; and wherein the contact layer is disposed in the recess and electrically contacts the n-conductive multilayer structure.

2. The semiconductor chip according to claim 1, wherein a doping concentration in the at least one doping peak is at least five times as high as a doping concentration in a region of low n-conductive doping of the n-conductive multilayer structure.

3. The semiconductor chip according to claim 2, wherein the doping concentration in the at least one doping peak is at least 4*10.sup.18 cm.sup.3 and wherein the doping concentration in the region of low n-conductive doping is at most 8*10.sup.17 cm.sup.3.

4. The semiconductor chip according to claim 1, wherein the at least one doping peak has a vertical extent that is between 1 nm and 30 nm, inclusive.

5. The semiconductor chip according to claim 4, wherein the at least one doping peak has a vertical extent that is between 5 nm and 20 nm, inclusive.

6. The semiconductor chip according to claim 1, wherein the at least one doping peak has a distance from the active region that is between 2 nm and 20 nm, inclusive.

7. The semiconductor chip according to claim 1, wherein the n-conductive multilayer structure comprises a quantum structure with a first plurality of quantum layers.

8. The semiconductor chip according to claim 7, wherein the active region comprises a second plurality of quantum layers, wherein the at least doping peak is arranged between a first quantum layer of the first plurality of quantum layers of the n-conductive multilayer structure that is closest to the active region and a second quantum layer of the second plurality of quantum layers of the active region that is closest to the n-conductive multilayer structure.

9. The semiconductor chip according to claim 8, wherein a band gap of at least one quantum layer of the first plurality of quantum layers of the n-conductive multilayer structure is at least as large as a band gap of at least one quantum layer of the second plurality of quantum layers of the active region.

10. The semiconductor chip according to claim 7, wherein the doping profile comprises a first doping peak and a second doping peak, wherein at least one quantum layer of the first plurality of quantum layers of the n-conductive multilayer structure is arranged between the first doping peak and the second doping peak.

11. The semiconductor chip according to claim 10, wherein a sub-region of the quantum structure of the n-conductive multilayer structure comprises a high doping concentration by way of the second doping peak.

12. The semiconductor chip according to claim 1, wherein the n-conductive multilayer structure comprises a plurality of quantum layers; and wherein the recess penetrates the plurality of quantum layers of the n-conductive multilayer structure.

13. The semiconductor chip according to claim 1, wherein the active region is based on a nitride compound semiconductor material.

14. The semiconductor chip according to claim 1, wherein a crystal structure of the n-conductive multilayer structure comprises V-shaped indentations.

15. The semiconductor chip according to claim 1, wherein a growth substrate for the semiconductor layer sequence is removed from the semiconductor body.

16. A semiconductor chip comprising: a semiconductor body with a semiconductor layer sequence, the semiconductor layer sequence comprising an n-conductive multilayer structure; and a contact layer; wherein the n-conductive multilayer structure has a doping profile comprising at least one doping peak; wherein the semiconductor body has a recess that penetrates the doping peak; and wherein the contact layer in the recess electrically contacts the n-conductive multilayer structure.

17. The semiconductor chip according to claim 16, wherein the semiconductor layer sequence further comprises a p-conductive semiconductor layer and an active region provided for generating radiation, the recess extending through the p-conductive semiconductor layer and the active region.

18. A semiconductor chip comprising: a semiconductor body with a semiconductor layer sequence, the semiconductor layer sequence comprising an n-conductive multilayer structure and an active region provided for generating radiation; a carrier, the semiconductor body being arranged on the carrier; and a contact layer; wherein the n-conductive multilayer structure has a doping profile comprising at least one doping peak; wherein the n-conductive multilayer structure is arranged on a side of the active region remote from the carrier; wherein the semiconductor body has a recess that penetrates the doping peak; and wherein the contact layer is arranged in regions between the carrier and the semiconductor body and electrically contacts the n-conductive multilayer structure.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Further features, configurations and convenient aspects are revealed by the following description of the exemplary embodiments in conjunction with the figures, in which:

(2) FIG. 1A is a schematic sectional view of an exemplary embodiment of a semiconductor body with a semiconductor layer sequence,

(3) FIG. 1B shows schematic representations of a conduction band edge profile E.sub.C and a doping profile in each case in a deposition direction z for a portion of a semiconductor body according to a second exemplary embodiment,

(4) FIG. 2 is a schematic sectional view of a first exemplary embodiment of a semiconductor chip,

(5) FIG. 3 is a schematic sectional view of a second exemplary embodiment of a semiconductor chip, and

(6) FIG. 4 shows the result of measurement of a current I as a function of a voltage U applied in the reverse direction.

(7) Identical, similar or identically acting elements are provided with identical reference numerals in the figures.

(8) The figures are in each case schematic representations and are therefore not necessarily true to scale. Rather, comparatively small elements and in particular layer thicknesses may be illustrated on an exaggeratedly large scale for clarification.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

(9) A first exemplary embodiment of a semiconductor body for a semiconductor chip is illustrated schematically in sectional view in FIG. 1A. The semiconductor body 2 comprises a semiconductor layer sequence which forms the semiconductor body. The semiconductor layer sequence comprises an active region 20 intended for generating radiation, which is arranged between an n-conductive multilayer structure 21 and a p-conductive semiconductor layer 22. The semiconductor layer sequence of the semiconductor body is preferably deposited epitaxially, in particular by MBE or MOCVD, on a growth substrate 29. Examples of materials suitable as a growth substrate for a semiconductor body based on a nitride compound semiconductor material are sapphire, silicon carbide, silicon or gallium nitride. A buffer layer may be formed between the n-conductive multilayer structure 21 and the growth substrate, which buffer layer may in particular be provided to enhance crystal quality (not shown explicitly).

(10) The active region 20 comprises a quantum structure which is formed by a plurality of quantum layers 201 and a plurality of barrier layers 202 arranged between the quantum layers. The active region here comprises, merely by way of example, a quantum structure with three quantum layers. In contrast thereto, however, another number of quantum layers, for example just one or two quantum layers or more than three, for instance up to 20 quantum layers, for example five to eight quantum layers, may also be provided.

(11) The p-conductive semiconductor layer 22 may also be of multilayer configuration, wherein the individual layers may differ from one another in particular by the material composition and/or by the doping thereof.

(12) The n-conductive multilayer structure 21 comprises a quantum structure with a plurality of quantum layers 211, which are arranged between barrier layers 212.

(13) A position of a doping peak 4 in the vertical direction, i.e., in a direction perpendicular to a main plane of extension of the semiconductor layers of the semiconductor body 2, is shown schematically by means of an arrow. The doping peak is located in the n-conductive multilayer structure 21, in particular between the quantum layer 211 of the n-conductive multilayer structure closest to the active region and the quantum layer 201 of the active region 20 closest to the n-conductive multilayer structure. In a region of the n-conductive multilayer structure adjoining the doping peak 4, the quantum layers 211 and the barrier layers adjoining the quantum layers are low doped.

(14) Efficient injection of electrons into the active region 20 may proceed by means of the doping peak 4. In the reverse direction, the doping peak likewise brings about improved current spreading, which leads to a reduced risk of ESD damage to the semiconductor chip formed by means of the semiconductor layer sequence. Reduced ESD sensitivity is thus achieved as early as with deposition of the semiconductor layer sequence, so reducing the risk of damage to the semiconductor chip in a subsequent production step.

(15) A schematic profile of a conduction band edge profile E.sub.C and of a silicon doping profile is shown in FIG. 1B as a function in the z direction for a second exemplary embodiment of a semiconductor body for a semiconductor chip. The z direction corresponds to the direction of deposition of the semiconductor layers of the semiconductor body 2 and extends perpendicular to a main plane of extension of the semiconductor layers of the semiconductor body 2.

(16) This second exemplary embodiment corresponds substantially to the first exemplary embodiment, described in conjunction with FIG. 1A, of a semiconductor body. In contrast thereto, a further doping peak 41 is provided in this exemplary embodiment.

(17) The further doping peak 41 forms a highly doped sub-region of the quantum structure of the n-conductive multilayer structure 21. Between the further doping peaks and the doping peak 4 there is provided a region of low n-conductive doping 45 of the quantum structure.

(18) The semiconductor body 2, in particular the active region 20, is based in this exemplary embodiment on a nitride compound semiconductor material.

(19) The active region 20 comprises a plurality of quantum layers 201. In this exemplary embodiment the active region is intended for generating radiation in the blue spectral range. To this end, the quantum layers each comprise an indium content of x=0.2. The active region may however also be configured to emit radiation in a different spectral range. The higher the indium content, the lower the band gap and thus the energy of the photons generatable in the active region. The indium content may thus be varied within broad limits. For example, quantum layers with an indium content of x=0.10 emit radiation when in operation in the ultraviolet spectral range and quantum layers with an indium content of x=0.40 emit radiation in the green spectral range. Between the quantum layers GaN barrier layers 202 are arranged.

(20) The doping profile for the n-conductive multilayer structure 21 is produced in this exemplary embodiment by means of silicon doping. A different dopant may also be used, however.

(21) The doping profile comprises a doping peak 4. This doping peak amounts in this exemplary embodiment to a width of approximately 5 nm. In the region of the doping peak 4 the doping concentration amounts to 1*10.sup.19 cm.sup.3, while the doping concentration in a region of low n-conductive doping 45 adjoining the doping peak 4 comprises a doping concentration of 1*10.sup.17 cm.sup.3. Furthermore, the doping profile comprises a further doping peak 41 with a width of 15 nm, in which the n-conductive multilayer structure is n-conductively doped with a doping concentration of 1*10.sup.19 cm.sup.3.

(22) By means of the doping peaks, charge carrier injection which is particularly uniform in the lateral direction may be achieved. Efficient current spreading therefore takes place, in particular immediately below the quantum layers 201 of the active region.

(23) The n-conductive multilayer structure 21 comprises, as described in connection with FIG. 1A, a quantum structure with a plurality of quantum layers 211, which are arranged in each case between barrier layers 212. The doping profile results in a low doped sub-region 215 of the quantum structure and a highly doped sub-region 216 of the quantum structure. In these regions, the quantum layers and/or the barrier layers may each be doped. Preferably, the quantum layers and the barrier layers are highly doped, at least in the region of the at least one doping peak.

(24) The n-conductive multilayer structure 21 thus comprises both a low doped sub-region of the quantum structure and a highly doped sub-region of the quantum structure. The low doped sub-region 215 of the quantum layers here extends between the doping peaks 4, 41 and forms an electron reservoir when the semiconductor chip is in operation. In the low doped sub-region of the quantum structure, the quantum layers 211 and the barrier layers 212 are low doped. The doping peak 4 brings about particularly efficient and laterally homogeneous injection of charge carriers from the n-conductive multilayer structure 21 into the quantum layers of the active region 20.

(25) In this exemplary embodiment the quantum layers of the n-conductive multilayer structure 21 comprise an indium content of x=0.1, by way of example. The indium content may however also be selected to be different therefrom. The indium-content is preferably at most as high as the indium content of the quantum layers in the active region, such that the band gap of the quantum layers of the n-conductive multilayer structure 21 is larger than the band gap of the quantum layers in the active region 20 or corresponds to the band gap of the quantum layers in the active region.

(26) The quantum structure of the n-conductive multilayer structure may in particular take the form of a quantum well structure or a superlattice, for example with barrier layers of a thickness of less than 5 nm, for instance of approximately 2 nm.

(27) Efficient injection of charge carriers into the active region is simplified thereby.

(28) It goes without saying that the material compositions of the active region 20 and the n-conductive multilayer structure 21 and the doping profile may also deviate from the exemplary embodiment illustrated.

(29) Preferably, a doping concentration in at least one doping peak 4 amounts to at least 4*10.sup.18 cm.sup.3. Furthermore, the doping concentration in the doping peak preferably amounts to at most 1*10.sup.20 cm.sup.3, particularly preferably at most 3*10.sup.19 cm.sup.3.

(30) In the region of low n-conductive doping 45 the doping concentration preferably amounts to at most 5*10.sup.17 cm.sup.3, particularly preferably at most 2*10.sup.17 cm.sup.3.

(31) The doping concentration in the at least one doping peak is preferably at least five times, particularly preferably at least eight times as high as in the region of low n-conductive doping of the n-conductive multilayer structure.

(32) The thickness, i.e., vertical extent, of the doping peak 4 and/or the further doping peak 41 preferably amounts to between 1 nm and 30 nm inclusive, particularly preferably between 2 nm and 20 nm inclusive, most preferably between 7 nm and 10 nm inclusive.

(33) The doping peak 4 is preferably at a small distance from the active region 20, particularly preferably at a distance of at most 30 nm, in particular between 1 nm and 30 nm inclusive, preferably between 2 nm and 20 nm inclusive, most preferably between 7 nm and 10 nm inclusive.

(34) Furthermore, unlike in the exemplary embodiments shown, more than two doping peaks may also be provided, for example between one and five doping peaks inclusive.

(35) In addition, unlike in the exemplary embodiments shown the n-conductively doped multilayer structure 21 may also comprise layers or sublayers which are undoped or intrinsic. In this case, the undoped or intrinsic layers are conveniently thin enough for the n-conductive multilayer structure 21 to exhibit sufficiently high conductivity for electrons in the deposition direction.

(36) To produce an as far as possible rectangular profile for the doping profile in the region of the doping peaks 4, 41 deposition preferably proceeds with a low growth rate, for example with a rate of between 20 nm/h and 500 nm/h inclusive.

(37) Furthermore, the crystal structure of the n-conductive multilayer structure preferably comprises V-shaped indentations, which form in particular at low deposition temperatures, for instance below 950 C., in increased numbers along dislocations. These V-shaped indentations may lead to improved behaviour of the semiconductor chip on application of a voltage in the non-conducting direction.

(38) A first exemplary embodiment of a semiconductor chip 1 is shown in FIG. 2, the semiconductor body 2 being constructed by way of example as described in relation to FIG. 1A.

(39) The semiconductor chip 1 here takes the form of a thin film LED semiconductor chip, in which the growth substrate 29 (FIG. 1A) for the semiconductor layer sequence of the semiconductor body 2 has been removed. The active region 20 is provided to generate incoherent radiation when in operation.

(40) The semiconductor body 2 is arranged on a carrier 5. The carrier 5 serves in particular in mechanical stabilisation of the semiconductor body, such that the growth substrate is not needed for this purpose.

(41) A semiconductor material, for example silicon, gallium arsenide or germanium, or a ceramic, for instance aluminium nitride, is suitable as carrier material.

(42) The carrier 5 is connected mechanically stably and also electrically conductively to the semiconductor body by means of a bonding layer 8.

(43) A suitable bonding layer is, for example, a solder or an electrically conductive adhesive.

(44) A mirror layer 62 is formed between the carrier 5 and the semiconductor body 2. By means of the mirror layer, radiation generated in the active region 20 when the semiconductor body 2 is in operation, which is emitted in the direction of the carrier 5, may be reflected in the direction of the radiation exit face 200 and thus leave the semiconductor chip.

(45) On the side of the semiconductor body 2 remote from the carrier 5, the semiconductor body comprises a first contact 31. On the opposing side of the semiconductor chip, i.e., on the side of the carrier 5 remote from the semiconductor body 2, a second contact 32 is formed.

(46) The first contact and/or the second contact preferably contain a metal, for example gold, silver, platinum, aluminium, nickel, chromium or copper or an alloy with at least one of the stated materials.

(47) By means of the first contact 31 and the second contact 32, charge carriers may be injected into the active region 20 from different sides when the semiconductor chip 1 is in operation and there recombine with emission of radiation.

(48) The electrons injected via the first contact 31 are efficiently distributed in the lateral direction in the n-conductive multilayer structure 21 in the region of the at least one doping peak 4 and coupled in uniformly into the quantum layers 201 of the active region 20.

(49) The mirror layer 62 is preferably of metallic construction and moreover preferably exhibits high reflectivity for the radiation generated in the active region. Examples of suitable materials for the mirror layer are a metal, for instance aluminium, silver, gold, palladium or rhodium or a metal alloy with at least one of the stated metals.

(50) A second exemplary embodiment of a semiconductor chip 1 is illustrated schematically in sectional view in FIG. 3. The semiconductor body 2 is here again constructed as described in relation to FIG. 1A. Unlike the semiconductor chip according to the first exemplary embodiment described in relation to FIG. 2, the semiconductor body 2 comprises a recess 24, which extends from a side facing the carrier 5 through the p-conductive semiconductor layer 22 and through the active region 20 into the n-conductive multilayer structure 21. The recess here passes through the quantum layers 211 of the n-conductive multilayer structure. The side faces of the recess are covered by an insulation layer 27, which protects the semiconductor body 2 from an electrical short circuit of the active region 20.

(51) A contact layer 65 is formed in the recess 24, which layer serves in electrical contacting of the active region from the side remote from the p-conductive semiconductor layer 22.

(52) The carrier 5 comprises a first land 51 and a second land 52, wherein the first land 51 is connected electrically conductively via the contact layer 65 to the n-conductive multilayer structure 21 and the second land 52 is connected electrically conductively via the mirror layer 62 to the p-conductive semiconductor layer 22. The first land 51 and the second land 52 are arranged on the same side of the carrier 5.

(53) By means of the recess 24, the n-conductive multilayer structure 21 arranged on the side of the active region 20 remote from the carrier 5 is electrically contactable, such that the radiation exit face 200 may be free of an external electrical contact. Shading of the radiation exit face by a contact which is not radiation-transmissive is thereby prevented.

(54) The carrier 5 comprises openings 55 which extend from a first major face 501 of the carrier facing the semiconductor body 2 through to a second major face 502 opposite the first major face. By means of these openings, the first land 51 is connected electrically conductively to the first contact 31 and the second land 52 is connected electrically conductively to the second contact 32, such that the semiconductor chip 1 is externally electrically contactable from the bottom of the semiconductor chip remote from the radiation exit face 200.

(55) Furthermore, the semiconductor body 2 comprises patterning 7 on the side of the radiation exit face 200. The patterning serves to reduce total reflection of radiation generated in the active region within the semiconductor chip and thus to increase outcoupling efficiency. It goes without saying that such patterning may also be provided in the first exemplary embodiment of the semiconductor chip described in relation to FIG. 2.

(56) FIG. 4 shows the behaviour of the reverse current I as a function of the voltage in the reverse direction, i.e., in the non-conducting direction of the active region 20. A curve 99 here shows measurements at a semiconductor layer sequence from which the semiconductor bodies for the semiconductor chips are obtained with subsequent processing. The semiconductor layer sequence is here constructed as described in relation to FIG. 1B.

(57) In comparison, a curve 98 shows measurements at a semiconductor layer sequence in which a conventional n-conductive region without doping peaks is used.

(58) An arrow 97 illustrates how the above-described structure of the n-conductive multilayer structure 21 makes it possible for the current profile to increase more slowly initially for small voltages and only to increase steeply with very high voltage values. The measurement curve thus shows a considerably more pronounced, bend-like profile.

(59) The description of an LED semiconductor chip is used merely by way of example to describe the exemplary embodiments. The above-described configuration of the n-conductive multilayer structure 21 and of the doping profile with at least one doping peak 4 may however also be used for a component emitting coherent or at least partially coherent radiation, for example for a surface-emitting or an edge-emitting semiconductor laser chip or for an RCLED (resonance cavity light emitting diode).

(60) The invention is not restricted by the description given with reference to the exemplary embodiments. Rather, the invention encompasses any novel feature and any combination of features, including in particular any combination of features in the claims, even if this feature or this combination is not itself explicitly indicated in the claims or the exemplary embodiments.