POWER MODULE

Abstract

A power module. The power module includes a substrate and at least one power transistor arranged on a bottom side of the substrate. The power module includes at least one power connection connected to the substrate. A conductor loop for measuring temperature is arranged on an inner or outer substrate layer or a top side opposite the power transistor.

Claims

1-15. (canceled)

16. A power module, comprising: a substrate; at least one power transistor arranged on a bottom side of the substrate; at least one power connection connected to the substrate; and a conductor loop configured to measure temperature is arranged on an inner or outer substrate layer or a top side opposite the power transistor.

17. The power module as recited in claim 16, wherein the conductor loop has a meandering shape.

18. The power module as recited in claim 16, wherein the conductor loop is arranged above a source of the power transistor.

19. The power module as recited in claim 16, wherein the conductor loop extends over a plurality of substrate layers.

20. The power module as recited in claim 16, wherein at least two power transistors are arranged on the substrate, wherein a separate conductor loop for measuring temperature is arranged above each of the at least two power transistors in an inner substrate layer or the top side of the substrate.

21. The power module as recited in claim 16, wherein the conductor loop includes a temperature-dependent resistor.

22. The power module as recited in claim 20, further comprising: at least one application-specific integrated circuit connected to the at least two power transistors and to the separate conductor loops.

23. The power module as recited in claim 22, wherein the application-specific integrated circuit is configured so that it controls the loading of the at least two power transistors in such a way that the temperature measured by the conductor loops is equal.

24. The power module as recited in claim 16, wherein the substrate includes a multi-layer low-temperature co-fired ceramic.

25. The power module as recited in claim 16, wherein the temperature measurement takes place in the conductor loop by way of a four-point measurement or an end-of-line calibration.

26. The power module as recited in claim 16, wherein a plurality of conductor loops are arranged in different substrate layers and connected in series.

27. The power module as recited in claim 16, wherein the power module includes at least two substrates.

28. The power module as recited in claim 16, further comprising a plurality of power semiconductor devices embedded between substrate layers.

29. The power module as recited in claim 27, further comprising a plurality of power semiconductor devices embedded between the two substrates, wherein conductor loops for measuring temperature are arranged in at least one of the substrates.

30. The power module as recited in claim 15, further comprising at least one power semiconductor device, wherein a further conductor loop for measuring temperature is arranged on a top side of the substrate opposite the power semiconductor device.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Exemplary embodiments of the present invention will be explained in more detail with reference to the figures and the following description.

[0034] FIG. 1 shows a first specific embodiment of a power module according to the present invention in a view from the top side of the power module

[0035] FIG. 2 shows a second specific embodiment of a power module according to the present invention in a view from the top side of the power module

[0036] FIG. 3 shows a third specific embodiment of a power module according to the present invention in a cross-sectional view.

[0037] FIG. 4 shows a fourth specific embodiment of a power module according to the present invention in a cross-sectional view.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0038] FIG. 1 shows a specific embodiment of a power module 1 according to the present invention, including a substrate 2 and a plurality of (here, merely by way of example, two) power transistors 3 arranged on a bottom side of substrate 2.

[0039] FIG. 1 shows a view from the top side of substrate 2, and therefore power transistors 3 on the opposite bottom side or in an inner substrate layer are only indicated by dashed lines.

[0040] Power module 1 includes five power connections 4, 5, 6 connected to substrate 2. Power connections 4, 5, 6 may each be connected e.g. to source 7 and gate 14 (indicated with dashed lines in each case, since they are on the bottom side of the substrate or embedded in the substrate) of power transistors 3. Power connections 4 may deliver, e.g., a supply voltage, power connection 5 may provide, e.g., an earth, and power connections 6 may be phase connections. For the sake of simplicity, corresponding control electronics on substrate 2 are not shown here.

[0041] According to the present invention, conductor loops 8 for measuring temperature are arranged on a top side of substrate 2 opposite power transistors 3.

[0042] Conductor loops 8 have a meandering shape, allowing the size of the conductor path to be increased under the influence of elevated temperature, and thus, for example, allowing the greatest possible absolute effect on the resistance of conductor loops 8 to be achieved.

[0043] Conductor loops 8 here are arranged substantially opposite the entire area of the corresponding power transistor 3. However, conductor loops 8 may also cover an area larger than the area of the particular power transistor 3 (e.g. an area 10-100% larger) in order to increase the absolute resistance change measured.

[0044] Conductor loop 8 may be connected and guided over a plurality of layers by through-holes (vias) to maximize the length in the hot region over the power transistor (e.g. MOSFET). As a result, the change in resistance of the conductor loop may be increased, thereby improving the sensitivity of the present invention.

[0045] Power module 1 includes an application-specific integrated circuit 9 (ASIC), which is connected to both (all) power transistors 3 and to both (all) corresponding conductor loops 8. In this case, ASIC 9 can regulate individual power transistors 3, e.g. by single-gate control, to adjust the thermal load on power transistors 3 (momentarily or over time) and thus to increase the overall life or performance of the power semiconductor device. ASIC 9 may be arranged on the bottom side or top side of the substrate (here, by way of example, on the top side). In the latter case, conductor loops 8 may be connected to ASIC 9 e.g. by way of through-holes (vias).

[0046] Conductor loops 8 are connected to ASIC 9 at both ends of conductor loops 8 purely by way of example here, but other types of connection are also possible (e.g. for a four-point measurement) to allow higher accuracy of the resistance measurement.

[0047] FIG. 2 shows a second specific embodiment of a power module 1 according to the present invention. This specific embodiment substantially corresponds to the first specific embodiment, but with a different area covered by conductor loop 8. Conductor loop 8 here covers substantially only the area of source 7 of power transistor 3, i.e. not gate 14, for example.

[0048] In a field-effect transistor, source 7 is generally the greatest source of heat and therefore, for optimum sensitivity, conductor loop 8 may be arranged only opposite source 7. As an alternative, however, the conductor loops may also be arranged opposite another part of power transistor 3 or substantially opposite the entire power transistor (FIG. 1). However, a conductor loop may also cover a plurality of power transistors 3.

[0049] FIG. 3 shows a third specific embodiment of a power module 1 according to the present invention, e.g. from FIG. 1 or FIG. 2, in a cross-section through both conductor loops 8 and both power transistors 3. The “top side” of substrate 2 is arranged on the left in each of FIG. 3 and FIG. 4.

[0050] Conductor loops 8 here each include two conductor loop portions 10, 11 in two different substrate layers 12 for each power transistor 3. A meandering shape of conductor loop portions 10, 11 can only be surmised in this view since each conductor loop (merely by way of example) is cut thirteen times. Power module 1 here includes a first substrate 2 and a second substrate 15. First substrate 2 here includes four substrate layers 12, but two, three, five or more substrate layers 12 are also possible. Power transistors 3 are embedded between the two substrates 2, 15 (in a sandwich structure, as it were).

[0051] Conductor loop portions 10, 11 are connected by way of through-holes 13 (vias) between substrate layers 12. Power transistors 3 are furthermore connected to power wirings 16, which are arranged in particular in the 1-2 substrate layers 12 adjacent to the power transistors. Power wirings 16 in this case are located in different substrate layers 12 than conductor loops 8 for measuring temperature.

[0052] FIG. 4 shows a fourth specific embodiment of a power module 1 according to the present invention (e.g. also one from FIG. 1 or 2). The fourth specific embodiment differs from the third by the fact that power module 1 has only one substrate 2 with (by way of example here) seven substrate layers 12. Power transistors 3 are embedded between substrate layers 12 of substrate 2. Here, power wirings 16 are arranged on both sides of power transistors 3 in each of the two adjacent substrate layers.

[0053] However, in both FIG. 3 and FIG. 4, conductor loops 8 for measuring temperature are arranged in the top substrate layer 12 (far left in each case) and first inner substrate layer 12 therebelow (second from left in each case).

[0054] Although the present invention has been described in detail and illustrated more fully through preferred exemplary embodiments, the present invention is not limited by the disclosed examples, and one skilled in the art is able to derive other variations from it without departing from the scope of protection of the present invention.