Forming Through Hole in Component Carrier by Laser Drilling Blind Hole and Extending the Latter by Etching
20230085035 · 2023-03-16
Inventors
- Abderrazzaq IFIS (Leoben, AT)
- Jens RIEDLER (Trofaiach, AT)
- Lukas HERRES (Gratkorn, AT)
- Felix SKRIVANEK (Leoben, AT)
- Julia PLATZER (Graz, AT)
Cpc classification
H05K3/0035
ELECTRICITY
H05K2203/0207
ELECTRICITY
H05K3/0094
ELECTRICITY
H05K1/115
ELECTRICITY
H05K3/429
ELECTRICITY
International classification
H05K3/00
ELECTRICITY
H05K1/11
ELECTRICITY
Abstract
A method of manufacturing a component carrier includes laser drilling a blind hole in a layer stack, and subsequently extending the blind hole to a through hole by etching. A component carrier includes an electrically insulating layer structure, an electrically conductive layer structure directly on an electrically insulating layer structure, and a tapering through hole extending through the electrically conductive layer structure and through the electrically insulating layer structure with a lateral overhang of the electrically conductive layer structure beyond the electrically insulating layer structure at the tapering through hole of not more than 20% of a maximum diameter of the tapering through hole.
Claims
1. A method of manufacturing a component carrier, the method comprising: laser drilling a blind hole in a layer stack; and subsequently extending the blind hole to a through hole by etching.
2. The method according to claim 1, wherein the method comprises laser drilling through a frontside electrically conductive layer structure of the layer stack and into at least part of an electrically insulating layer structure of the layer stack.
3. The method according to claim 1, wherein the method comprises forming a window in a frontside electrically conductive layer structure of the layer stack by etching, and thereafter laser drilling through the window into at least part of the electrically insulating layer structure.
4. The method according to claim 1, wherein the method comprises laser drilling through an entire electrically insulating layer structure of the layer stack up to a backside electrically conductive layer structure of the layer stack as a stop layer.
5. The method according to claim 4, wherein the method comprises, after said laser drilling through the entire electrically insulating layer structure up to the backside electrically conductive layer structure, forming a window in the backside electrically conductive layer structure by etching.
6. The method according to claim 1, wherein the method comprises laser drilling in the layer stack only from one side of the layer stack.
7. The method according to claim 1, wherein the method comprises filling the through hole at least partially with a filling medium, in particular with an electrically conductive filling medium.
8. The method according to claim 7, wherein the method comprises filling the through hole at least partially with the electrically conductive filling medium by electroless plating, in particular by forming chemical metal.
9. The method according to claim 7, wherein the method comprises filling the through hole at least partially with the electrically conductive filling medium by electroplating, in particular by galvanic plating, on a seed layer formed previously by electroless plating.
10. The method according to claim 1, comprising at least one of the following features: wherein the method comprises extending the blind hole to the through hole by etching in a region of the blind hole simultaneously at two opposing exposed surface portions of a backside electrically conductive layer structure of the layer stack on an electrically insulating layer structure of the layer stack; wherein the method comprises laser drilling the blind hole using at least one of a carbon dioxide laser and an ultraviolet laser; wherein, before etching, at least one of a frontside electrically conductive layer structure and a backside electrically conductive layer structure of the layer stack has a thickness of not more than 20 μm, in particular in a range from 5 μm to 12 μm; wherein, after etching, least one of a frontside electrically conductive layer structure and a backside electrically conductive layer structure of the layer stack has a thickness in a range from 1 μm to 7 μm, in particular in a range from 2 μm to 5 μm; wherein the etching comprises a first etching process for removing surface metal material followed by a second etching process enhancing surface roughness, wherein in particular the first etching process comprises a desmear process and/or the second etching process comprises a flash etching process; wherein the method comprises forming the through hole without a lateral offset between a center of the through hole on a frontside and a center of the through hole on a backside of the layer stack; wherein the method comprises forming the through hole by laser drilling from a frontside and without laser drilling from a backside of the layer stack; wherein the method comprises filling the through hole in the layer stack with an electrically conductive filling medium without bridge plating, wherein in particular the layer stack has a thickness below 80 μm; wherein the method comprises: laser drilling a first plurality of blind holes in the layer stack from a frontside, subsequently flipping the layer stack, subsequently laser drilling a second plurality of blind holes in the layer stack from a backside, and subsequently extending the first plurality of blind holes and the second plurality of blind holes to a first plurality of through holes and a second plurality of through holes, in particular with opposite tapering directions, by simultaneously etching.
11. The method according to claim 1, wherein the method comprises protecting at least part of an exterior surface of at least one of a frontside electrically conductive layer structure at a frontside of the layer stack and a backside electrically conductive layer structure at a backside of the layer stack by a protection structure at least during the etching, wherein in particular the method comprises patterning the protection structure before the etching.
12. The method according to claim 1, wherein the method comprises forming at least one electrically conductive trace based on at least one of a frontside electrically conductive layer structure and a backside electrically conductive layer structure.
13. The method according to claim 12, comprising at least one of the following features: wherein the method comprises forming the at least one electrically conductive trace by patterning at least one of the frontside electrically conductive layer structure and the backside electrically conductive layer structure, in particular by etching simultaneously with the extending of the blind hole to the through hole by etching; wherein the method comprises plating the at least one electrically conductive trace simultaneously with at least partially filling the through hole by the plating.
14. A component carrier, comprising: an electrically insulating layer structure; a frontside electrically conductive layer structure directly on a frontside of the electrically insulating layer structure; and a tapering through hole extending through the frontside electrically conductive layer structure and through the electrically insulating layer structure with a lateral overhang of the frontside electrically conductive layer structure beyond the frontside of the electrically insulating layer structure at the tapering through hole of not more than 20% of a maximum diameter of the tapering through hole.
15. The component carrier according to claim 14, comprising at least one of the following features: wherein the tapering through hole extends through the frontside electrically conductive layer structure and through the electrically insulating layer structure without any lateral overhang of the frontside electrically conductive layer structure beyond the frontside of the electrically insulating layer structure at the tapering through hole; comprising a backside electrically conductive layer structure directly on a backside of the electrically insulating layer structure, wherein in particular the through hole extends through the backside electrically conductive layer structure, and wherein in particular an opening in the backside electrically conductive layer structure is equal to or smaller than an opening in the frontside electrically conductive layer structure; wherein no base material of at least one of the frontside electrically conductive layer structure, in particular a metal foil on a core, and the backside electrically conductive layer structure, in particular a further metal foil on the core, is present on at least one edge of the through hole; wherein a thickness of the electrically insulating layer structure through which the through hole extends is not more than 80 μm, in particular is in a range from 20 μm to 70 μm; comprising a filling medium filling at least part of the through hole, wherein in particular the filling medium comprises at least one of a group consisting of a plated metal, and a paste, in particular at least one of a metallic paste, a magnetic paste, and a dielectric paste; wherein a wider end of the tapering through hole is located at the frontside; wherein the through hole has a maximum diameter of not more than 60 μm; wherein part of the through hole is a laser hole section; wherein the through hole has continuously tapering sidewalls tapering from its one end to its opposing other end; wherein a smallest diameter of the through hole is located at an end thereof; wherein a variation between a thickness of an electrically conductive structure at one end of the through hole and another electrically conductive structure at an opposing other end of the through hole is not more than 15%.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION OF ILLUSTRATED EMBODIMENTS
[0098] The illustrations in the drawings are schematically presented. In different drawings, similar or identical elements are provided with the same reference signs.
[0099] Before, referring to the drawings, exemplary embodiments will be described in further detail, some basic considerations will be summarized based on which exemplary embodiments of the invention have been developed.
[0100] Conventionally, through hole formation in a layer stack of a component carrier to be manufactured involves frontside laser drilling followed by backside laser drilling. However, such a front-to-back drilling approach may generate an undesired front-to-backside offset involving alignment issues. The offset level may be even higher in case of thin cores due the excessive material removal and deformation. This conventionally occurring offset may also generate an excessive and critical overhang, in particular, on the frontside.
[0101] What concerns a subsequent plating process for filling a created through hole, the described offset may conventionally generate a small middle diameter of a through hole, which may be prone to undesired void formation. Moreover, the high overhang present in conventional approaches may induce undesired inclusions. Hence, the filling performance of conventional laser drilled through hole may be poor, and significant reliability risks may occur. Further conventional shortcomings are a mandatory bridge plating stage and a yield loss due to the presence of melted copper (for example at bottle holes, i.e., not fully drilled holes or locked holes) when conventional laser through holes are manufactured.
[0102] Highly advantageously, a through hole formation architecture according to exemplary embodiments of the invention may reliably avoid the conventional need of front and back drilling, may thereby eliminate the above-described offset issue and may improve the throughput and the reliability of the manufactured component carriers. For instance, a 60% cycle time reduction may be achieved.
[0103] According to an exemplary embodiment of the invention, creation of a laser through hole in a layer stack may be accomplished using a combination of partial laser drilling and partial etching (in particular, flash etching) leading to a specific tapering via shape. Firstly, a blind hole may be formed in the layer stack by laser drilling from the frontside only, and thereafter the blind hole may be vertically extended by a separate etching process until it becomes a through hole. As a result, an exemplary embodiment obtains a tapering through hole free of any front-to-backside offset, having a low or even zero overhang on the frontside and providing highly reliable and efficiently manufacturable component carriers. Such a manufacturing architecture may be applied particularly advantageously to thin cores. By combining single-sided (and preferably one-shot) laser drilling and subsequent etching for producing a through-hole, tapering through holes may be formed, in particular, in thin cores without frontside and backside drilling.
[0104] According to exemplary embodiments of the invention, a through hole formation architecture for component carriers may be provided which may allow to obtain a zero offset and a minor or even zero overhang tapering through hole without the risk of bottle holes (i.e., not fully drilled holes or blocked holes). In particular, embodiments may allow to drill small vias with critical aspect ratio. Advantageously, there is no risk of strongly constricted middle diameters of the through hole, so that the risk of inclusions and voids may be reduced. Furthermore, the manufacturing approach according to exemplary embodiments of the invention may enable pad miniaturization. Component carriers with such tapering through holes may be manufactured with high throughput and low yield loss which allows manufacture on an industrial scale. The manufacturing effort may be low, while simultaneously the trend of miniaturization and the goal of high reliability may be met. Contrary to conventional approaches, no dedicated bridge plating is needed for filling the tapering through hole with a filling medium. This is due to the fact that the tapering through hole formed by a combination of single-sided laser drilling and subsequent etching does not lead to an hourglass shape, which requires bridge formation in conventional approaches with double-sided laser drilling. However, bridge plating may be carried out optionally according to exemplary embodiments, in particular, when using thick cores and/or deep holes.
[0105] Exemplary embodiments of the invention may increase the capacity in terms of laser processing efficiency and plating performance. In particular, exemplary embodiments of the invention may allow to achieve a higher quality and/or reliability than conventionally manufactured component carriers and may ensure a high miniaturization level on a core.
[0106] A major challenge in laser through hole technology is the processing thereof which may conventionally involve double-sided laser drilling. However, drilling from two opposing sides may lead to front to back offset, a challenging middle diameter control and bottle hole defects that are critical to quality and hard to detect during and after processing.
[0107] By avoiding double-sided laser drilling without the need of an additional photo process, exemplary embodiments of the invention may enable the formation of a tapering through hole in a layer stack without the above shortcomings. By combining blind hole formation by one-sided laser drilling followed by an etching process for converting the blind hole into a through hole, an easy process is provided in which laser drilling is one-sided while the obtained via nevertheless goes through a base copper.
[0108] More specifically, an exemplary embodiment of the invention forms a blind via by laser drilling followed by an accurate flash etching process as a differential etching stage to open the via bottom. Indeed, remaining copper on the bottom of the via may be etched from both sides, and therefore the via may be opened before the base copper gets entirely etched away. Advantageously, no overhang of base copper may occur on the frontside of the tapering through hole, while a flash etching process may lead to a small overhang on the backside.
[0109] Advantageously, such an embodiment may involve an accurate selection of a base copper with an appropriate thickness. For instance, the process may start from a 9 μm thick base copper layer and may execute a 5 μm flash etching program. As a result, the vias may be completely opened while there may remain a 4 μm base copper layer on the surface. The remaining copper may strongly help during a subsequent plating process for filling at least part of the tapering through hole with metal.
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[0111] The illustrated component carrier 100 may be a plate-shaped laminate-type component carrier, such as a printed circuit board (PCB). The component carrier 100 comprises a layer stack 104 which comprises a central electrically insulating layer structure 112. Furthermore, a frontside electrically conductive layer structure 108 of the layer stack 104 is formed directly on a frontside of the electrically insulating layer structure 112. Correspondingly, a backside electrically conductive layer structure 110 is formed directly on the backside of the electrically insulating layer structure 112.
[0112] The frontside electrically conductive layer structure 108 may be a patterned laminated copper foil. The frontside electrically conductive layer structure 108 may have a thickness dl of for example less than 15 μm, for instance 10 μm. Correspondingly, the backside electrically conductive layer structure 110 may be a further patterned laminated copper foil. The backside electrically conductive layer structure 110 may have a thickness, d2, of for example less than 15 μm, for instance 10 μm.
[0113] In the shown embodiment, the electrically insulating layer structure 112 may comprise resin (in particular, epoxy resin), optionally comprising reinforcing particles such as glass fibers or glass spheres. For example, the electrically insulating layer structure 112 may be a thin core. For instance, a vertical thickness, d3, of the electrically insulating layer structure 112 may be less than 100 pm, for instance in a range between 20 μm and 60 μm. With such thin cores, reliability issues are conventionally particularly pronounced.
[0114] As shown in
[0115] Advantageously, no material of the frontside electrically conductive layer structure 108 and the backside electrically conductive layer structure 110 is present on respective edges 118 of the through hole 106.
[0116] As shown as well in
[0117] More specifically, the plating-type electrically conductive filling medium 114 comprises a seed layer 116 lining exposed surface portions of the layer structures 108, 110, 112 inside and outside of the through hole 106. In order to form the seed layer 116 which may for instance comprise copper, it is preferable to carry out an electroless deposition procedure covering (in particular, after a pre-treatment, for instance with palladium and/or titanium) the sidewalls of the electrically insulating layer structure 112, as well as covering exposed surface portions of frontside electrically conductive layer structure 108 and backside electrically conductive layer structure 110. A thickness, d4, of the seed layer 116 may be for instance 0.5 μm. However, it is also possible that the seed layer 116 has a thickness above 1 μm and/or that several cumulative seed layers are provided. For example, a thickness of a seed layer 116 or a cumulative thickness of a plurality of seed layers may be in a range between 0.5 μm and 5 μm. When multiple seed layers are provided, they may comprise an organic (for instance polymer) layer, a palladium layer, and/or a copper layer.
[0118] Subsequently, further electrically conductive material (such as copper) may be deposited on the seed layer 116 by an electroplating procedure, in particular, by galvanic plating. Thus, the seed layer 116 may be covered by a thicker electroplating structure 156 of electrically conductive filling medium 114, for instance made of copper. Forming the electroplating structure 156 may be carried out by galvanic plating, preferably following the formation of the seed layer 116. One or a plurality of galvanic plating stages may be executed for this purpose.
[0119] As shown by reference signs 199 in
[0120] For instance, the component carrier 100 according to
[0121]
[0122] A difference between the component carrier 100 according to
[0123]
[0124] A difference between the component carrier 100 according to
[0125] A further difference of the
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[0127]
[0128] The electrically conductive layer structures 108, 110 are provided to later ensure a proper plating of a formed through hole 106 and provide improved adhesion properties as compared to a seed layer (see reference sign 116 in
[0129] Referring to
[0130] Ensuring that the laser drilling process does not extend through the entire backside electrically conductive layer structure 110 may guarantee that a table (not shown) beneath the structure according to
[0131] Advantageously, laser drilling is carried out only from the frontside of the layer stack 104, not from the backside. Thus, a quick and highly efficient laser drilling process may be carried out which leads to a high through-put. Furthermore, no front-to-backside offset occurs due to the only one-sided laser drilling process.
[0132] Next, an alternative to the described laser drilling approach will be explained which can be implemented according to other embodiments of the invention: As an alternative to the implemented ultraviolet laser, it is also possible to use a carbon dioxide laser. Since a carbon dioxide laser does not drill through copper material, there is no need for a precise laser control to avoid unintentional laser drilling through the backside electrically conductive layer structure 110. Furthermore, when using a carbon dioxide laser for laser drilling through electrically insulating layer structure 112, i.e., a laser source 160 which does not drill through copper material, a window 164 may firstly be formed in the frontside electrically conductive layer structure 108 prior to laser drilling. Such a window 164 extending through the frontside electrically conductive layer structure 108 may for instance be created by a lithography and etching process which patterns the frontside electrically conductive layer structure 108 before laser drilling. In this context, it is for instance possible to form a photoresist on the frontside electrically conductive layer structure 108 and to pattern the photoresist, for instance using a photomask. Through a recess in the photomask, only a selected surface portion of the frontside electrically conductive layer structure 108 is exposed which can then be subjected to etching for forming the window 164 in the frontside electrically conductive layer structure 108. Thereafter, the laser beam 162 may propagate through the pre-formed window 164 and may drill recess 166 in electrically insulating layer structure 112.
[0133] Concluding, the embodiments described referring to
[0134] Referring to
[0135] Highly advantageously, the described sequence of manufacturing processes may lead to an extension of the blind hole 102 to the through hole 106 by etching simultaneously two opposing exposed surface portions of the backside electrically conductive layer structure 110 of the layer stack 104 on the electrically insulating layer structure 112 of the layer stack 104 in the region of blind hole 102. For accomplishing the extension of the blind hole 102 to the through hole 106, a selective metal etching (in particular, copper etching) process may be carried out which removes surface metal. Several surface areas of layer structures 108, 110 are exposed so that metal may be thinned at these surface areas during etching. Optionally, the copper surfaces of layer structures 108, 110 can be protected prior to the etching, for example by a photoresist or other protection structure as etching protection (compare reference sign 180 in
[0136] For example, the mentioned etching comprises a first etching process for removing surface metal material followed by a second etching process enhancing surface roughness. For instance, the first etching process is a desmear process. For example, the second etching process is a flash etching process. Descriptively speaking, the first etching process efficiently removes copper material, whereas the second etching process increases surface roughness and therefore promotes adhesion for subsequent material to be applied on layer structures 108, 110.
[0137] Advantageously, the described embodiment leads to an easy and reliable via filling process, as a corresponding chemistry may flow on both sides. Advantageously, no bridging is needed for subsequently filling through hole 106 with filling medium 114. The reason for this is that through hole 106 is tapering and does not have a narrow neck portion, as in hourglass-shaped conventional laser through holes formed by laser drilling from both opposing sides.
[0138] Referring to
[0139] As an alternative to the substantially entire filling of the through hole 106 with electrically conductive filling medium 114, it may also be possible to only plate sidewalls delimiting the through hole 106.
[0140] The obtained tapering copper plated vias may be used as vertical through connections, for instance for conducting electric signals within component carrier 100.
[0141] Furthermore, it should be said that different embodiments of the invention may be carried out in accordance with a subtractive process or alternatively using a modified semi-additive processing (mSAP) approach on a core.
[0142]
[0143]
[0144] Referring to
[0145] Referring to the additional shown embodiments of component carriers 100 according to
[0146] In contrast to this, conventional approaches may render it impossible to create a via without front and backside laser drilling. A conventional blind via may frequently have inclusions as the aspect ratio is high. Front to back drilling may generate a considerable offset of for example 20 μm or more. Furthermore, a middle diameter of such conventional through holes may be 80% or less. This may lead to a maximum middle diameter of for example 25 μm or less which does not meet demanding requirements in terms of reliability.
[0147] For instance, referring to
[0148]
[0149] For comparison purposes,
[0150] As already mentioned,
[0151]
[0152] Referring to
[0153] Referring to
[0154] As can be taken from
[0155]
[0156] Referring to
[0157] Referring to
[0158] Referring to
[0159] Referring to
[0160] Again, referring to
[0161] It is also possible to form one or more electrically conductive traces 182 based on the frontside electrically conductive layer structure 108 and/or the backside electrically conductive layer structure 110. Surface portions of the respective layer structure 108, 110 covered with the patterned protection structure 180 may be prevented from thinning during etching, whereas exposed surface portions of the respective layer structure 108, 110 may be thinned or even entirely removed during the etching. Referring to
[0162] It should be noted that the term “comprising” does not exclude other elements or steps and the article “a” or “an” does not exclude a plurality. Also, elements described in association with different embodiments may be combined.
[0163] Implementation of the invention is not limited to the preferred embodiments shown in the figures and described above. Instead, a multiplicity of variants are possible which variants use the solutions shown and the principle according to the invention even in the case of fundamentally different embodiments.