Secret table reference system, method, secret calculation apparatus and program
11480991 · 2022-10-25
Assignee
Inventors
Cpc classification
G06F7/76
PHYSICS
H04L9/085
ELECTRICITY
H04L2209/46
ELECTRICITY
G06F17/16
PHYSICS
International classification
G06F7/76
PHYSICS
G06F7/24
PHYSICS
Abstract
A secure table reference system includes a first combining part 11.sub.n for generating [v′] of v′ ∈ F.sup.m+nt in which d and v are combined, a difference calculation part 12.sub.n for generating [r″] of r″ that has a difference between a certain element of r and an element before the certain element as an element corresponding to the certain element, a second combining part 13.sub.n for generating [r′] of r′ ∈ F.sup.m+nt in which r″ and an m-dimensional zero are combined, a permutation calculation part 14.sub.n for generating {{σ}} of a permutation σ that stably sorts v′ in ascending order, a permutation application part 15.sub.n for generating [s] of s: =σ(r′) obtained by applying the permutation σ to r′, a vector generation part 16.sub.n for generating [s′] of a prefix-sum s′ of s, an inverse permutation application part for generating [s″] of s″ obtained by applying an inverse permutation σ.sup.−1 of the permutation σ to s′, and an output part 17.sub.n for generating [x] of x ∈ F.sup.m consisting of (n.sub.t+1)th and subsequent elements of s″.
Claims
1. A secure table reference system, comprising a plurality of secure computation apparatuses, wherein assuming that F denotes an arbitrary field, m denotes an integer greater than or equal to 2, n.sub.t denotes an integer greater than or equal to 1, [α] denotes a share where α is securely shared supposing α to be an arbitrary vector, {{β}} denotes a share where β is securely shared supposing β to be an arbitrary permutation, v denotes an m-dimensional vector v ∈ F.sup.m, d denotes a vector d ∈ F.sup.nt consisting of elements of a set of input values of a prescribed lookup table, and r denotes a vector consisting of elements of a set of output values of the lookup table, the plurality of secure computation apparatuses include processing circuitry configured to implement: a plurality of first combining parts for generating a share [v′] of a vector v′ ∈ F.sup.m+nt in which the vector d and the vector v are combined using a share [d] of the vector d and a share [v] of the vector v, wherein each of the plurality of secure computation apparatuses communicate over a network and receive as an input the share [d] and the share [v] while the vector d and the vector v remain concealed from each of the plurality of secure computation apparatuses; a plurality of difference calculation parts for generating a share [r″] of a vector r″ that has a difference between a certain element of the vector r and an element before the certain element as an element corresponding to the certain element using a share [r] of the vector r; a plurality of second combining parts for generating a share [r′] of a vector r′ ∈ F.sup.m+nt in which the vector r″ and an m-dimensional zero vector are combined using the share [r″]; a plurality of permutation calculation parts for generating a share {{σ}} of a permutation σ that stably sorts the vector v′ in ascending order using the share [v′]; a plurality of permutation application parts for generating a share [s] of a vector s: =σ(r′) obtained by applying the permutation c to the vector r′ using the share [r′] and the share {{σ}}; a plurality of vector generation parts for generating a share [s′] of a vector s′ that has a total sum from a first element of the vector s to a certain element as an element corresponding to the certain element using the share [s]; a plurality of inverse permutation application parts for generating a share [s″] of a vector s″ obtained by applying an inverse permutation σ.sup.−1 of the permutation σ to the vector s′ using the share [s′] and the share {{σ}}; and a plurality of output parts for generating a share [x] of a vector x ∈ F.sup.m consisting of (n.sub.t+1)th and subsequent elements of the vector s″ using the share [s″], the vector x being the final calculation result and being concealed from each of the plurality of secure computation apparatuses.
2. A secure computation apparatus of the secure table reference system according to claim 1.
3. A non-transitory computer-readable medium that stores a program for causing a computer to function as component parts of one of the secure computation apparatuses according to claim 1.
4. A secure table reference method implemented by a secure table reference system comprising a plurality of secure computation apparatuses, wherein assuming that F denotes an arbitrary field, m denotes an integer of two or more, n.sub.t denotes an integer of one or more, [α] denotes a share where cc is securely shared supposing α to be an arbitrary vector, {{β }} denotes a share where β is securely shared supposing β to be an arbitrary permutation, v denotes an m-dimensional vector v ∈ F.sup.m, d denotes a vector d ∈ F.sup.nt consisting of elements of a set of input values of a prescribed lookup table, and r denotes a vector consisting of elements of a set of output values of the lookup table, the method comprises, by processing circuitry of the plurality of secure computation apparatuses: a first combining step in which a first combining part generates a share [v′] of a vector v′ ∈ F.sup.m+nt in which the vector d and the vector v are combined using a share [d] of the vector d and a share [v] of the vector v, wherein each of the plurality of secure computation apparatuses communicate over a network and receive as an input the share [d] and the share [v] while the vector d and the vector v remain concealed from each of the plurality of secure computation apparatuses; a difference calculation step in which a difference calculation part generates a share [r″] of a vector r″ that has a difference between a certain element of the vector r and an element before the certain element as an element corresponding to the certain element using a share [r] of the vector r; a second combining step in which a second combining part generates a share [r′] of a vector r′ ∈ F.sup.m+nt in which the vector r″ and an m-dimensional zero vector are combined using the share [r″]; a permutation calculation step in which a permutation calculation part generates a share {{σ}} of a permutation σ that stably sorts the vector v′ in ascending order using the share [v′]; a permutation application step in which a permutation application part generates a share [s] of a vector s: =σ(r′) obtained by applying the permutation σ to the vector r′ using the share [r′] and the share {{σ}}; a vector generation step in which a vector generation part generates a share [s′] of a vector s′ that has a total sum from a first element of the vector s to a certain element as an element corresponding to the certain element using the share [s]; an inverse permutation application step in which an inverse permutation application part generates a share [s″] of a vector s″ obtained by applying an inverse permutation σ.sup.−1 of the permutation σ to the vector s′ using the share [s′] and the share {{σ}}; and an output step in which an output part generates a share [x] of a vector x ∈ F.sup.m consisting of (n.sub.t+1)th and subsequent elements of the vector s″ using the share [s″] ], the vector x being the final calculation result and being concealed from each of the plurality of secure computation apparatuses.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1)
(2)
(3)
DETAILED DESCRIPTION OF THE EMBODIMENTS
(4) Hereinafter, an embodiment of the present invention will be described in detail. Note that component parts having the same functions in the drawings will be denoted by the same reference numerals, and redundant description will be omitted.
(5) A configuration example of a secure table reference system of the embodiment will be described with reference to
(6) A configuration example of the secure computation apparatus 1 (n=1, . . . , N) included in the secure table reference system will be described with reference to
(7) Note that processing of each step is performed by secure computation. That is, the secure computation apparatus 1.sub.n performs the processing of each step without restoring a share, in other words, without knowing contents of the share.
(8) The secure computation apparatus 1.sub.n is a special apparatus in which a special program is read into a known or dedicated computer including, for example, a central processing unit (CPU) and a random access memory (RAM). The secure computation apparatus 1.sub.n performs each processing, for example, under control of the central processing unit. Data input into the secure computation apparatus 1.sub.n or data obtained in each processing is stored in, for example, the random access memory, and the data stored in the random access memory is read out to the central processing unit and used for other processing as needed. At least a part of each processing part of the secure computation apparatus 1.sub.n may be made of hardware such as an integrated circuit.
(9) A processing procedure of the secure table reference method executed by the secure table reference system of the embodiment will be described with reference to
(10) <Step S1>
(11) A share [d] of a vector d and a share [v] of a vector v are input into the first combining parts 11.sub.1, . . . , 11.sub.N.
(12) The first combining parts 11.sub.1, . . . , 11.sub.N combine the share [d] and share [v] to generate a share [v′] ∈ [F].sup.m+nt. In more detail, the first combining parts 11.sub.1, . . . , 11.sub.N use the share [d] and share [v] to generate the share [v′] of a vector v′ ∈ F.sup.m+nt in which the vector d and vector v are combined (step S1).
(13) The generated share [v′] is output to the permutation calculation parts 14.sub.1, . . . , 14.sub.N.
(14) F denotes an arbitrary field, in denotes an integer greater than or equal to 2, and n.sub.t denotes an integer greater than or equal to 1. Further, v denotes an m-dimensional vector v ∈ F.sup.m, and d denotes a vector d ∈ F.sup.nt consisting of elements of a set of input values of a prescribed lookup table. The vector v is, for example, a vector consisting of attribute values of a certain attribute in a table. Supposing α to be an arbitrary vector, [α] denotes a share where α is securely shared.
(15) In superscript of [F].sup.m+nt and F.sup.nt, nt means “n.sub.t”. In this way, in the superscript, expressions of further superscript and subscript may be omitted.
(16) For example, when a lookup table t is t: {0, 1, 2, 3}.fwdarw.{1, 5, 2, 3}, the vector d=(0, 1, 2, 3).sup.T. At this time, when the vector v=(1, 3, 1).sup.T, the vector v′=(0, 1, 2, 3, 1, 3, 1).sup.T.
(17) <Step S2>
(18) A share [r] of a vector r is input into the difference calculation parts 12.sub.1, . . . , 12.sub.N.
(19) The difference calculation parts 12.sub.1, . . . , 12.sub.N generate a share [r″] on the basis of the share [r]. In more detail, the difference calculation parts 12.sub.1, . . . , 12.sub.N use the share [r] to generate the share [r″] of a vector r″ that has a difference between a certain element of the vector r and an element before the certain element as an element corresponding to the certain element (step S2).
(20) The generated share [r″] is output to the second combining parts 13.sub.1, . . . , 13.sub.N.
(21) The vector r is a vector consisting of elements of a set of output values of the lookup table.
(22) An ith element of the vector r″ is (an ith element of the vector r)-(a (i−1)th element of the vector r). However, when i=1, the ith element of the vector r″ is the ith element of the vector r. That is, the first element of the vector r″ is the first element of the vector r.
(23) For example, when the lookup table t is t: {0, 1, 2, 3}.fwdarw.{1, 5, 2, 3}, the vector r=(1, 5, 2, 3).sup.T. At this time, the vector r″=(1, 4, −3, 1).sup.T.
(24) <Step S3>
(25) The share [r″] is input into the second combining parts 13.sub.1, . . . , 13.sub.N.
(26) The second combining parts 13.sub.1, . . . , 13.sub.N combine the share [r″] and a zero vector to generate a share [r′] ∈ [F].sup.m+nt. In more detail, the second combining parts 13.sub.1, . . . , 13.sub.N use the share [r″] to generate the share [r′] of a vector r′ ∈ F.sup.m+nt in which the vector r″ and m-dimensional zero vector are combined (step S3).
(27) The generated share [r′] is output to the permutation application parts 15.sub.1, . . . , 15.sub.N.
(28) For example, when the vector r″=(1, 4, −3, 1).sup.T and m=3, the vector r′=(1, 4, −3, 1, 0, 0, 0).sup.T.
(29) <Step S4>
(30) The share [v′] is input into the permutation calculation parts 14.sub.1, . . . , 14.sub.N.
(31) The permutation calculation parts 14.sub.1, . . . , 14.sub.N generate {{σ}} of the share [v′]. In more detail, the permutation calculation parts 14.sub.1, . . . , 14.sub.N use the share [v′] to generate the share {{σ}} of a permutation σ that stably sorts the vector v′ in ascending order (step S4).
(32) The generated share {{σ}} is output to the permutation application parts 15.sub.1, . . . , 15.sub.N.
(33) The stable sorting means that order of equivalent data before sorting is preserved after sorting as well. Supposing β to be an arbitrary permutation, {{β}} is a share where β is securely shared.
(34) The generation of the sort {{σ}} can be performed, for example, by a method described in the following Reference literature 1. [Reference literature 1] Dai Ikarashi, Koki Hamada, Ryo Kikuchi, and Koji Chida, “An Improvement of Secure Sorting toward 1 sec. Response on Internet,” 2014 Symposium on Cryptography and Information Security
(35) For example, when the vector v′=(0, 1, 2, 3, 1, 3, 1).sup.T, the permutation σ is as shown in the following Formula (1).
(36)
(37) <Step S5>
(38) The share [r′] and share {{σ}} are input into the permutation application parts 15.sub.1, . . . , 15.sub.N.
(39) The permutation application parts 15.sub.1, . . . , 15.sub.N apply {{σ}} to the share [r′] to generate a share [s]: =[σ(r′)]. In more detail, the permutation application parts 15.sub.1, . . . , 15.sub.N use the share [r′] and share {{σ}} to generate the share [s] of a vector s: =σ(r′) obtained by applying the permutation σ to the vector r′ (step S5).
(40) The generated share [s] is output to the vector generation parts 16.sub.1, . . . , 16.sub.N.
(41) The application of the permutation {{σ}} can be performed by the method described in Reference literature 1.
(42) For example, the vector r′=(1, 4, −3, 1, 0, 0, 0).sup.T, and when the permutation σ is a permutation shown in Formula (1), the vector s=(1, 4, 0, 0, −3, 1, 0).sup.T.
(43) <Step S6>
(44) The share [s] is input into the vector generation parts 16.sub.1, . . . , 16.sub.N.
(45) The vector generation parts 16.sub.1, . . . , 16.sub.N generate a prefix-sum [s′] of the share [s]. In more detail, the vector generation parts 16.sub.1, . . . , 16.sub.N use the share [s] to generate the share [s′] of the vector s′ that has a total sum from a first element of the vector s to a certain element as an element corresponding to the certain element (step S6).
(46) The generated share [s′] is output to the inverse permutation application parts 17.sub.1, . . . , 17.sub.N.
(47) For example, when the vector s=(1, 4, 0, 0, −3, 1, 0).sup.T, the vector s′=(1, 5, 5, 5, 2, 3, 3).sup.T.
(48) <Step S7>
(49) The share [s′] and share {{σ}} are input into the inverse permutation application parts 17.sub.1, . . . , 17.sub.N.
(50) The inverse permutation application parts 17.sub.1, . . . , 17.sub.N inversely apply {{σ}} to the share [s′] to generate a share [s″]. In more detail, the inverse permutation application parts 17.sub.1, . . . , 17.sub.N use the share [s′] and share {{σ}} to generate the share [s″] of the vector s″ obtained by applying an inverse permutation σ.sup.−1 of the permutation σ to the vector s′ (step S7).
(51) The generated share [s″] is output to the output parts 18.sub.1, . . . , 18.sub.N.
(52) The application of the inverse permutation {{σ.sup.−1}} can be performed, for example, by a method described in the following Reference literature 2. [Reference literature 2] Naoto Kiribuchi, Dai Ikarashi, Gembu Morohashi, and Koki Hamada, “An Efficient Equi-join Algorithm for Secure Computation and Its Implementation toward Secure Comprehensive Analyses of Users' Attribute and History Information,” Computer Security Symposium 2016
(53) For example, when the vector s′=(1, 5, 5, 5, 2, 3, 3).sup.T and the permutation σ is the permutation shown in Formula (1), the vector s″=(1, 5, 2, 3, 5, 3, 5).sup.T.
(54) Note that the application of the inverse permutation σ.sup.−1 means inversely applying the permutation σ.
(55) <Step S8>
(56) The share [s″] is input into the output parts 18.sub.1, . . . , 18.sub.N.
(57) The output parts 18.sub.1, . . . , 18.sub.N output a string of (n.sub.t+1)th and subsequent elements of the share [s″]. In more detail, the output parts 18.sub.1, . . . , 18.sub.N use the share [s″] to generate a share [x] of a vector x ∈ F.sup.m consisting of (n.sub.t+1)th and subsequent elements of the vector s″ (step S8).
(58) The generated share [x] is output as a final calculation result by the secure table reference system.
(59) For example, when the vector s″=(1, 5, 2, 3, 5, 3, 5).sup.T and n.sub.t=4, the vector x=(5, 3, 5).sup.T.
(60) When the lookup table t is t: {0, 1, 2, 3}.fwdarw.{1, 5, 2, 3} and the vector v=(1, 3, 1).sup.T, the vector x=(5, 3, 5).sup.T is a reference result of the lookup table t with respect to the vector v=(1, 3, 1).sup.T.
(61) In this way, it is possible to reduce communication volume compared with the prior technique by using the inverse permutation σ.sup.−1.
(62) As described above, the embodiment of the present invention has been described, but specific configurations are not limited to the embodiment, and it goes without saying that even if there is a change or the like in design as appropriate without departing from the scope of the present invention, it is included in the invention. The various processes described in the embodiment may be performed not only in chronological order according to the described order, but also in parallel or individually according to processing capability of a apparatus that performs the processes or as needed.
(63) [Program and Recording Medium]
(64) When various processing functions in each apparatus described in the embodiment are implemented by a computer, processing contents of functions which each apparatus should include are described by a program. Then, the computer executes the program, and thereby the various processing functions in each apparatus are implemented on the computer.
(65) The program describing the processing contents can be recorded in a computer-readable recording medium. The computer-readable recording medium may be any recording medium, for example, a magnetic recording apparatus, an optical disk, a magneto-optical recording medium, and a semiconductor memory.
(66) Distribution of this program is carried out, for example, by selling, transferring, or lending a portable recording medium such as a DVD or a CD-ROM on which the program is recorded. Furthermore, the program may be stored in a storage apparatus of a server computer, transferred from the server computer to another computer via a network, and thereby distributed.
(67) A computer that executes such a program, for example, first stores the program recorded on the portable recording medium or the program transferred from the server computer temporarily in its own storage apparatus. Then, when executing processing, the computer reads the program stored in its own storage apparatus and performs the processing according to the read program. As another execution form of the program, the computer may directly read the program from the portable recording medium and perform the processing according to the program, or further may sequentially execute processing according to a received program every time the program is transferred from the server computer to the computer. In addition, the above-described processing may be performed by the so-called ASP (Application Service Provider) type service that implements a processing function only by execution instructions and result acquisition, without transferring the program from the server computer to the computer. Note that the program in the embodiment includes information which is used for processing by the computer and is similar to the program (data or the like that is not a direct command to the computer but has properties that define processing of the computer).
(68) In the embodiment, the apparatus is configured by executing the predetermined program on the computer, but at least a part of the processing contents may be implemented by hardware.
DESCRIPTION OF REFERENCE NUMERALS
(69) 1.sub.1, . . . , 1.sub.N Secure computation apparatus 11.sub.1, . . . , 11.sub.N First combining part 12.sub.1, . . . , 12.sub.N Difference calculation part 13.sub.1, . . . , 13.sub.N Second combining part 14.sub.1, . . . , 14.sub.N Permutation calculation part 15.sub.1, . . . , 15.sub.N Permutation application part 16.sub.1, . . . , 16.sub.N Vector generation part 17.sub.1, . . . , 17.sub.N Inverse permutation application part 18.sub.1, . . . , 18.sub.N Output part 2 Communication network