Interface layer for electronic devices
09716243 ยท 2017-07-25
Assignee
Inventors
- Neil Mcsporran (Perrysburg, OH)
- Gary Robert Nichol (Culcheth, GB)
- David Alan Strickler (Toledo, OH)
- Kevin David Sanderson (Upholland, GB)
Cpc classification
H10K50/814
ELECTRICITY
H10K50/828
ELECTRICITY
International classification
B32B15/04
PERFORMING OPERATIONS; TRANSPORTING
Abstract
Transparent conducting electrodes incorporate an interface layer located on the transparent conducting oxide (TCO) layer of the electrode. The interface layer offers a suitable surface for deposition of further layers in order to fabricate electronic devices such as electrochromic devices or organic light emitting diodes. Problems such as pinholes and short circuiting, associated with the inherent roughness of the TCO layer, are reduced.
Claims
1. A transparent conducting electrode incorporated in an electrochromic device or an organic light emitting diode comprising: an electrically conducting coating stack located on a transparent substrate, the stack comprising in sequence from the transparent substrate: at least two underlayers, wherein one of the at least two underlayers comprises a layer of SnO.sub.2 and another of the at least two underlayers comprises a layer of SiO.sub.2; and a transparent conducting oxide (TCO) layer located directly on the at least two underlayers and comprising fluorine doped tin oxide with a thickness of 2300 ngstrom to 3400 ngstrom, and wherein the electrode comprises a smoothing interface layer located directly on the TCO layer, the interface layer comprising one or more materials selected from TiO.sub.2, SiO.sub.2, SnO.sub.2 and ZnO; and wherein the transparent conducting electrode comprises a sheet resistance in the range of 13.6 to 20.0 ohm/sq.
2. The electrode according to claim 1, wherein the interface layer comprises a TiO.sub.2 layer having a thickness greater than 5 nm.
3. The electrode according to claim 1, wherein the interface layer comprises ZnO, having a thickness between 25 and 80 nm.
4. A method of manufacturing a transparent conducting electrode incorporated in an electrochromic device or an organic light emitting diode comprising the steps of: depositing at least two underlayers on a transparent substrate wherein one of the at least two underlayers comprises a layer of SnO.sub.2 and another of the at least two underlayers comprises a layer of SiO.sub.2; depositing a transparent conducting oxide layer (TCO) directly on the at least two underlayers, wherein the TCO layer comprises fluorine doped tin oxide with a thickness of 2300 ngstrom to 3400 ngstrom; and depositing a smoothing interface layer on the TCO, wherein the interface layer comprises a layer selected from the group consisting of TiO.sub.2, SiO.sub.2, SnO.sub.2 or ZnO and, wherein the transparent conducting electrode comprises a sheet resistance in the range 13.6 to 20.0 ohm/sq.
5. The method according to claim 4, wherein the underlayers, TCO and interface layer are deposited by Chemical Vapour Deposition (CVD).
6. The method according to claim 5, wherein the underlayers, TCO and interface layer are deposited on a continuous glass ribbon during the float glass manufacturing process.
7. The method according to claim 5, wherein the underlayers, TCO and interface layer are deposited by Plasma Enhanced CVD.
8. The method according to claim 4, wherein the underlayers, TCO and interface layer are deposited by sputtering.
9. The method according to claim 4, comprising the step of depositing an interface layer of TiO.sub.2 to a thickness of greater than 5 nm.
10. The method according to claim 4, comprising the step of depositing an interface layer of ZnO, to a thickness between 25 and 80 nm.
11. The method according to claim 4, further comprising the step of exposing the interface layer to ultraviolet (UV) radiation.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The invention will now be described with reference to the accompanying figures in which:
(2)
(3)
(4)
(5)
(6) All of the figures are for illustrative purposes only and the relative thicknesses of the layers are not to scale.
DETAILED DESCRIPTION OF THE INVENTION
(7) Referring to
(8) The TCO layer 4 typically has a rough surface (although the scale of the roughness is exaggerated for illustrative purposes here) which can give rise to problems during device operation as previously alluded to.
(9) Referring to
(10) During operation, an electrical potential is applied between transparent conducting layers 4 and 8 which causes redox reactions to occur in the electrochromic and ion storage layers 7 and 5, with charge compensation by ion migration across the ion conductor layer 6. Typically, Li.sup.+ ions are used in the ion conductor layer 6.
(11) These reactions are accompanied by changes in colour/transmission of the electrochromic layer 7.
(12) The various layers may be deposited by techniques that are well known to a person skilled in the art, such as sputtering, PECVD (Plasma Enhanced Chemical Vapour Deposition) or solution deposition. Moreover the skilled person will be aware that some electrochromic devices may incorporate additional layers to those shown in this example.
(13) According to the invention, the device incorporates a further interface layer 10 between the TCO layer 4 and the ion storage layer 5. In this example interface layer comprises TiO.sub.2 and its inclusion mitigates the problems associated with roughness of the TCO layer 4.
(14) Referring to
(15) During operation, a voltage is applied between the electrodes and electron-hole recombination in the region of the emissive layers give rise to excitons' (a bound state of the electron-hole combination) which on relaxation give rise to an emission in the visible region. Light thus generated exits the device through the transparent substrate 1.
(16) According to the invention, the device incorporates a further interface layer 10 between the TCO layer 4 and the HIL 5. In this example interface layer comprises TiO.sub.2 and its inclusion mitigates the problems associated with roughness of the TCO layer 4.
Examples 1-9
(17) A series of samples were prepared on 3.2 mm glass substrate. Each sample incorporated a stack of SiO.sub.2 (example 9 only)/SnO.sub.2/SiO.sub.2/SnO2:F layers of varying thickness topped by an interface layer of TiO.sub.2, SnO.sub.2 or SiO.sub.2. The samples are detailed in table 1 (layer thicknesses in Angstrom) along with an indication of observed sheet resistance and transmittance.
(18) The stack interface layers were deposited by atmospheric pressure CVD.
(19) TABLE-US-00001 TABLE 1 Physical Properties of Transparent Electrodes with Interface Layers Example 1 2 3 4 5 6 7 8 9 Glass 3.2 mm 3.2 mm 3.2 mm 3.2 mm 3.2 mm 3.2 mm 3.2 mm 3.2 mm 3.2 mm SiO2 150 SnO2 250 300 250 250 250 250 250 250 250 SiO2 250 220 250 250 250 250 250 250 250 SnO2:F 3400 2300 3400 7600 3400 3400 3400 3400 3400 TiO2 400 200 200 100 50 200 SnO2 1000 SiO2 200 Rs (ohm/sq) 13.6 20.0 13.6 6.0 13.6 13.6 13.6 13.6 13.6 % T 84.5 65.1 77.3 74.2 82.6 84.1 81.1 85.3 77.3
(20) Note that the resistivities of TiO.sub.2 and SiO.sub.2 are both in excess of 1 M.Math.cm. The transmission values are likely to change when these stacks are incorporated in an actual device as reflectance is affected by the adjacent layers.
Example 10
(21) A transparent conductive oxide was deposited on a glass substrate with the structure glass/SnO.sub.2(60 nm)/SiO.sub.2(15 nm)SnO.sub.2:F(720 nm). 25 nm of undoped tin oxide was deposited on top. Table 2 shows the properties with and without the additional undoped tin oxide layer. Surprisingly the sheet resistance of the coating is not substantially affected by the addition of a highly resistive layer
(22) TABLE-US-00002 TABLE 2 Coated side Sheet Tvis reflection Resistance Haze Reference 82.1% 10.0% 8.7/ 11.0% Tin oxide 81.2% 10.4% 8.7/ 11.5% buffer coated
(23) The TCO was used in a photovoltaic module resulting in an improved Voc and FF as shown in Table 3
(24) TABLE-US-00003 TABLE 3 Normalised performance data for Photovoltaic Device incorporating Interface Layer Jsc Voc FF Reference 1.00 1.00 1.00 Tin oxide 1.00 1.01 1.01 buffer coated
Examples 11-16
(25) A series of experiments were conducted to deposit ZnO layers on various substrate to further investigate the suitability of this material as an interface layer according to the invention.
(26) For examples 11-15, the deposition was done using a dynamic laboratory scale coater as illustrated in
(27) The reactants (DEZ and t-butyl acetate) were delivered by passing N.sub.2 carrier gas through bubblers (not shown). The DEZ and t-butyl acetate bubbler temperatures were 100 C. and 85 C. respectively. Reactant quantities are expressed in terms of the total gas flow that reaches the substrate surface.
(28) Example 16 was done on-line by atmospheric pressure CVD, on a float glass ribbon produced during the float glass manufacturing process. In this case, a thin film evaporator as described in U.S. Pat. No. 5,090,985 was used to deliver the reactants, whose quantities are again expressed as a percentage of total gas flow.
(29) Table 4 summarises the reaction conditions used to generate examples 11-16. SLPM=Standard Liters per Minute; TEC10FS and TEC10 are Nippon Sheet Glass Group products comprising coated glass substrates providing a transparent conducting electrode based on a fluorine doped tin oxide.
(30) TABLE-US-00004 TABLE 4 DEZ bubbler t-butyl acetate Total gas % t-butyl flow bubbler flow flow Linespeed Sample % DEZ acetate (SLPM)* (SLPM) (SLPM) (inch/min) Substrate 11 1 5 0.28 0.91 36 200 SiO2 coated glass 12 1 10 0.28 1.82 36 200 SiO2 coated glass 13 1.3 10 0.37 1.82 36 200 TEC10FS 14 3 4 0.85 0.62 36 150 TEC10 15 3 4 0.85 0.62 36 150 SiO2 coated glass 16 1.5 4 630 318 TEC10
(31) Table 5 summarises, for examples 11-16, measured values for ZnO thickness (in Angstrom), percentage haze, percentage visible transmission (Tvis), and sheet resistance of the sample Rs.
(32) TABLE-US-00005 ZnO Sample thickness % Haze % Tvis Rs 11 246 0.33 92.1 12 383 0.43 91.4 13 416 3.25 86.0 10.65 14 660 1.13 85.1 12.70 15 800 0.26 85.3 16 251 2.12 86.4 18.62
(33) The transmission levels for all of examples 11-16 indicate that the addition of a Zinc oxide layer has not caused any significant absorption. Haze levels on the silica coated substrates indicate an inherently smooth coating, and the roughness levels when coated on TEC 10 are similar to the substrate values.
(34) Sheet resistance has been increased slightly by the over coat, but still in the range suitable for PV devices.