Integrated MOS Varicap, and Voltage Controlled Oscillator and Filter Having Same

Abstract

Each of varicaps 50A to 50C configured to be connected in parallel is an MOS capacitor III produced under a common and single process condition. Each of the varicaps 50A to 50C has a conductor layer serving as a second electrode and formed via a capacitance insulating film on a first conductivity-type semiconductor substrate serving as a first electrode, and a second conductivity-type impurity region formed near a surface in proximity to a region of the first conductivity-type semiconductor substrate opposing the conductor layer. Each of the varicaps 50A to 50C is configured such that a capacitance value as a capacitance element between the first conductivity-type semiconductor substrate serving as the first electrode and the conductor layer serving as the second electrode is changed by applying a control voltage to the conductor layer while applying any one of a plurality of types of direct-current voltages having different voltages to the second conductivity-type impurity region.

Claims

1. An integrated MOS varicap which is a varicap assemblage composed of a plurality of varicaps connected in parallel, wherein each of the varicaps is an MOS capacitor produced under a common and single process condition; each of the varicaps has a conductor layer serving as a second electrode and formed via a capacitance insulating film on a first conductivity-type semiconductor substrate serving as a first electrode, and a second conductivity-type impurity region formed near a surface in proximity to a region of the first conductivity-type semiconductor substrate opposing the conductor layer; and each of the varicaps is configured such that a capacitance value as a capacitance element between the first conductivity-type semiconductor substrate serving as the first electrode and the conductor layer serving as the second electrode is changed by applying a control voltage to the conductor layer while applying any one of a plurality of types of direct-current voltages, which serve as reverse voltages of a diode composed of the first conductivity-type semiconductor substrate and the second conductivity-type impurity region and which have different voltages, to the second conductivity-type impurity region.

2. An integrated MOS varicap which is a varicap assemblage composed of a plurality of varicaps connected in parallel, wherein each of the varicaps is an MOS capacitor produced under a common and single process condition; each of the varicaps has a conductor layer serving as a second electrode and formed via a capacitance insulating film on a first conductivity-type semiconductor substrate serving as a first electrode, a second conductivity-type impurity region formed near a surface in proximity to a region of the first conductivity-type semiconductor substrate opposing the conductor layer, and a first conductivity-type high concentration layer formed near a surface only in the region opposing the conductor layer so as to be fully covered with the conductor layer on the first conductivity-type semiconductor substrate; and each of the varicaps is configured such that a capacitance value as a capacitance element between the first conductivity-type semiconductor substrate serving as the first electrode and the conductor layer serving as the second electrode is changed by applying a control voltage to the conductor layer while applying any one of a plurality of types of direct-current voltages, which serve as reverse voltages of a diode composed of the first conductivity-type semiconductor substrate and the second conductivity-type impurity region and which have different voltages, to the second conductivity-type impurity region.

3. The integrated MOS varicap according to claim 1, wherein each of the varicaps is composed of a plurality of unit varicaps which are connected in parallel, and to each of which a direct-current voltage identical with the direct-current voltage is applied, and wiring connected to each of the unit varicaps is changed, as appropriate, whereby arbitrary capacitance characteristics responsive to the control voltage are imparted to each of the unit varicaps.

4. The integrated MOS varicap according to claim 2, wherein the arbitrary capacitance characteristics responsive to the control voltage are imparted by selectively cutting a fuse connected to each of the unit varicaps to make a change in the wiring.

5. A voltage controlled oscillator having the integrated MOS varicap according to claim 3 as a variable capacitance element defining an oscillation frequency.

6. A filter having the integrated MOS varicap according to claim 4 as a variable capacitance element defining a cut-off frequency.

7. A voltage controlled oscillator, comprising the integrated MOS varicap according to claim 1 as a variable capacitance element defining an oscillation frequency.

8. A voltage controlled oscillator, comprising the integrated MOS varicap according to claim 2 as a variable capacitance element defining an oscillation frequency.

9. A voltage controlled oscillator, comprising the integrated MOS varicap according to claim 3 as a variable capacitance element defining an oscillation frequency.

10. A voltage controlled oscillator, comprising the integrated MOS varicap according to claim 4 as a variable capacitance element defining an oscillation frequency.

11. A voltage controlled oscillator, comprising the integrated MOS varicap according to claim 5 as a variable capacitance element defining an oscillation frequency.

12. A voltage controlled oscillator, comprising the integrated MOS varicap according to claim 6 as a variable capacitance element defining an oscillation frequency.

13. A filter, comprising the integrated MOS varicap according to claim 1 as a variable capacitance element defining a cut-off frequency.

14. A filter, comprising the integrated MOS varicap according to claim 2 as a variable capacitance element defining a cut-off frequency.

15. A filter, comprising the integrated MOS varicap according to claim 3 as a variable capacitance element defining a cut-off frequency.

16. A filter, comprising the integrated MOS varicap according to claim 4 as a variable capacitance element defining a cut-off frequency.

17. A filter, comprising the integrated MOS varicap according to claim 5 as a variable capacitance element defining a cut-off frequency.

18. A filter, comprising the integrated MOS varicap according to claim 6 as a variable capacitance element defining a cut-off frequency.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0030] FIG. 1 is a circuit diagram of VCO incorporating an integrated MOS varicap according to an embodiment of the present invention.

[0031] FIG. 2 is a schematic sectional view showing the structure of an MOS capacitor constituting a varicap in the present embodiment.

[0032] FIG. 3 is a characteristic diagram showing the relationship between the capacitance value C of the varicap and a control voltage V.sub.c, with a direct-current voltage V1 as a parameter.

[0033] FIG. 4 is a circuit diagram showing an example of connection of the varicaps, each as an assemblage of unit varicaps, classified by type.

[0034] FIG. 5 is a characteristic diagram showing the characteristics of oscillation frequency (f.sub.0) of VCO I according to the present embodiment in response to the control voltage V.sub.c.

[0035] FIG. 6 is a schematic sectional view showing the structure of an MOS capacitor constituting a varicap in another embodiment.

[0036] FIG. 7 is a circuit diagram showing VCO II incorporating an MOS capacitor shown in prior art (Patent Document 1).

MODE FOR CARRYING OUT THE INVENTION

[0037] An embodiment of the present invention will be described in detail based on the accompanying drawings.

[0038] FIG. 1 is a circuit diagram of VCO I incorporating an integrated MOS varicap III according to an embodiment of the present invention. In the present embodiment, as shown in the drawing, the VCO I has the same configuration as that of the VCO II shown in FIG. 7, except for the section of the integrated MOS varicap III, and except that capacitors C.sub.p 130 for cutting off a direct-current voltage are connected not only to an external connection terminal 121, but also to an external connection terminal 122. Thus, the same parts as in FIG. 7 are assigned the same numerals as in FIG. 7, and duplicate explanations are omitted.

[0039] As shown in FIG. 1, the integrated MOS varicap III has a plurality of (3 in the present embodiment) varicaps, 50A, 50B, 50C, connected in parallel, and 2 sets of the varicaps 50A, 50B, 50C are arranged laterally symmetrically in the drawing (a total of 6 varicaps, 50A, 50B, 50C on the left side and 50A, 50B, 50C on the right side). These varicaps 50A, 50B, 50C are produced under a common and single process condition. However, any one of 3 types of direct-current voltages (to be described in detail later) is applied to an N.sup.+ type impurity region (will be described in detail later) of each of the varicaps 50A, 50B, 50C, and three different types of capacitance/control voltage characteristics are imparted, with the applied direct-current voltage as a parameter. If classified by the capacitance/control voltage characteristics, the first type of the varicap is the varicap 50A (will be hereinafter referred to as the first type), the second type of the varicap is the varicap 50B (hereinafter, the second type), and the third type of the varicap is the varicap 50C (hereinafter, the third type).

[0040] FIG. 2 is a schematic sectional view showing the structure of an MOS capacitor constituting the above three types of varicaps, 50A, 50B and 50C (since the varicaps 50A to 50C are elements of the same configuration prepared under the common and single process condition, they are generically expressed as varicaps 50). As shown in the drawing, a P.sup. type semiconductor substrate 51 is provided with a gate electrode 53, which has been formed from polysilicon constituting the MOS capacitor, via an insulating film 54. In proximity to a region of the P.sup. type semiconductor substrate 51 opposing the gate electrode 53, an N.sup.+ type impurity region 52 is formed. In a region of the insulating film 54 opposing the N.sup.+ type impurity region 52, a contact hole 54a is formed so that a direct-current voltage V can be applied to the N.sup.+ type impurity region 52.

[0041] In the varicap 50, the N.sup.+ type impurity region 52 is provided close to the region opposing the gate electrode 53, as mentioned above, and a direct-current voltage V1 serving as a reverse voltage of a diode composed of the P.sup. type semiconductor substrate 51 and the N.sup.+ type impurity region 52 is applied to the N.sup.+ type impurity region 52. As a result, minority carriers gathering in the surface of the substrate are absorbed to the N.sup.+ type impurity region 52 biased in the reverse direction, and a strong inversion state minimally occurs. That is, thanks to the N.sup.+ type impurity region 52 biased reversely, the thickness of a depletion layer grows, without saturating, in response to an increase in the voltage applied to the gate electrode 53. Consequently, a large variable width of the capacitance value C can be ensured. Incidentally, the capacitance value C of the varicap 50 is the series combined capacitance of the capacitance value C.sub.0 of the insulating film 54 and the capacitance value of a depletion layer 55. Therefore, the combined capacitance value decreases with an increase in the control voltage V.sub.c applied to the gate electrode 53.

[0042] FIG. 3 is a characteristic diagram showing the relationship between the capacitance value C of the varicap 50 and the control voltage V.sub.c, with the direct-current voltage V1 as a parameter. In the drawing, a dashed line represents the characteristics at a direct-current voltage V1=GND potential, a dashed dotted line represents the characteristics at V1=1.0 [V], a dashed double-dotted line represents the characteristics at V1=1.65 [V], and a solid line represents the characteristics at V1=3.3 [V]. Reference to this drawing shows that the higher the direct-current voltage V1, the greater the control voltage V.sub.c at which the capacitance value C is saturated becomes, and the wider the variable capacitance region becomes accordingly.

[0043] The varicaps 50A to 50C, the first to third types of varicap 50 in the present embodiment, are each constituted as an assemblage of a plurality of unit varicaps 50A1, 50B1, 50C1. That is, as shown in FIG. 4, a plurality of the unit varicaps 50A1s, 50B1s, 50C1s, which constitute the first to third types of varicaps, respectively, are connected in parallel in such a manner as to be classified by group to which the same direct-current voltage V1 is applied. In the present embodiment, the direct-current voltage V1 for the first group is 3.3 [V], the direct-current voltage V1 for the second group is 1.65 [V], and the direct-current voltage V1 for the third group is 1.0 [V]. Thus, each unit varicap 50A1, 50B1 or 50C1 has the corresponding capacitance value/control voltage characteristics shown in FIG. 3. Furthermore, the unit varicaps 50A1, 50B1, 50C1 can constitute an MOS capacitor of any combined capacitance value imparting arbitrary characteristics, by selectively cutting a fuse F connected halfway through the wiring leading to each element.

[0044] The direct-current voltage V1 of varying type can be obtained suitably from a power supply voltage V.sub.cc, or by dividing the power supply voltage V.sub.cc appropriately with the use of a voltage-dividing resistor. On this occasion, it is possible, without doubt, to utilize a reference voltage V.sub.ref of a power supply circuit, which stably outputs a more accurate voltage value than the power supply voltage V.sub.cc, or a voltage resulting from the division of the reference voltage V.sub.ref. Utilization of the reference voltage V.sub.ref is more preferred, because it stabilizes the direct-current voltage V1, and can thus stabilize the characteristics of the unit varicaps 50A1, 50B1, 50C1 as well.

[0045] As for the oscillation frequency of VCO I, on the other hand, as the control voltage V.sub.c increases, namely, as the capacitance value C decreases, an oscillation frequency F.sub.0 rises, as shown in FIG. 5. When the varicap 50 in the present embodiment having a great variable capacitance range is applied, a VCO I having a correspondingly great oscillation frequency range can be constructed. Besides, a plurality of types of varicaps 50 with different values of the direct-current voltage V1 are combined, as appropriate, whereby oscillation frequency characteristics ensuring a desired linearity, for example, as indicated by the characteristics C can be obtained, even if variations in the characteristics of the crystal resonator 110 or the like of the VCO I occur. The characteristics C are characteristics upon relative increases in the numbers of the second and third types as compared with the first type, while the characteristics D are obtained by increasing the number of the third types further. The characteristics A are obtained, for example, by forming all of the varicaps from the first type, whereas the characteristics B are obtained by forming some of the varicaps from the second or third type.

[0046] In the VCO I in general use, the control voltage V.sub.c is unipolar, and a voltage of, say, 0 V to +3 V or to +4V is used, but a negative voltage is not used, as the control voltage. In order to secure a large variable width of capacitance within this positive voltage range, therefore, it suffices to increase the capacitance when the control voltage is 0 V. This increase in the capacitance may be achieved by producing a varicap configured such that a dense P type layer is formed near the surface of the P.sup. type semiconductor substrate 51 by means of ion implantation or the like, so that the thickness of the depletion layer when the voltage at the gate electrode 53 is 0 V or less can be kept small. That is, as shown in FIG. 6, a P+ type layer 57 is provided in a region of a varicap 60 opposing a gate electrode 53, whereby the thickness of the depletion layer when the gate electrode 53 is at 0 V or less can be kept down to a small value, and the capacitance at a control voltage V.sub.c of 0 V is rendered high. With such a varicap 60, the variable width of the capacitance value C can be made greater than in the varicap 50. That is, according to the present embodiment, the varicap 60 has a first conductivity-type high concentration layer, and thus can be configured as an MOS varicap having an even wider variable capacitance range than in the first embodiment. Consequently, the same actions and effects as those in the first embodiment can be rendered further remarkable.

[0047] In the foregoing embodiments, the MOS capacitor of the present invention formed on the P.sup. substrate has been described. Such an MOS capacitor, however, can be prepared on a P well. It goes without saying, moreover, that an impurity region of a type opposite to that in the above embodiments is formed on an N substrate or an N well, whereby an MOS capacitor having an electrically opposite polarity can be produced.

[0048] The aforementioned embodiments have been described in connection with the application of the integrated MOS varicap III to VCO, but this is not limitative. For example, the integrated MOS varicap III can be applied to a variable capacitance element and a filter which define a cut-off frequency. In this case, the cut-off frequency characteristics of the filter can be optimized easily and unerringly.

INDUSTRIAL APPLICABILITY

[0049] The present invention can be effectively used in industrial fields concerned with the manufacture and sale of electronic devices utilizing variable capacitance.

EXPLANATIONS OF LETTERS OR NUMERALS

[0050] I VCO [0051] III Integrated MOS varicap [0052] 50, 50A, 50B, 50C, 60 Varicap [0053] 50A1, 50B1, 50C1 Unit varicap [0054] V.sub.c Control voltage [0055] V1 Direct-current voltage [0056] f.sub.0 Oscillation frequency