Method for Producing an Optoelectronic Semiconductor Chip
20170194305 ยท 2017-07-06
Inventors
Cpc classification
H10H20/854
ELECTRICITY
H10H29/142
ELECTRICITY
H01L2924/0002
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L2924/0002
ELECTRICITY
C25D13/22
CHEMISTRY; METALLURGY
H01L2924/00
ELECTRICITY
International classification
H01L25/16
ELECTRICITY
C25D13/22
CHEMISTRY; METALLURGY
Abstract
A method for producing an optoelectronic semiconductor chip is disclosed. In an embodiment, the method includes providing a semiconductor body with a pixel region including different subpixel regions, each subpixel region having a radiation exit face, applying an electrically conductive layer onto the radiation exit face of a subpixel region, wherein the electrically conductive layer is suitable at least in part for forming a salt with a protic reactant, and depositing a conversion layer on the electrically conductive layer using an electrophoresis process, wherein the deposited conversion layer comprises pores.
Claims
1. A method for producing an optoelectronic semiconductor chip, the method comprising: providing a semiconductor body with a pixel region comprising different subpixel regions, each subpixel region having a radiation exit face; applying an electrically conductive layer onto the radiation exit face of a subpixel region, wherein the electrically conductive layer is suitable at least in part for forming a salt with a protic reactant; and depositing a conversion layer on the electrically conductive layer using an electrophoresis process, wherein the deposited conversion layer comprises pores.
2. The method according to claim 1, wherein the subpixel regions are electrically insulated from one another and each subpixel region comprises an active layer that is suitable for emitting electromagnetic radiation of a first wavelength range.
3. The method according to claim 1, wherein the radiation exit face of each subpixel region is located at a front surface of the semiconductor body, wherein the radiation exit face of each subpixel region is electrically conductive, wherein the electrically conductive layer is applied over the entire front surface of the semiconductor body, and wherein a photoresist layer is applied onto the electrically conductive layer in at least one subpixel region, while the electrically conductive layer is freely accessible in a further subpixel region.
4. The method according to claim 3, wherein the electrically conductive layer is electrically contacted laterally during the electrophoresis process.
5. The method according to claim 2, wherein the radiation exit face of each subpixel region is located at a front surface of the semiconductor body, wherein the radiation exit face of each subpixel region is formed by a passivation layer, wherein the electrically conductive layer is applied over the entire front surface of the semiconductor body, and wherein a photoresist layer is applied onto the electrically conductive layer in at least one subpixel region, while the electrically conductive layer is freely accessible in a further subpixel region.
6. The method according to claim 2, wherein a radiation exit face of each subpixel region is formed by a passivation layer, and wherein the passivation layer is removed from the radiation exit face of at least one subpixel region, such that the radiation exit face of the subpixel region is made electrically conductive, while the passivation layer is retained in at least one subpixel region.
7. The method according to claim 6, wherein the passivation layer is removed in a further subpixel region, such that the radiation exit face of the further subpixel region is made electrically conductive, wherein the electrically conductive layer is applied onto the radiation exit face of the further subpixel region, and wherein a further conversion layer is deposited on the electrically conductive layer using an electrophoresis process.
8. The method according to claim 1, wherein the radiation exit face of each subpixel region is electrically conductive, and wherein using the electrophoresis process comprises supplying current to the subpixel region onto which the conversion layer is applied, the current being supplied independently of another subpixel region.
9. The method according to claim 8, wherein the electrically conductive radiation exit face of the subpixel regions is formed by a transparent electrically conductive layer, which comprises a TCO material.
10. The method according to claim 8, wherein the electrically conductive radiation exit face is produced by removal of a passivation layer overlying the subpixel region.
11. The method according to claim 1, wherein the pixel region comprises precisely three subpixel regions, wherein a first subpixel region remains free of a conversion layer, wherein a second subpixel region is provided with the conversion layer, the conversion layer being suitable for converting radiation of a first wavelength range into radiation of a second wavelength range, and wherein a third subpixel region is provided with a further conversion layer, the further conversion layer being suitable for converting radiation of the first wavelength range into radiation of a third wavelength range different from the first and second wavelength ranges.
12. The method according to claim 11, wherein the first wavelength range comprises blue light, the second wavelength range comprises green light and the third wavelength range comprises red light.
13. The method according to claim 1, wherein the electrically conductive layer is introduced into the protic reactant, such that the electrically conductive layer at least in part forms a salt with the protic reactant.
14. The method according to claim 13, wherein at least part of the salt is washed out of the optoelectronic semiconductor chip.
15. The method according to claim 1, wherein the electrically conductive layer comprises a material selected from the group consisting of lithium, sodium, potassium, rubidium, caesium, beryllium, calcium, magnesium, strontium, barium, scandium, titanium, aluminum, silicon, gallium, tin, zirconium, zinc oxide, zinc sulfide, zinc selenide, zinc telluride and tin oxide.
16. The method according to claim 1, wherein the electrically conductive layer has a thickness between 20 nanometers and 100 nanometers inclusive.
17. The method according to claim 1, wherein the conversion layer comprises particles of a luminescent material, and wherein a diameter of the particles does not exceed 5 microns.
18. The method according to claim 13, wherein the protic reactant is present as a gas or a liquid.
19. A method for producing an optoelectronic semiconductor chip, the method comprising: providing a semiconductor body with a pixel region comprising different subpixel regions, each subpixel region having a radiation exit face; applying an electrically conductive layer onto the radiation exit face of a subpixel region, wherein the electrically conductive layer is suitable at least in part for forming a salt with a protic reactant; and depositing a conversion layer on the electrically conductive layer using an electrophoresis process, wherein the radiation exit face of each subpixel region is electrically conductive, and wherein using the electrophoresis process comprises supplying current to the subpixel region onto which the conversion layer is applied, the current being supplied independently of another subpixel region.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0052] Further advantageous embodiments and further developments of the invention are revealed by the exemplary embodiments described below in connection with the figures.
[0053]
[0054] A method according to a first exemplary embodiment is explained with reference to the schematic sectional representations of
[0055] A method according to a second exemplary embodiment is explained with reference to the schematic sectional representations of
[0056] A method according to a third exemplary embodiment is explained with reference to the schematic sectional representations of
[0057] Identical, similar or identically acting elements are provided with the same reference numerals in the figures. The figures and the size ratios of the elements illustrated in the figures relative to one another are not to be regarded as being to scale. Rather, individual elements, in particular layer thicknesses, may be illustrated on an exaggeratedly large scale for greater ease of depiction and/or better comprehension.
DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
[0058] The semiconductor body 1 according to the exemplary embodiment in
[0059] The semiconductor body 1 further comprises a carrier element 7 on which the pixel region 2 is arranged. Between the carrier element 7 and the semiconductor layer sequence 4 a specular layer 8 is arranged. The specular layer 8 is suitable for reflecting electromagnetic radiation generated in the active layer 5 towards a radiation exit face 9 of the subpixel region 3. Furthermore, the specular layer 8 is electrically conductive, such that each subpixel region 3 may be electrically contacted at the back via the carrier element 7. The carrier element 7 may for example be an active matrix element of a display.
[0060] A passivation layer 10 is applied to the side faces of the semiconductor layer sequence 4. In the present case, the passivation layer 10 completely covers the side faces of the semiconductor layer sequence 4. Furthermore, the passivation layer 10 is also formed in the trenches 6 between respectively adjacent subpixel regions 3. The passivation layer 10 extends from the radiation exit face 9 on the side face of the semiconductor layer sequence 4 over the trench 6 and the side face of the adjacent subpixel region 3 to the radiation exit face 9 thereof. The front, facing the radiation exit face 9, of the semiconductor layer sequence 4 of each subpixel region 3 is however free of the passivation layer 10.
[0061] On a major face of the carrier element 7 facing the semiconductor layer sequence 4, regions 11 are arranged which are electrically insulating. The electrically insulating regions 11 extend along the major face between two directly adjacent subpixel regions 3, while in the region of a subpixel region 3 they each have a recess 12 which is filled with an electrically conductive material of the carrier element 7. The electrically insulating regions ii of the carrier element 7, in association with the passivation layer 10 on the side faces of the subpixel regions 3 and in the trenches 6, result in the subpixel regions 3 in each case being electrically insulated from one another. The recesses 12 between the electrically insulating regions ii result in the subpixel regions 3 in each case being electrically contacted at the back.
[0062] Furthermore, the subpixel regions 3 comprise a transparent electrically conductive layer 13 on their radiation exit faces 9, via which the subpixel regions 3 are electrically contacted at the front. The transparent electrically conductive layer 13 is here applied over the entire surface of a front of the pixel region 2 which comprises the radiation exit faces 9 of the subpixel regions 3. In the present exemplary embodiment, the transparent electrically conductive layer 13 completely covers the radiation exit faces 9 of the subpixel regions 3 and the side faces of the subpixel regions 3.
[0063] On the transparent conductive layer 13 metallic conductive tracks 14 are in turn applied in each of the trenches 6 between the subpixel regions 3, the tracks 14 serving for external contacting of the subpixel regions 3.
[0064] It should be noted at this point that, although in the figures in each case only one pixel region 2 with three subpixel regions 3 is shown by way of example, the semiconductor body 1 does generally have a plurality of such pixel regions 2. The pixel regions 2 are here particularly preferably all of like configuration.
[0065] The semiconductor body 1 according to the exemplary embodiment of
[0066] As in the exemplary embodiment of
[0067] In contrast to the semiconductor body 1 according to the exemplary embodiment of
[0068] Since, in the case of the semiconductor body 1 according to the exemplary embodiment of
[0069] In the method according to the first exemplary embodiment of
[0070] In a next step an electrically conductive layer 18 is applied over the entire surface of the front of the semiconductor body 1 (
[0071] In a next step, which is illustrated schematically in
[0072] In a next step, a conversion layer 19 is deposited on the electrically conductive layer 18 of a subpixel region 3 using an electrophoresis process (
[0073] In the electrophoretic deposition of the conversion layer 19, in this case only the subpixel region 3 on which it is intended to apply the conversion layer 19 is supplied with current. In this way, luminescent material particles only attach to this subpixel region 3 during the electrophoresis process.
[0074] In a next step, a further conversion layer 19 is then applied to the further subpixel region 3, whose radiation exit face 9 is covered with an electrically conductive layer 18 (
[0075] In a next step, the material of the electrically conductive layer is then dissolved out by introducing at least the electrically conductive layer into the protic reactant, such that the electrically conductive layer at least in part forms a salt with the protic reactant. In a further step the salt formed is washed out of the semiconductor chip (
[0076] In the method according to
[0077] In the method according to the exemplary embodiment of
[0078] If it is impossible to supply the subpixel regions 3 individually with current, then only the subpixel regions to be coated are selectively exposed in succession and provided in accordance with the method according to
[0079] In the method according to the exemplary embodiment of
[0080] In a first step, an electrically conductive layer 18 which is suitable at least in part for forming a salt with a protic reactant is applied over the entire surface of the front of the semiconductor body 1, which front comprises the radiation exit faces 9 of the subpixel regions 3 (
[0081] A patterned photoresist layer 17 is then applied onto the electrically conductive layer 18. The photoresist layer 17 covers two subpixel regions 3, while the electrically conductive layer 18 is freely accessible in a further subpixel region 3 (
[0082] A conversion layer 19 is then deposited using an electrophoresis process in the region in which the electrically conductive layer 18 is freely accessible (
[0083] In a next step the photoresist layer 17 is removed again (
[0084] A patterned photoresist layer 17 is then applied again, which covers the conversion layer 19 already applied and one of the directly adjacent subpixel regions 3. Only one subpixel region 3 is freely accessible (
[0085] Then an electrophoresis process is again carried out, to deposit a further conversion layer 19 on the electrically conductive layer 18 over the radiation exit face 9 of the freely accessible subpixel region 3 (
[0086] In a further step, the photoresist layer 17 is firstly removed and then the semiconductor body 1 is introduced into a protic reactant, such that the electrically conductive layer 18 is also converted into a salt and then washed out (
[0087] The description made with reference to exemplary embodiments does not restrict the invention to these embodiments. Rather, the invention encompasses any novel feature and any combination of features, including in particular any combination of features in the claims, even if this feature or this combination is not itself explicitly indicated in the claims or exemplary embodiments.