Device for measuring the variation of a capacitance and associated measuring method

Abstract

A method and device for measuring a variation of a capacitance, the device includes: a capacitance having a voltage across its terminals; a charging element and a discharging element; a comparison element; control elements activating the charging element or the discharging element as a function of the value of the voltage across the terminals of the capacitance and of which an output voltage has a high value during the charging and a low value during the discharging; a counter measuring a time representative of a predetermined number of charging and discharging cycles of the capacitance; and an additional capacitance electrically connected to the output voltage and to the capacitance, able to be charged and discharged simultaneously with the charging and discharging of the capacitance.

Claims

1. A device (D) for measuring a variation (Ce) of a capacitance of a capacitor (Ce), comprising: a capacitor (Ce) having a first voltage (Vce) across its terminals, a power supply voltage (Vdd), charging means and discharging means (102) with current (i) of the said capacitor (Ce), means of comparison (200), comparing the first voltage (Vce) across the terminals of the capacitor (Ce) with a first reference value (Vref.sup.) and with a second reference value (Vref.sup.+), control means (300): activating the charging means (101) or the discharging means (102) in order to carry out a charging (C+) or a discharging (C) of the capacitor (Ce) as a function of the value of the first voltage (Vce) across the terminals of the capacitor (Ce), and of which an output voltage (Vc) has a high value (Vdd) during the charging (C+) and a low value (0) during the discharging (C), a counter (300) measuring a time (tmes2) representative of a predetermined number (Nc) of charging and discharging cycles of the capacitor (Ce), the variation of this time (tmes2) with respect to a previously measured time (tmes1) being representative of the variation (Ce) of the capacitor (Ce), an additional capacitor (Ca), wherein, a first end of the additional capacitor (Ca) is electrically connected to the output voltage (Vc) of the control means (300) and a second end of the additional capacitor (Ca) is electrically connected to the capacitor (Ce), and the additional capacitor (Ca) is charged and discharged by the charging means (101) and by the discharging means (102) simultaneously with the charging and the discharging of the capacitor (Ce).

2. The measuring device (D) according to claim 1, wherein the voltage comparison means (200) comprise: a first comparator (201) of which a first output value (S1) is a function of the comparison between the first voltage (Vce) across the terminals of the capacitor (Ce) and the first reference value (Vref.sup.), a second comparator (202), of which a second output value (S2) is a function of the comparison between the first voltage (Vce) across the terminals of the capacitor (Ce) and the second reference value (Vref.sup.+), the control means (300) activating the charging (101) or discharging (102) means according to the value of the first and of the second outputs (S1, S2).

3. The measuring device (D), according to claim 1, wherein the absolute value of the difference between the first reference value (Vref.sup.) and the second reference value (Vref.sup.+) is less than the difference between the high value (Vdd) and the low value (0).

4. The measuring device (D), according to claim 2, wherein: the charging means (101) are connected to the power supply voltage (Vdd) and, the discharging means (102) are connected to the ground, and the high value is equal to the value of the power supply voltage (Vdd), the low value is equal to 0.

5. The measuring uring device (D), according to claim 2, wherein: The charging means (101) comprise a first current source (G1) powered by the power supply voltage (Vdd), providing a charging current (i), a first switch (SW1), the discharging means (102) comprise: a second switch (SW2), a voltage inverter (INV) situated between the second switch (SW2) and the control means (300), a second current source (G2) electrically connected on one side to the ground and on the other side to the second switch (SW2), the first and second switches (SW1, SW2), being activated by the control means (300).

6. The measuring device (D), according to claim 2, wherein the control means (300) comprise a logic circuit of the synchronous flip-flop type, of which a first input (S) is electrically connected to the first output (S1) of the first comparator (201), a second input (R) is electrically connected to the second output (S2) of the second comparator (202) and of which a logic output (Q) is electrically connected to the first and second switches (SW1, SW2).

7. The measuring device (D), according to claim 2, wherein charging and discharging cycle time (T1) is defined by: $T{1}^{}=\frac{2*\mathrm{Ce}*\left({\mathrm{Vref}}^{+}-{\mathrm{Vref}}^{-}\right)}{i}+\frac{2*\mathrm{Ca}*\left({\mathrm{Vref}}^{+}-{\mathrm{Vref}}^{-}-\mathrm{Vdd}\right)}{i}$ where: Ce: value of the capacitance of the capacitor Ce Vref.sup.: first reference value Vref.sup.+: second reference value Ca: value of the capacitance of the additional capacitor Vdd: value of the power supply voltage i: value of the charging or discharging current.

8. The measuring device (D), according to claim 2, wherein a resistor (R) is connected between the capacitor (Ce) and the second end of the additional capacitor (Ca) configurable for creating a low-pass filter (700) with the additional capacitor (Ca) having a cut-off frequency (Fc): $\mathrm{Fc}=\frac{1}{2**R*\mathrm{Ca}}$ where: R: value of the resistor Ca: value of the capacitance of the additional capacitor.

9. A method for measuring the variation (Ce) of the capacitor (Ce) using the measuring device (D) according to claim 1, the said measuring method comprising the following steps: Step 1: when the first voltage (Vce) across the terminals of the capacitor (Ce) is less than the first reference value (Vref.sup.), activation by the control means (300) of the charging means (101) for charging the capacitor (Ce), resulting in a variation of the output voltage (Vc) of the control means (300) from the low value (0) to the high value (Vdd), Step 2: when the first voltage (Vce) across the terminals of the capacitor (Ce) is greater than the second reference value (Vref.sup.+), activation by the control means (300) of the discharging means (102) for discharging the capacitor (Ce), resulting in a variation of the output voltage (Vc) of the control means (300) from the high value (Vdd) to the low value (0), Step 3: repetition of steps 1 and 2 according to a predetermined number (Nc) of charging and discharging cycles, Step 4: measuring by the counter (400) of the time (tmes2) necessary for carrying out the predetermined number (Nc) of charging and discharging cycles, Step 5: calculation by the calculating means (500) of the variation (Ce) of the capacitor (Ce), from the time (tmes2) measured in step 4 and from a previously measured time (tmes1) according to: $\mathrm{Ce}=\frac{\left(\mathrm{tmes}{2}^{}-\mathrm{tmes}{1}^{}\right)*i}{2*\left({\mathrm{Vref}}^{+}-{\mathrm{Vref}}^{-}\right)*\mathrm{Nc}}$ where: tmes2: time measured in step 4 tmes1: previously measured time i: value of the charging or discharging current Vref.sup.: first reference value Vref.sup.+: second reference value Nc: predetermined number of charging and discharging cycles the said measuring method furthermore comprising the following steps: Step 1a: during step 1, sudden increase of first voltage (Vce) (V.sup.+)across the terminals of the capacitor (Ce) and simultaneous charging of the additional capacitor (Ca), Step 2a: during step 2, sudden decrease of first voltage (Vce) (V.sup.) across the terminals of the capacitor (Ce) and simultaneous discharging of the additional capacitor (Ca), where: Ca: value of the capacitance of the additional capacitor Ca Ce: value of the capacitance of the capacitor Ce Vc: variation of the output voltage Vc.

10. The measuring device (D) according to claim 1, in combination with a vehicle door handle.

11. The measuring device (D) according to claim 1, in combination with a vehicle.

12. The measuring device (D), according to claim 2, wherein the absolute value of the difference between the first reference value (Vref.sup.) and the second reference value (Vref.sup.+) is less than the difference between the high value (Vdd) and the low value (0).

13. The measuring device (D), according to claim 3, wherein: the charging means (101) are connected to the power supply voltage (Vdd) and, the discharging means (102) are connected to the ground, and the high value is equal to the value of the power supply voltage (Vdd), the low value is equal to 0.

14. The measuring device (D), according to claim 3, wherein: The charging means (101) comprise a first current source (G1) powered by the power supply voltage (Vdd), providing a charging current (i), a first switch (SW1), the discharging means (102) comprise: a second switch (SW2), a voltage inverter (INV) situated between the second switch (SW2) and the control means (300), a second current source (G2) electrically connected on one side to the ground and on the other side to the second switch (SW2), the first and second switches (SW1, SW2), being activated by the control means (300).

15. The measuring device (D), according to claim 3, wherein the control means (300) comprise a logic circuit of the synchronous flip-flop type, of which a first input (S) is electrically connected to the first output (S1) of the first comparator (201), a second input (R) is electrically connected to the second output (S2) of the second comparator (202) and of which a logic output (Q) is electrically connected to the first and second switches (SW1, SW2).

16. Measuring device (D), according to claim 3, wherein a charging and discharging cycle time (T1) is defined by: $T{1}^{}=\frac{2*\mathrm{Ce}*\left({\mathrm{Vref}}^{+}-{\mathrm{Vref}}^{-}\right)}{i}+\frac{2*\mathrm{Ca}*\left({\mathrm{Vref}}^{+}-{\mathrm{Vref}}^{-}-\mathrm{Vdd}\right)}{i}$ where: Ce: value of the capacitance of the capacitor Ce Vref.sup.: first reference value Vref.sup.+:second reference value Ca: value of the capacitance of the additional capacitor Vdd: value of the power supply voltage i: value of the charging or discharging current.

17. Measuring device (D), according to claim 3, wherein a resistor (R) is connected between the capacitor (Ce) and the second end of the additional capacitor (Ca) configurable for creating a low-pass filter (700) with the additional capacitor (Ca) having a cut-off frequency (Fc): $\mathrm{Fc}=\frac{1}{2**R*\mathrm{Ca}}$ where: R: value of the resistor Ca: value of the capacitance if the additional capacitor.

18. The measuring device (D), according to claim 4, wherein: The charging means (101) comprise a first current source (G1) powered by the power supply voltage (Vdd), providing a charging current (i), a first switch (SW1), the discharging means (102) comprise: a second switch (SW2), a voltage inverter (INV) situated between the second switch (SW2) and the control means (300), a second current source (G2) electrically connected on one side to the ground and on the other side to the second switch (SW2), the first and second switches (SW1, SW2), being activated by the control means (300).

19. The measuring device (D), according to claim 4, wherein the control means (300) comprise a logic circuit of the synchronous flip-flop type, of which a first input (S) is electrically connected to the first output (S1) of the first comparator (201), a second input (R) is electrically connected to the second output (S2) of the second comparator (202) and of which a logic output (Q) is electrically connected to the first and second switches (SW1, SW2).

20. The measuring device (D), according to claim 4, wherein a charging and discharging cycle time (T1) is defined by: $T{1}^{}=\frac{2*\mathrm{Ce}*\left({\mathrm{Vref}}^{+}-{\mathrm{Vref}}^{-}\right)}{i}+\frac{2*\mathrm{Ca}*\left({\mathrm{Vref}}^{+}-{\mathrm{Vref}}^{-}-\mathrm{Vdd}\right)}{i}$ where: Ce: value of the capacitance of the capacitor Ce Vref.sup.: first reference value Vref.sup.+: second reference value Ca: value of the capacitance of the additional capacitor Vdd: value of the power supply voltage i: value of the charging or discharging current.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Other subjects, features and advantages of the invention will become apparent on reading the following non-limiting description and on examination of the appended drawings in which:

(2) FIG. 1, already explained above, is a circuit diagram of the device D for measuring the variation of a capacitance according to the prior art,

(3) FIG. 2, already explained above, shows the variation of the voltage Vce across the terminals of the capacitance Ce during the charging C+ and discharging C cycles as a function of time t, according to the prior art,

(4) FIG. 3 is a circuit diagram of the device D for measuring the variation of a capacitance according to the invention,

(5) FIG. 4 shows the variation of the voltage Vce across the terminals of the capacitance Ce during the charging C+ and discharging C cycles as a function of time t, according to the invention,

(6) FIG. 5 shows the value of the output voltage Vc of the control means as a function of time t, and

(7) FIG. 6 shows a variant of the measuring device D according to the invention.

DETAILED DESCRIPTION OF THE INVENTION

(8) According to FIG. 3, the measuring device D according to the invention furthermore comprises, in addition to the previously described components of the measuring device D of the prior art, an additional capacitance Ca: a first end of which is electrically connected to the output voltage Vc of the control means 300 and a second end of which is electrically connected to the capacitance Ce, able to be charged and discharged by the charging 101 and discharging 102 means simultaneously with the charging and discharging of the capacitance Ce.

(9) Thus, with the measuring device D of the invention, when the voltage Vce<Vref.sup. (S1=1, S2=0), the control means 300 open the second switch SW2 and close the first switch SW1 in order to simultaneously charge the capacitance Ce and the additional capacitance Ca. This results in a variation of the output voltage Vc of the control means 300. The value of the output voltage Vc of the control means 300 switches over from zero Volts to the value of the power supply voltage Vdd (see FIG. 5). This sudden increase of the output voltage Vc=Vdd0 is applied across the terminals of the capacitance Ce and creates a sudden increase of voltage V.sup.+ across the terminals of the capacitance Ce according to the following equation (5):

(10) $V^{+}=\frac{\mathrm{Ca}}{\left(\mathrm{Ca}+\mathrm{Ce}\right)}*\mathrm{Vc}=\frac{\mathrm{Ca}}{\left(\mathrm{Ca}+\mathrm{Ce}\right)}*\left(\mathrm{Vdd}-0\right)=\frac{\mathrm{Ca}}{\left(\mathrm{Ca}+\mathrm{Ce}\right)}*\mathrm{Vdd}$
where: V.sup.+: sudden increase of voltage across the terminals of the capacitance Ce (V) Ca: value of the additional capacitance Ca (F) Vc: sudden increase of the output voltage Vc (V) Ce: value of the capacitance Ce (F) Vdd: value of the power supply voltage (V)

(11) This sudden increase of voltage V.sup.+ is shown on FIG. 4. Then, the first switch SW1 being closed, the capacitance Ce and the additional capacitance Ca are charged simultaneously with current i until the voltage across the terminals of the capacitance Vce is greater than the second reference value, that is to say Vce>Vref.sup.+.

(12) According to the invention, during this charging C+, the voltage Vce across the terminals of the capacitance increases from the value (Vref.sup.+V.sup.+) to the second reference value Vref.sup.+ and no longer from the first reference value Vref.sup. to the second reference value Vref.sup.+ as in the prior art. The voltage Vce across the terminals of the capacitance Ce therefore more quickly reaches the second reference value Vref.sup.+, representing the end of the charging C+, since the difference V=(Vref.sup.+Vref.sup.+V.sup.+) is smaller than V=(Vref.sup.+Vref.sup.).

(13) When the voltage across the terminals of the capacitance Vce is higher than the second reference value, that is to say Vce>Vref.sup.+ (S1=0, S2=1), the control means 300 open the first switch SW1 and close the second switch SW2 in order to simultaneously discharge the capacitance Ce and the additional capacitance Ca. This results in a variation of the output voltage Vc of the control means 300. The value of the output voltage Vc of the control means 300 then switches over from the value of the power supply voltage Vdd to zero Volts (see FIG. 5).

(14) This sudden reduction of the output voltage Vc=0Vdd is applied across the terminals of the capacitance Ce and creates a reduction of voltage V.sup. across the terminals of the capacitance Ce according to the following equation (6):

(15) 0$V^{-}-\frac{\mathrm{Ca}}{\left(\mathrm{Ca}+\mathrm{Ce}\right)}*\mathrm{Vc}-\frac{\mathrm{Ca}}{\left(\mathrm{Ca}+\mathrm{Ce}\right)}*\left(0-\mathrm{Vdd}\right)--\frac{\mathrm{Ca}}{\left(\mathrm{Ca}+\mathrm{Ce}\right)}*\mathrm{Vdd}$
That is to say:
V.sup.=V.sup.+

(16) This sudden reduction of voltage V.sup. is shown in FIG. 4. Then, the second switch SW2 being closed, the capacitance Ce and the additional capacitance Ca are simultaneously discharged with current i until the voltage across the terminals of the capacitance Vce is lower than the first reference value, that is to say Vce<Vref.sup..

(17) According to the invention, during this discharging C, the voltage Vce across the terminals of the capacitance reduces from the value (Vref.sup.+V.sup.) to the first reference value Vref.sup. and no longer from the second reference value Vref.sup.+ to the first reference value Vref.sup., as in the prior art. The voltage Vce across the terminals of the capacitance Ce more quickly reaches the first reference value Vref.sup. representing the end of the discharging, since the difference V=((Vref.sup.Vref.sup.)V.sup.) is smaller than V=(Vref.sup.+Vref.sup.). Since V.sup.=V.sup.+, then also V=V (see FIG. 4).

(18) According to the invention, the sudden increase V.sup.+ and the sudden decrease V.sup. of voltage across the terminals of the capacitance Ce, due to the presence of the additional capacitance Ca and to the particular way in which it is connected to the other components of the measuring device D make it possible to reduce the time T1 of a charging and discharging cycle, as shown by the following formulas.

(19) The time T1 of a cycle according to the invention is defined by the following equation (7):

(20) $T{1}^{}=\frac{2*\left(\mathrm{Ce}+\mathrm{Ca}\right)*.Math.V^{}.Math.}{i}=\frac{2*\left(\mathrm{Ce}+\mathrm{Ca}\right)*\left(V-V^{+}\right)}{i}$
Now, according to equation (6):

(21) $V^{+}=\frac{\mathrm{Ca}}{\left(\mathrm{Ca}+\mathrm{Ce}\right)}*\mathrm{Vdd}$
By replacing in equation (7), by its expression given by equation (6), the following is obtained:

(22) $T{1}^{}=\frac{2*\mathrm{Ce}*\left({\mathrm{Vref}}^{+}-{\mathrm{Vref}}^{-}\right)}{i}+\frac{2*\mathrm{Ca}*\left({\mathrm{Vref}}^{+}-{\mathrm{Vref}}^{-}-\mathrm{Vdd}\right)}{i}$
which is equivalent to:

(23) $T{1}^{}=T1+A$$\mathrm{where}$$A=\frac{2*\mathrm{Ca}*\left(V-\mathrm{Vdd}\right)}{i}$

(24) It is apparent that if it is desired to reduce the time T1 of a charging and discharging cycle according to the invention with respect to the time T1 of a cycle according to the prior art, it is necessary for the term A to be negative, that is to say that V<Vdd.

(25) Now, as the power supply voltage Vdd of the measuring device D is consequently the power supply voltage of the first and second comparators 201 and 202, the absolute value of the difference between the first reference value Vref.sup. and the second reference value Vref.sup.+ of the said first and second comparators 201 and 202 is necessarily less than or equal to the power supply voltage Vdd of the latter.

(26) Consequently:
|Vref.sup.+Vref.sup.|Vdd
and, if it is desired that:
T1<T1
it is necessary to choose the first reference value Vref.sup. and the second reference value Vref.sup.+ such that:
|Vref.sup.+Vref.sup.|<Vdd

(27) The time T1 of a cycle according to the invention is therefore less than the time T1 of a cycle of the prior art. Consequently, the time tmes1, necessary for carrying out the predetermined number Nc of charging and discharging cycles is itself also, according to the invention, less than the time tmes1 of the prior art since, according to equation (2):
tmes1=Nc*T1
and therefore:
tmes1=Nc*T1
The following is therefore obtained:
tmes1<tmes1

(28) When a hand M approaches, the capacitance Ce increases by a variation Ce. The time of a cycle T1 also increases by a value T1 and the new cycle time T2 during the presence of the hand M is, according to the invention, given by the following equation (8):

(29) $T{2}^{}=T{1}^{}+T{1}^{}=\frac{2*\left(\mathrm{Ce}+\mathrm{Ce}+\mathrm{Ca}\right)*\left(V-V^{+}\right)}{i}$
That is to say

(30) $T{1}^{}+T1=\frac{2*\mathrm{Ce}*\left(V-V^{+}\right)}{i}+\frac{2*\mathrm{Ce}*\left(V-V^{+}\right)}{i}+\frac{2*\mathrm{Ca}*\left(V-V^{+}\right)}{i}$
Now, according to equation (6):

(31) $V^{+}=\frac{\mathrm{Ca}}{\left(\mathrm{Ca}+\mathrm{Ce}\right)}*\mathrm{Vdd}$
The following is therefore obtained:

(32) $T{1}^{}+T{1}^{}=\frac{2*\left(\mathrm{Ce}+\mathrm{Ca}\right)*\left(V-V^{+}\right)}{i}+\frac{2*\mathrm{Ce}*V}{i}$
and therefore:

(33) $T{1}^{}=\frac{2*\mathrm{Ce}*V}{i}=T1$

(34) The cycle time variation is therefore the same between the invention (T1) and the prior art (T1) for a given capacitance variation Ce or, conversely, the variation of capacitance Ce is the same for identical cycle time variations between the invention and the prior art (T1, T1).

(35) Consequently, the sensitivity Ce of the sensor is not degraded by the invention; it remains identical to that of the prior art.

(36) In an example embodiment of the invention, it the following is considered:

(37) Ce=30 pF

(38) i=10 A

(39) Vref.sup.+Vref.sup.=2 V

(40) Vdd=2.5 V

(41) Nc=100

(42) There is obtained, according to the prior art, a time tmes1 in order to carry out the Nc=100 charging and discharging equal to tmes1=1.2 ms and with the invention there is obtained a time tmes1 in order to carry out these Nc=100 charging and discharging cycles equal to tmes1=0.73 ms. The invention therefore allows a 39% saving of measuring time in comparison with the measuring device D of the prior art whilst retaining the same sensitivity Ce of the sensor.

(43) According to the invention, the method for measuring the variation Ce of the capacitance Ce comprises the following steps, identical to the steps of the measuring method of the prior art: step 1: when the voltage Vce across the terminals of the capacitance Ce is less than the first reference value Vref.sup., activation by the control means 300 of the charging means 101 in order to charge the capacitance Ce, resulting in a variation of the output voltage Vc of the control means 300 from the low value (0 Volt) to the high value (Vdd), step 2: when the voltage Vce across the terminals of the capacitance Ce is greater than the second reference value Vref.sup.+, activation by the control means 300 of the discharging means 102 in order to discharge the capacitance Ce, resulting in a variation of the output voltage Vc of the control means 300 from the high value (Vdd) to the low value (0 Volt), step 3: repetition of steps 1 and 2 according to a predetermined number Nc of charging and discharging cycles, step 4: measuring by the counter 400 of the time tmes2 necessary for carrying out the predetermined number Nc of charging and discharging cycles, step 5: calculation by the calculating means 500 of the variation Ce of the capacitance Ce, from the time tmes2 measured in step 4 and from a previously measured time tmes1 according to equation (3):

(44) 0$\mathrm{Ce}=\frac{\left(\mathrm{tmes}{2}^{}-\mathrm{tmes}{1}^{}\right)*i}{2*\left({\mathrm{Vref}}^{+}-{\mathrm{Vref}}^{-}\right)*\mathrm{Nc}}$
where: tmes2: time measured in step 4(s) tmes1: previously measured time(s) i: value of the charging or discharging current (A) Vref.sup.: first reference value (V) Vref.sup.+: second reference value (V) Nc: predetermined number of charging and discharging cycles

(45) Judiciously, according to the invention, the measuring method furthermore comprises the following steps: step 1a: during step 1, sudden increase of voltage V.sup.+across the terminals of the capacitance

(46) $\mathrm{Ce}\left(V^{+}=\frac{\mathrm{Ca}}{\left(\mathrm{Ca}+\mathrm{Ce}\right)}*\mathrm{Vc}\right)$ and simultaneous charging of the additional capacitance (Ca), step 2a: during step 2, sudden decrease V.sup. of voltage across the terminals of the capacitance

(47) $\left(V^{-}=\frac{\mathrm{Ca}}{\left(\mathrm{Ca}+\mathrm{Ce}\right)}*\mathrm{Vc}\right)$ and simultaneous discharging of the additional capacitance (Ca),
where: Ca: value of the additional capacitance Ca Ce: value of the capacitance Ce Vc: variation of the output voltage Vc

(48) In a second embodiment of the measuring device D according to the invention, a resistor R (see FIG. 6) is connected between the capacitance of the electrode Ce and the second end of the additional capacitance Ca in order to create a low-pass filter 700, called an RC filter, with the additional capacitance Ca.

(49) The low pass filter thus created has a cut-off frequency Fc given by:

(50) $\mathrm{Fc}=\frac{1}{2**R*\mathrm{Ca}}$
where: R: value of the resistor () Ca: value of the additional capacitance (F)

(51) By choosing the value of this resistor R appropriately, the electromagnetic interference, (represented in FIG. 6 in the form of an alternating voltage generator 600 associated with a coupling capacitor Cp), whose frequency is above the cut-off frequency Fc will be greatly attenuated by this low pass filter.

(52) This low pass RC filter not only makes it possible to improve the resistance of the measuring device D to external electromagnetic interference to which it could be subjected once fitted on the vehicle (the car passing under a high voltage line, for example) but also to facilitate the passing of EMC (Electro-Magnetic Compatibility) tests during the development phase of the capacitive sensor.

(53) The invention therefore makes it possible, by the addition of an additional capacitance and by the particular way in which it is connected to the components of the measuring device, to reduce the measuring time of the capacitive sensor without degrading its sensitivity. The consumption of the capacitive sensor is therefore reduced. Finally, the invention also makes it possible, buy the intermediary of this additional capacitance and an additional resistor, to improve the robustness of the capacitive sensor with respect to external electromagnetic interference.