Radiation and temperature hard multi-pixel avalanche photodiodes

Abstract

The structure and method of fabricating a radiation and temperature hard avalanche photodiode with integrated radiation and temperature hard readout circuit, comprising a substrate, an avalanche region, an absorption region, and a plurality of Ohmic contacts are presented. The present disclosure provides for tuning of spectral sensitivity and high device efficiency, resulting in photon counting capability with decreased crosstalk and reduced dark current.

Claims

1. A photon counting avalanche photodiode device comprising: a substrate having a pixel matrix of transistor structures on a top surface of the substrate, wherein the top surface of the substrate serves as a contact layer for the device; an avalanche region above the substrate comprising doped coalesced nanocolumns having a matching pixel matrix; an absorption region with a matching pixel matrix further comprising: a grading layer on top of the avalanche region, a superlattice layer on top of the grading layer, a capping layer on top of the superlattice layer; and a plurality of Ohmic contacts that provide individual addressing to the transistor and avalanche photodiode structure pixels.

2. The device of claim 1, wherein the top surface of the substrate is a doped high crystalline quality radiation and temperature hard semiconductor material.

3. The device of claim 2, wherein the top surface of the substrate is gallium nitride.

4. The device of claim 1, wherein the top surface of the substrate has prefabricated transistor structures in a matrix design.

5. The device of claim 4, wherein the transistor structures have areas for growth of the coalesced nanocolumns of the avalanche region.

6. The device of claim 5, wherein the transistor structures are capable of acquiring and amplifying signals from the coalesced nanocolumns of the avalanche region.

7. The device of claim 1, wherein the coalesced nanocolumns are doped with the same or different type of doping as the substrate.

8. The device of claim 1, wherein the coalesced nanocolumns comprise aluminum gallium nitride, gallium nitride, or a combination thereof.

9. The device of claim 1, wherein the coalesced nanocolumns have a doping concentration from 10.sup.14 cm.sup.3 to about 10.sup.18 cm.sup.3.

10. The device of claim 1, wherein the grading layer serves as a field stop layer.

11. The device of claim 1, wherein the grading layer has an opposite or similar doping type as the substrate and coalesced nanocolumns.

12. The device of claim 11, wherein the superlattice layer and capping layer have the same doping types as the grading layer.

13. The device of claim 1, wherein the capping layer serves as a contact layer for the device.

14. The device of claim 1, wherein the capping layer serves as an optical window layer for the device.

15. The device of claim 1, wherein the capping layer serves as a contact layer for the device structure.

16. The device of claim 1, wherein the capping layer comprises gallium nitride.

17. The device of claim 16, wherein the capping layer has a doping concentration from about 10.sup.18 cm.sup.3 to about 10.sup.19 cm.sup.3.

18. The device of claim 1, wherein the superlattice layer comprises interdigitated layers of indium gallium nitride, gallium nitride or a combination thereof.

19. The device of claim 18, wherein the superlattice layer has a doping concentration from about 10.sup.16 cm.sup.3 to about 10.sup.18 cm.sup.3.

20. The device of claim 1, wherein the performance of the absorption region is not affected by any defaults in the absorption region.

21. The device of claim 1, wherein any stacking faults generated at the interface of the coalesced nanocolumns and grading layer propagate along the c-plane of the device layers thus creating grains that will grow to reach the surface or be terminated.

22. The device of claim 21, wherein each grain is electrically connected to only one coalesced nanocolumn.

23. The device in claim 1 fabricated from any other than III-Nitride material system, including other binary and ternary semiconductor materials.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Aspects of the disclosure can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views, and in which:

(2) FIG. 1 shows electron and hole ionization coefficients in the Al.sub.xGa.sub.1-xN material system with varying electric fields.

(3) FIG. 2 shows a side view of a device in accordance with an exemplary embodiment of the present disclosure.

(4) FIG. 3 shows a detailed side view of a device in accordance with an exemplary embodiment of the present disclosure.

(5) FIG. 4 shows a multi-pixel avalanche photodetector array in accordance with an exemplary embodiment of the present disclosure.

(6) FIG. 5 shows a perspective view of the coalesced nanocolumns in accordance with an exemplary embodiment of the present disclosure.

(7) FIG. 6 shows device quality III-Nitride films grown on silicon and sapphire substrates.

(8) FIG. 7a shows a top view and a side view of gallium nitride nanocolumns spontaneously grown on silicon substrates at about 820 C.

(9) FIG. 7b shows a top view and a side view of gallium nitride nanocolumns spontaneously grown on silicon substrates at about 800 C.

(10) FIG. 8 shows x-ray data for p-n junction InGaN devices of various indium composition levels, the devices having a total thickness of about 425-450 nm.

(11) FIG. 9 shows front illuminated photodiode structures.

(12) FIG. 10 shows back illuminated photodiode structures.

(13) FIG. 11a shows back illuminated performance of In.sub.0.64Ga.sub.0.36N p-n junction device fabricated on a silicon substrate.

(14) FIG. 11b shows back illuminated performance of In.sub.0.72Ga.sub.0.28N p-n junction device fabricated on a silicon substrate.

(15) FIG. 12a shows x-ray diffraction pattern measured of In.sub.xGa.sub.1-xN grown on GaN with indium compositions varying from 0x1.

(16) FIG. 12b shows normalized photoresponse measurements of unbiased In.sub.xGa.sub.1-xN p-n junction devices with indium compositions varying from 0x1.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

(17) In the description that follows, alike parts are marked throughout the specification and drawings with the same reference numerals. The drawing figures might not be to scale and certain components can be shown in generalized or schematic form and identified by commercial designations in the interest of clarity and conciseness.

(18) Avalanche Photodiode Device

(19) In one exemplary embodiment, the avalanche photodiode (APD) device structure consists of two major regions: the photon absorption region, where absorbed photons generate electron/hole pairs, and the avalanche region, where generated electrons are multiplied as result of impact ionization.

(20) A schematic of an example of the APD device structure is shown in FIG. 2, starting with the bulk p-type GaN substrate (1), followed by a p-type avalanche region (2) composed of p-GaN and p-AlGaN nanocolumns (NC), and n-type absorption region (3) composed of n-GaN and n-InGaN layers. Incident photons with energies lower than the bandgap of GaN (3.34 eV) pass through the n-GaN layers, but are absorbed in the n-InGaN layers of the absorption region.

(21) In one embodiment of the present disclosure, the substrate (1) can be a doped radiation and temperature hard semiconductor material such as silicon, sapphire, or any suitable alternative. The substrate (1) can have a top substrate layer comprised of GaN, for example. The substrate, top substrate layer, and nanocolumns (NC) can have a threading dislocation density10.sup.8 cm.sup.2.

(22) Electron hole pairs are generated in the absorber region (3) where they drift into the avalanche region (2) by an electric field generated from a low voltage (LV) direct bias applied between Ohmic contacts (5) and (6). The avalanche region (2) consists of a p-GaN/p-AlGaN NC structure. Here, the electrons undergo impact ionization and generate a large number of electron-hole pairs under the field from a high voltage (HV) reverse bias applied between Ohmic contacts (4) and (5).

(23) A more detailed structure of the avalanche and absorption region layers in an exemplary embodiment of the device is shown in the FIG. 3. The avalanche region (2) grown on a bulk p.sup.+-GaN substrate consists of p-GaN nanocolumns (2-1) that extend into p-AlGaN nanocolumns (2-2), that form a coalesced layer (2-3) on the top. A grading from i-AlGaN to n.sup.+-GaN layer (3-1) is grown on the top of the coalesced p-AlGaN nanocolumns as a first part of the absorption region. A n-GaN/n-InGaN supperlattice structure layer (3-2) is grown as a second part of the absorption region, and an n-GaN capping layer (3-3) is grown as a third part of the absorption region.

(24) The doping concentration of the nanocolumns (2-2) is in the range of about 10.sup.14-10.sup.18 cm.sup.3. The doping concentration of the grading (3-1) and the superlattice structure layer (3-2) is in the range of about 10.sup.16-10.sup.18 cm.sup.3. The doping concentration of the capping layer (3-3) is in the range of about 10.sup.18-10.sup.19 cm.sup.3.

(25) Device Fabrication Method

(26) The NC structures are preferably produced by using selective area growth (SAG) using a metal mask deposited on bulk p.sup.+-GaN substrates (that also serve as a bottom contact layer) prior to the MBE growth. The Mg-doped 300 nm thick GaN nanocolumns are grown in the open mask areas. The growth of GaN nanocolumns is switched to growth of AlGaN nanocolumns by adding a considerable Al molecular flux into the MBE chamber and adjusting the substrate temperature. From previous experiments on AlGaN film growth, Al to Ga flux ratios are already in place that are necessary in order to obtain Al.sub.0.45Ga.sub.0.55N composition. The same ratio is applied to the intrinsically n-type Al.sub.0.45Ga.sub.0.55N NC growth. In order to reduce the spontaneous polarization field formed at the GaN/AlGaN interface, the switching from GaN NC growth to Al.sub.0.45Ga.sub.0.55N NC growth is performed gradually, by slowly increasing the AI flux from 0 to a pre-determined value. About 2 m thick Al.sub.0.45Ga.sub.0.55N NCs are grown for the avalanche region, and then the temperature is slightly reduced to cause the NCs to coalesce at the top. Dropping the temperature reduces the Al atoms diffusion length thereby broadening the nanocolumn diameter and making the NC coalesce. Next, the Al.sub.0.45Ga.sub.0.55N layer is graded back to GaN, but Si doped to form the n-type field stop layer for the photon absorption region. Similarly, based on our previous experiments, an n-type In.sub.0.17Ga.sub.0.83N/GaN superlattice structure capped with an n.sup.+-GaN layer (as the optical window and top contact layer) is grown to complete the absorption region part of the APD device.

(27) Reactive ion etching (RIE) is used to expose three areas for deposition of Ohmic contacts (4), (5), and (6) shown in FIG. 2: the p.sup.+-GaN bulk substrate, the n+-GaN layer grown on the top of the coalesced AlGaN NC, and top n.sup.+-GaN capping window layer, respectively. The metal contacts are deposited by e-beam or other applicable metal evaporation or sputtering method.

(28) In order to fabricate integrated APD controls from radiation hard materials, AlGaN/GaN HEMT transistors with areas designated for integration with APD devices are grown prior to the APD growth on bulk GaN substrate by using MBE. Transistor gates for the read out electronics will be fabricated around these areas as shown in FIG. 4. The pink lines correspond to the metal gates, while the bright green lines correspond to the HEMT channel. An oxide layer deposited by plasma enhanced chemical vapor deposition is patterned to reveal areas for the growth of the APD devices shown as the cube mesas in FIG. 4.

(29) The device avalanche and absorption region thickness and doping profile can be optimized to improve Photon Detection Efficiency (PDE) and reduce Dark Count Rate (DCR). DCR is primarily controlled by the tunneling and thermal currents in different sections of the device. Having a low dark count allows the application of a higher bias voltage to obtain a higher avalanche ionization probability. A quick estimate of the avalanche layer thickness to have an avalanche ionization condition is if the W.sub.A* ionization coefficient1, for different electric fields. Donnelly et al. have presented a thorough approach to calculate both DCR and PDE for similar structures based on InGaAsPInP Geiger-mode avalanche photodiodes. The DCR equation for the structure not including the graded GaN/AlGaN layer is shown below. Here similar calculations are used to determine the absorption and avalanche regions. From the analysis the optimum operation conditions are selected for the APD.

(30) $\mathrm{DCR}={}_0^{\mathrm{WAlGaN}}\left(\left(\frac{n_{\mathrm{iAlGaN}}}{{}_{\mathrm{AlGaN}}}\right)+\left(\frac{J_{{\mathrm{tun}}_{\mathrm{AlGaN}}}}{q}\right)\right)\mathrm{PA}\left(x\right)x+\mathrm{PA}\left(0\right)\left(\frac{n_{\mathrm{ilnGaN}}}{{}_{\mathrm{InGaN}}}\right)W_{\mathrm{InGaN}}+{}_0^{\mathrm{WlnGaN}}\left(\frac{J_{{\mathrm{tun}}_{\mathrm{InGaN}}\left(x\right)}}{q}x\right),$
where W AlGaN is the width of the AlGaN avalanche region, n, is the doping concentration, W.sub.InGaN is the width of the InGaN region, is the tunneling current, and PA is the probability of avalanche ionization.

(31) Details on the preferred steps for fabrication of embodiments of the APD device are given below:

(32) The growth of GaN/Al.sub.0.45Ga.sub.0.55N nanocolumnar structures requires a metal (such as TiN or any other suitable metal) mask with nanometer sized openings deposited on the bulk GaN substrate. The AlGaN NC growth on GaN can be performed using titanium layer assisted selective area growth (SAG) method. As the active nitrogen is introduced in the MBE chamber, the Ti mask on the heated substrates chemically converts into TiN. While spontaneous GaN NC have been grown on GaN films, their periodicity and order remain a challenge. Moreover, the close-packed nature of the spontaneous NCs make coalescence along the sidewalls possible, thereby creating stacking faults that are detrimental to the avalanche region. Several reports have already demonstrated various nanocolumn based devices, including red, green, and blue InGaN LEDs fabricated using SAG technique. Electron beam lithography is employed to pattern a thin (<100 ) titanium film deposited on a GaN wafer. In order to achieve this, a thin 100 Ti layer is deposited using e-beam evaporation. Next, PMMA is spin coated onto the Ti coated wafer and loaded into a JEOL JBX 5500FS eBeam writer. An array of 100, 150, 200, and 300 nm circular openings are then patterned on the PMMA coating. The patterns are generated in sections of 2 mm2 mm areas on the p-GaN/Sapphire wafer. This approach allows for investigation of the effect of aperture openings on the nanocolumn morphology. The optimal mask aperture geometry is confirmed by XRD scans performed over the grown nanocolumns.

(33) Prior to growing the NCs, the Ti layer is etched through the PMMA mask using dilute HCl acid and then cleaned using standard cleaning procedures. The patterned sample is loaded into the MBE chamber where the samples are degassed at temperatures of 1000-1100 C., followed by nitridation of the Ti mask using the uni-bulb N.sub.2 plasma source. The selectivity of III-V growth in the nanohole vs on the Ti mask has been reported to depend primarily on the Ga diffusion length. Thus key parameters to control the NC growth would be growth temperatures in the range of 850-950 C., and lower Ga flux needs to be applied to keep the sample surface nitrogen-rich. Direct growth of Al.sub.0.45Ga.sub.0.55N NCs on GaN layers creates a high possibility for generating dislocations. Thus, it is used a unique approach, where the growth starts with about 300-500 nm thick GaN NCs and then the composition is gradually switched from GaN to Al.sub.0.45Ga.sub.0.55N by activating and controlling the Al flux and substrate temperature.

(34) The growth of Al.sub.xGa.sub.1-xN nanocolumns on top of the GaN nanocolumns presents a challenge of its own. The Al adatom diffusion length is smaller than that of Ga. If same conditions as for the GaN nanocolumn growth are applied, the Al.sub.xGa.sub.1-xN nanocolumns will grow on the side before the adatoms get a chance to reach their top surface. This will increase diameter of the upper part of the nanocolumns ultimately leading to their coalescence. The height and diameter of the starting GaN nanocolumn should be maintained by controlling the growth temperature and growth time at predetermined Ga and N fluxes. The growth temperature will have to be increased for the growth of Al.sub.xGa.sub.1-xN nanocolumns, which in turn would increase the Al adatom diffusion length. However, once the nanocolumns are longer than the diffusion length or desired length (1-2 m), the substrate temperature should be lowered to increase the diameter at the top of the nanocolumns to cause their coalescence. The growth conditions should be optimized by using the primary variables, such as: Al and Ga fluxes, N.sub.2 plasma source power, and substrate temperature.

(35) After each of the above growths, I-V measurements can be carried out to determine the breakdown voltage variation depending on the NC diameters and lengths. In order to do that, once the NCs are grown on GaN and all material characterization experiments are completed, the grown nanocolumns can be spin coated with PMMA used as a filler between the NCs. Oxygen plasma is used to ash the PMMA top layer in order to expose the top of the NCs. Next, metal contacts should be deposited in order to provide biasing and signal acquisition.

(36) In order to optimize the Al.sub.xGa.sub.1-xN NC coalescence, the following considerations should be used. Lateral coalescence of NC arrays have been demonstrated using PAMBE and MOCVD. It is expected that at the point of coalescence of two NCs stacking faults (SF) are generated. In this particular structure, the SF would not affect the performance of the device, since the avalanche region is within the NC and is not connected to the coalesced layer. FIG. 5 illustrates the coalesced NC structures. The optimized 2D InGaN supperlattice (SL) structure is grown on the top of the coalesced AlGaN-NC layer. The stacking faults (SF) generated at the interface of the NC coalescence sites are expected to naturally propagate through the InGaN absorber layer. However, the unique feature of this approach is that the high defect density of the absorber layer would not alter the performance of the proposed device. This is because the SF would propagate along the c-plane of the layers, thus creating grains that will grow to reach the surface. Each grain will exhibit excellent crystalline quality and is electrically connected to only one avalanche AlGaN NC. Thus typically destructive leakage currents are only present at the grain interface, between the coalesced structures and do not travel into the NC avalanche region.

(37) It should be emphasized that the above-described embodiments are merely examples of possible implementations. Many variations and modifications may be made to the above-described embodiments without departing from the principles of the present disclosure. All such modifications and variations are intended to be included herein within the scope of this disclosure and protected by the following claims.

Examples

(38) Device quality AlN, AlGaN, and InGaN films were grown on silicon and sapphire substrates as shown in FIG. 6.

(39) GaN and AlGaN nanocolumns (NC) were spontaneously grown on (111) silicon. FIGS. 7a and 7b show GaN NC grown on silicon at two temperature regimes, at higher temperatures, the resulting NCs have smaller diameters and shorter heights (FIG. 7a) and for lower temperatures the NCs have higher diameters and heights (FIG. 7b).

(40) High indium content p-n junction samples and Schottky barrier photodiodes were demonstrated on Silicon. The x-ray data for some of these samples is shown in FIG. 8. Presence of only the (0002) InGaN peak is evidence of the high quality single crystalline InGaN layers with no detectable phase separation.

(41) FIG. 9 shows the fabricated photodiode structures for front illumination, and FIG. 10 shows the back illuminated structure grown on silicon. The back illuminated structures used silicon as a passive filter creating the narrow band IR response. FIGS. 11a and 11b show photoresponse of the photodiodes in a narrow IR band, determined by the silicon thickness and the InGaN absorption band edge.

(42) Reasonably high quality InGaN films were achieved using purchased GaN on Sapphire templates as the starting substrates. This is shown in FIG. 12a from the x-ray diffraction peaks measured for In.sub.xGa.sub.1-xN on GaN with Indium composition varying from 0x1. The sharp peaks are indications of high quality films. In.sub.xGa.sub.1-xN p-n junction devices were also demonstrated and their photoresponse was measured as shown in FIG. 12b.