Current Accumulative Pixel Structure for CMOS-TDI image sensor

Abstract

The present invention relates to technical field of analog integrated circuit design. TDI function is better realized by CMOS image sensor and it improves scanning frequency of the CMOS-TDI image sensor and extends application range of TDI technique. To this end, the present invention proposes a technical solution of a current accumulative pixel structure for CMOS-TDI image sensor which comprises a photodiode, four MOS transistors M1, M2, M3, M4, four switches S1, S2, S3, S4, and two capacitors C1, C2; the connection relationship thereof is denoted below: the anode of the photodiode D1 is connected to a ground wire, while the cathode thereof is connected to an input end; the drain and gate of the transistor M1 are both connected with the input end, while the source thereof is connected with a power source VDD. The current invention mainly finds its application in analog integration circuit design.

Claims

1. A current accumulative pixel structure for CMOS-TDI image sensor comprising a photodiode, four MOS transistors M1, M2, M3, M4, four switches S1, S2, S3, S4, and two capacitors C1, C2; wherein the connection relationships thereof are denoted below: the anode of the photodiode D1 is connected to a ground wire, while the cathode thereof is connected to an input end; the drain and gate of the transistor M1 are both connected with the input end, while the source thereof is connected with a power source VDD; the source of the transistor M2 is connected to the power source VDD, while its gate is connected to the gate of the transistor M1, its drain is connected to both drain and gate of the transistor M3; the source of the transistor M3 is connected to the ground wire; lower electrode plates of both capacitors C1 and C2 are connected to the ground wire, whereas their upper electrode plates are connected to the gate of the transistor M3 through the switches S1 and S3 and then connected to the gate of the transistor M4 through the switches S2 and S4 respectively; and the source of the transistor M4 is connected to the ground wire, while its drain is connected to an output end.

2. The current accumulative pixel structure for CMOS-TDI image sensor according to claim 1, wherein the detailed operation process for realizing pipelined TDI signal accumulation by the row of pixels is described as below: during the M.sup.th line transfer period, an object X passes through the N.sup.th pixel, and photocurrent generated in the photodiode D1 and front-end output current are summed and comes into the transistor M3 via the imaged transistors M1 and M2; assume that when the switches S1 and S4 are closed, current IM passing through the transistor M3 is transformed into voltage signal and is stored in the capacitor C1; in M+1.sup.th line transfer period, the object X passes through the N+1.sup.th pixel; as the input of the N+1.sup.th pixel is connected to the output of the N.sup.th pixel, and the switches S2 and S3 are closed at this time, the voltage signal of the N.sup.th pixel stored in the capacitor C1 is transformed by the transistor M4 into current IM and flows through the transistor M4; sum of the current IM passing through the transistor M1 of the N+1.sup.th pixel and photocurrent generated by the photodiode is referred to IM+1; similar pixel N+1 transforms this current into voltage signal and stores the same into the capacitor C2, and this voltage signal will be again transformed into current and delivered to a next pixel during a next line transfer period; by the above mentioned operation process, current signal IM stored in the N.sup.th pixel is just the sum of photocurrent generated in previous N pixels of the same object, thus realizing TDI signal accumulation function.

3. The current accumulative pixel structure for CMOS-TDI image sensor according to claim 1, wherein the layout is described below: by connection in series of the input and output of one row of pixels, a pipelined current accumulative TDI pixel array is defined; behind the last line of pixels, a current-voltage transformation unit is cascaded to transform the current which is accumulated and outputted by the last line pixels into voltage signal and further transform it by a back-end ADC into digital signal for output.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0009] FIG. 1 schematically shows a pixel structure according to the invention;

[0010] FIG. 2 indicates schematic pixel timing sequence control of the present invention; and

[0011] FIG. 3 schematically shows construction of a CMOS-TDI image sensor using the pixel structure of the invention.

DETAILED DESCRIPTION OF PARTICULAR EMBODIMENTS OF THE INVENTION

[0012] A current accumulative pixel structure for CMOS-TDI image sensor proposed by current invention is shown in FIG. 1. As shown, the pixel structure comprises a photodiode D1, four MOS transistors M1, M2, M3 and M4, four switches S1, S2, S3 and S4), and two capacitors C1, C2, the connection relationship thereof is denoted below. The anode of the photodiode D1 is connected to a ground wire, while the cathode thereof is connected to an input end. The drain and gate of the transistor M1 are both connected with the input end, while the source thereof is connected with a power source VDD. The source of the transistor M2 is connected to the power source VDD, while its gate is connected to the gate of the transistor M1, the drain of the transistor M2 is connected to both of the drain and gate of the transistor M3. The source of the transistor M3 is connected to the ground wire. Lower electrode plates of both capacitors C1 and C2 are connected to the ground wire, whereas their upper electrode plates are connected to the gate of the transistor M3 through the switches S1 and S3 and then connected to the gate of the transistor M4 through the switches S2 and S4 respectively. The source of the transistor M4 is connected to the ground wire, while its drain is connected to an output end. As indicated in FIG. 1, a single row of pixels of the CMOS-TDI image sensor is generated by connection of the input and output of various different pixels. Under timing sequence control as shown in FIG. 2, this row of pixels is able to realize pipelined TDI signal accumulation. The detailed operation process is described as below. During the M.sup.th line transfer period, an object X passes through the N.sup.th pixel, and photocurrent generated in the photodiode D1 and front-end output current are summed and comes into the transistor M3 via the imaged transistors M1 and M2. Assume that when the switches S1 and S4 are closed, current IM passing through the transistor M3 is transformed into voltage signal and is stored in the capacitor C1. In M+1.sup.th line transfer period, the object X passes through the N+1.sup.th pixel. As the input of the N+1.sup.th pixel is connected to the output of the N.sup.th pixel, and the switches S2 and S3 are closed at this time, the voltage signal of the N.sup.th pixel stored in the capacitor C1 is transformed by the transistor M4 into current IM and flow through the transistor M4. Sum of the current IM passing through the transistor M1 of the N+1.sup.th pixel and photocurrent generated by the photodiode is referred as to IM+1. Similar pixel N+1 transforms this current into voltage signal and stores the same into the capacitor C2, and this voltage signal will be again transformed into current and delivered to a next pixel during a next line transfer period. By the above mentioned operation process, current signal IM stored in the N.sup.th pixel is just the sum of photocurrent generated in previous N pixels of the same object, thus realizing TDI signal accumulation function.

[0013] To make clear objects, technical solution and advantages of the invention, detailed description will be provided to the embodiments of the invention in connection with examples. The construction of a 1024100 CMOS-TDI image sensor employing the pixel structure of the present invention is shown in FIG. 3. By connection in series of the input and output of one row of pixels, a pipelined current accumulative TDI pixel array is defined. Behind the last line of pixels (that is the 100.sup.th line pixels), a current-voltage transformation unit is connected to transform the current which is accumulated for 100 times current accumulation and outputted by the last line pixels into voltage signal and further transform it by a back-end ADC into digital signal for output. If the line transfer period is 5 ms, then scanning frequency is 200 KHz, while transformation rate of the ADC is also only 200 KHz.