Electron microscope and method of operating same

Abstract

An electron microscope is offered that is capable of achieving noise cancellation which results in a low level of noise and which can be implemented at high speed. An electron microscope (1) associated with the present invention includes: an electron beam source (11) for producing an electron beam; a noise detector (4) for detecting a part of the beam to thereby produce a beam detection signal and dividing a dividend by the beam detection signal; at least one image signal detector (6) for detecting an image signal obtained by making the beam impinge on a sample (A); and an arithmetic section (60) for performing a multiplication between an output signal of the image signal detector (6) and an output signal of the noise detector (4).

Claims

1. An electron microscope comprising: an electron beam source for producing an electron beam; a noise detector for detecting a part of the electron beam to thereby produce a beam detection signal, generating an effective value based only on the beam detection signal detected over a selected period of time, and dividing the effective value by the instant beam detection signal; at least one image signal detector for detecting an image signal obtained by making the electron beam impinge on a sample; and an arithmetic section for performing a multiplication between an output signal of the image signal detector and an output signal of the noise detector.

2. The electron microscope as set forth in claim 1, wherein said arithmetic section performs said multiplication by a digital arithmetic operation.

3. The electron microscope as set forth in claim 1, wherein said noise detector includes a divider circuit that divides said dividend by said beam detection signal in an analog manner.

4. The electron microscope as set forth in claim 1, wherein said effective value is the root mean square of said beam detection signal.

5. The electron microscope as set forth in claim 1, wherein said at least one image signal detector is plural in number, and wherein said arithmetic section performs multiplications between output signals of the plural image signal detectors and the output signal of said noise detector.

6. A method of operating an electron microscope, comprising the steps of: detecting a part of an electron beam generated by an electron beam source to thereby produce a beam detection signal, generating an effective value based only on the beam detection signal detected over a selected period of time, and dividing the effective value by the instant beam detection signal; making the electron beam impinge on a sample to produce an image signal and detecting the image signal; and performing a multiplication between an output signal produced from the image signal detecting step and an output signal produced from the electron beam detecting and dividing steps.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a block diagram of an electron microscope associated with a first embodiment of the present invention.

(2) FIG. 2 is a block diagram of one specific example of signal processing circuitry included in the microscope shown in FIG. 1.

(3) FIGS. 3A-3C are waveform diagrams of signals appearing at nodes of an image signal detector included in the microscope shown in FIG. 1.

(4) FIGS. 4A-4D are waveform diagrams of signals appearing at nodes of a noise detector included in the microscope shown in FIG. 1.

(5) FIG. 5 is a waveform diagram showing one example of how emission current varies with time.

(6) FIG. 6A is a waveform diagram of a noise signal.

(7) FIG. 6B is a waveform diagram of one example of the output signal of an effective value computing circuit.

(8) FIG. 7 is a block diagram of one specific example of signal processing circuitry according to a first modification of the first embodiment.

(9) FIG. 8 is a block diagram of one specific example of signal processing circuitry according to a second modification of the first embodiment.

(10) FIG. 9 is a block diagram of one specific example of signal processing circuitry according to a third modification of the first embodiment.

(11) FIG. 10 is a block diagram of an electron microscope associated with a second embodiment of the present invention.

(12) FIG. 11 is a diagram of a multi-segmented STEM detector for use in the electron microscope shown in FIG. 10.

(13) FIG. 12 is a block diagram of one specific example of signal processing circuitry included in the microscope shown in FIG. 10.

(14) FIG. 13 is a block diagram of an electron microscope associated with a third embodiment of the invention.

(15) FIG. 14 is a block diagram of one specific example of signal processing circuitry included in the microscope shown in FIG. 13.

(16) FIG. 15 is a block diagram of a scanning transmission electron microscope (STEM) having a general noise cancellation function.

(17) FIG. 16 is a block diagram of one specific example of signal processing circuitry incorporated in a conventional electron microscope, and in which the microscope is in a mode of operation where the noise cancellation function is not used and an illustration of electric circuitry associated with the noise cancellation is omitted.

(18) FIG. 17 is a block diagram similar to FIG. 16, but in which the microscope is in a mode of operation where the noise cancellation function is used.

(19) FIG. 18 is a block diagram of one example of a divider circuit using log circuits and an antilog circuit.

DESCRIPTION OF THE INVENTION

(20) The preferred embodiments of the present invention are hereinafter described in detail with reference to the drawings. It is to be understood that the embodiments provided below do not unduly restrict the scope and content of the present invention delineated by the appended claims and that not all the configurations described below are essential constituent components of the invention.

1. First Embodiment

(21) 1.1. Electron Microscope

(22) An electron microscope associated with a first embodiment of the present invention is first described by referring to FIG. 1, which shows one example of configuration of the electron microscope, 1.

(23) As shown in FIG. 1, the electron microscope 1 is configured including an electron optical column 10, a noise detection circuit 40, an A/D converter 50, and an arithmetic section (CPU) 60. Housed in the electron optical column 10 are an electron beam source 11, a noise canceling aperture 12, an illumination lens system 13a, scan coils 13b, an imaging lens system 14, an image detector 15, a preamplifier circuit 20, an amplifier circuit 30, and so on.

(24) In the electron microscope 1, the noise canceling aperture 12 and the noise detection circuit 40 together constitute a noise detector 4 for detecting emission noise. Also, the image detector 15, preamplifier circuit 20, amplifier circuit 30, and A/D converter 50 together constitute an image signal detector 6 for detecting an image signal (STEM image signal).

(25) The electron microscope 1 is a scanning transmission electron microscope (STEM). Other components such as various lenses and apertures are housed in the electron optical column 10 but their description and illustration are omitted below. Some of the components of the electron microscope 1 of the present embodiment which are shown in FIG. 1 may be omitted or replaced by other parts. Also, additional components may be added to this microscope.

(26) An electron beam emitted from the electron beam source 11 is partially cut off by the noise canceling aperture 12 and then focused onto a sample A by the lens system 13a. The focused electron beam (also referred to as an electron probe) is scanned over the sample A by the scan coils 13b. A well-known electron gun such as a cold cathode field-emission gun (CFEG) can be used as the electron beam source 11.

(27) The electron beam transmitted through the sample A passes through the lens system 14, and a part of the beam is detected as an image signal by the image detector 15. The image signal is the product of the emission current I1 impinging on the sample A and the brightness component S of the sample A, i.e., I1S.

(28) The noise canceling aperture 12 detects the emission current (noise signal). By way of example, any one (such as condenser lens (CL) apertures) of the illumination apertures disposed between the electron beam source 11 and the sample A in the electron optical column 10 may be used also as the noise canceling aperture 12. A dedicated noise canceling aperture 12 apart from the illumination apertures may also be mounted.

(29) The noise detection circuit 40 creates a signal for removing the emission noise from the image signal, based on the emission current I2 detected by the noise canceling aperture 12.

(30) The arithmetic section 60 removes (more precisely, reduces) the noise signal superimposed on the output signal of the amplifier circuit 30 that has been converted from analog to digital form by the A/D converter 50 by making use of the fact that there is a proportional relationship between the emission current I1 impinging on the sample A and the emission current I2 detected by the noise canceling aperture 12 (i.e., I1=nI2, where n is a proportional constant). Then, the signal free of the noise signal is arithmetically processed in a given manner by the arithmetic section 60 and then sent to the personal computer (PC) 2. An STEM image of the sample A is displayed on the display unit for use with the PC 2 and stored in it.

(31) 1.2. Signal Processing Circuitry of the Electron Microscope

(32) FIG. 2 shows a specific example of configuration of signal processing circuitry for use in the electron microscope according to the first embodiment. In FIG. 2, those components or configurations which are identical to their respective counterparts shown in FIG. 1 are indicated by the same reference numerals as in FIG. 1.

(33) In the present embodiment, the image signal detector 6 is configured including the image detector 15, preamplifier circuit 20, amplifier circuit 30, and A/D converter 50. FIGS. 3A-3C show examples of signal waveform at various nodes of the image signal detector 6 of FIG. 2.

(34) In the present embodiment, the preamplifier circuit 20 is configured including an adder 22 and an amplifier 24.

(35) The image signal SI1 (see FIG. 3A) obtained from the image detector 15 by adjusting the contrast is amplified by a factor of Gp by the amplifier 24 after brightness B is added by the adder 22. Therefore, the output signal of the amplifier 24 (i.e., the output signal of the preamplifier circuit 20) V.sub.1 (see FIG. 3B) is given by
V.sub.1=Gp(SI1+B)(1)

(36) Contrast is a gain added to the image signal to adjust the degree of brightness. In the present embodiment, contrast is set for the image detector 15. Brightness is a DC voltage applied to cancel out the offset component of the image signal. In the present embodiment, brightness is set for the preamplifier circuit 20.

(37) In the present embodiment, the amplifier circuit 30 is configured including an amplifier 32. The output signal V.sub.1 of the preamplifier circuit 20 is amplified by a factor of Ga by the amplifier 32. Therefore, from Eq. (1), the output signal V.sub.2 of the amplifier 32 (i.e., the output signal of the amplifier circuit 30) (see FIG. 3C) is given by
V.sub.2=GaGp(SI1+B)(2)

(38) The output signal V.sub.2 of the amplifier circuit 30 is converted from analog to digital form by the A/D converter 50 and applied to the arithmetic section 60.

(39) In the present embodiment, the noise detector 4 is configured including the noise canceling aperture 12 and the noise detection circuit 40. FIGS. 4A-4D show examples of signal waveform at various nodes of the noise detector 4 of FIG. 2.

(40) The noise detection circuit 40 is configured including an amplifier 42, an effective value computing circuit 44, a divider circuit 46, and an A/D converter 48.

(41) The amplifier 42 converts the emission current I2 (see FIG. 4A) detected by the noise canceling aperture 12 into a voltage and amplifies it by a factor of Gn. Therefore, the output signal (noise signal) V.sub.3 (see FIG. 4B) of the amplifier 42 is given by
V.sub.3=GnI2(3)

(42) The effective value computing circuit 44 calculates the effective (RMS (root mean square)) value of the output signal V.sub.3 of the amplifier 42 in real time within a preset time. For example, a general-purpose IC may be used as the effective value computing circuit 44.

(43) The output signal (GnI2).sub.RMS (see FIG. 4C) of the effective value computing circuit 44 is applied to the numerator input (X) of the divider circuit 46, and the output signal V.sub.3 of the amplifier 42 is applied to the denominator input (Y). The divider circuit 46 performs a division of the former signal by the latter. Thus, the output signal V.sub.4 (see FIG. 4D) of the divider circuit 46 is given by

(44) $\begin{array}{cc}{V}_4=\frac{X}{Y}=\frac{{\left(\mathrm{Gn}I2\right)}_{\mathrm{RMS}}}{\mathrm{Gn}I2}& \left(4\right)\end{array}$

(45) As one example, an analog circuit (see, for example, FIG. 18) configured including log circuits and an antilog circuit can be used as the divider circuit 46. That is, in the noise detector 4, the divider circuit 46 divides the output signal of the effective value computing circuit 44 by the output signal of the amplifier 42 in an analog manner (i.e., a division using analog signals).

(46) The output signal V.sub.4 of the divider circuit 46 is converted from analog to digital form by the A/D converter 48 and applied to the arithmetic section 60.

(47) An offset is applied to the image signal by the preamplifier circuit 20, and the resulting signal is amplified by the amplifiers 24 and 32 to value (GpGaB). The arithmetic section 60 subtracts this value (GpGaB) from the output value of the A/D converter 50 using a digital computation. Consequently, brightness can be removed from the output value of the image signal detector 6.

(48) The arithmetic section 60 performs a multiplication operation between the output value (GaGpSI1) of the image signal detector 6 from which brightness has been removed and the output value ((GnI2).sub.RMS/(GnI2)) of the A/D converter 48. The result of this multiplication operation is given by

(49) $\begin{array}{cc}\mathrm{Ga}\mathrm{Gp}SI1\frac{{\left(\mathrm{Gn}I2\right)}_{\mathrm{RMS}}}{\mathrm{Gn}I2}=\frac{\mathrm{Ga}\mathrm{Gp}Sn{\left(\mathrm{Gn}I2\right)}_{\mathrm{RMS}}}{\mathrm{Gn}}& \left(5\right)\end{array}$
where I1=nI2.

(50) The emission currents I1 and I2 containing emission noise do not exist in the right side of Eq. (5) above. In this way, a value proportional to the brightness component S of the sample A to be imaged and observed is obtained using the noise cancellation function in the same way as when there is no emission noise.

(51) Using a DC component I2.sub.DC and a noise component N, the emission current I2 is given by
I2=I2.sub.DC+N(6)

(52) The output signal (GnI2).sub.RMS of the effective value computing circuit 44 can be approximated by
(GnI2).sub.RMS=Gn(I2).sub.RMSGnI2.sub.DC(7)

(53) Therefore, if Eqs. (6) and (7) are substituted into Eq. (5), the result of the multiplication operation, i.e., product, is approximated by

(54) $\begin{array}{cc}\begin{array}{c}\frac{\mathrm{Ga}\mathrm{Gp}Sn{\left(\mathrm{Gn}I2\right)}_{\mathrm{RMS}}}{\mathrm{Gn}}\stackrel{}{=}\frac{\mathrm{Ga}\mathrm{Gp}Sn\left(\mathrm{Gn}I{2}_{\mathrm{DC}}\right)}{\mathrm{Gn}}\\ =\mathrm{Ga}\mathrm{Gp}SnI{2}_{\mathrm{DC}}\end{array}& \left(8\right)\end{array}$

(55) In Eq. (8), I2.sub.DC is an ideal DC current obtained by removing noise component N from the emission current I2 and is an emission current detected when there is no emission noise. The equation, I1=I2n, leads to the fact that I2.sub.DCn corresponds to the ideal DC current I1.sub.DC obtained by removing emission noise from the emission current I1.

(56) Accordingly, if the equation, I2.sub.DCn=I1.sub.DC, is substituted into Eq. (8), the result of the multiplication operation performed by the arithmetic section 60 is approximated by
GaGpSnI2.sub.DC=GaGpSI1.sub.DC(9)

(57) After performing the above-described multiplication operation, the arithmetic section 60 adds the previously subtracted product (GaGpB) to the result of the multiplication (see Eq. (9)) using a digital computation. Consequently, brightness is re-added. The result of the addition operation is given by
GaGpSI1.sub.DC+GaGpB=GaGp(SI1.sub.DC+B)(10)

(58) The arithmetic section 60 averages or otherwise arithmetically processes the result of re-addition of brightness (see Eq. (10) above) using a digital computation to generate image data and sends the image data to the PC 2 shown in FIG. 1. The PC 2 receives the image data generated by the arithmetic section 60, writes the data into a frame buffer, displays an STEM image of the sample A, from which emission noise has been removed or reduced, on the display unit, stores the image, and performs other processing.

(59) The value of the ideal DC current I1.sub.DC of Eq. (10) above is nearly equal to the emission current impinging on the sample A when there is no emission noise. Consequently, an STEM image can be observed by adjusting only two parameters, i.e., contrast and brightness, while maintaining constant Ga, Gp, Gn and the gain added to brightness that is removed and re-added.

(60) If the emission current decreases with time as shown in FIG. 5, the signal applied to the arithmetic section 60 always assumes the form given by Eq. (10). It is possible to continue to obtain a signal that is equal to the output signal V.sub.2 of the amplifier circuit 30 (given by Eq. (2)) from which only noise has been removed.

(61) Where the electron microscope 1 can switch on and off the noise cancellation function in an unillustrated manner, Eq. (10) representing the output signal of the arithmetic section 60 is similar to Eq. (2) representing the signal applied to the arithmetic section 60 when the noise cancellation function is deactivated except that the emission current I1 of Eq. (2) is replaced by I1.sub.DC. Therefore, it is not necessary to perform cumbersome operations whenever the noise cancellation function is switched on or off.

(62) The electron microscope 1 associated with the present embodiment has the following features.

(63) In the electron microscope 1, the effective value of a noise signal is divided by the noise signal by means of the divider circuit 46 in the noise detector 4. An image signal is detected in the image signal detector 6. In the arithmetic section 60, a multiplication between the output signal of the noise detector 4 and the output signal of the image signal detector 6 is performed. Thus, the image signal does not pass through the divider circuit 46.

(64) As an example, where an image signal passes through a divider circuit, if an analog division is used, then it is necessary to constitute log and antilog circuits having frequency bandwidths of several MHz corresponding to the speed at which the image signal is detected. This presents the problem that the noise component is increased greatly. Furthermore, if a digital division is used, this division is slower to perform than other types of arithmetic operations with the consequent result that the frequency bandwidth is narrowed.

(65) In the electron microscope 1, as described previously, an image signal does not pass through any divider circuit. This makes it unnecessary to form a divider circuit, for example, having a frequency bandwidth of several MHz corresponding to the speed at which the image signal is detected; otherwise, noise in the divider circuit would not be suppressed. Furthermore, in the electron microscope 1, the speed of operation of the image signal detector 6 can be enhanced without being limited by the speed at which division operations are processed. Therefore, in the electron microscope 1, the foregoing problems do no occur. Hence, noise canceling which results in a low level of noise and which can be implemented at high speed can be accomplished.

(66) Furthermore, in the electron microscope 1, the divider circuit 46 included in the noise detector 4 divides the effective value of the noise signal by the noise signal in an analog manner. As described above, the image signal does not pass through any divider circuit in the electron microscope 1 and so components making up the divider circuit 46 can be made separate from components making up the image signal detector 6. Consequently, low-noise parts having narrow frequency bandwidths can be used as the components making up the divider circuit 46. As a result, noise cancellation yielding a still lower level of noise can be accomplished.

(67) In this way, in the electron microscope 1, the image signal detector 6 needing a bandwidth higher than several MHz and the noise detector 4 used in a frequency bandwidth up to several MHz are separated from each other by analog circuitry. As a consequence, noise cancellation which results in a low level of noise and which can be implemented at high speed can be accomplished.

(68) In the electron microscope 1, the effective value of a noise signal is computed by the effective value computing circuit 44 and used as a dividend used in the divider circuit 46. This permits images to be observed without regard to the manner in which the emission current decreases with time as described previously. Therefore, in the electron microscope 1, if a cold cathode field-emission, electron gun (CFEG) is used as the electron beam source 11, images free from emission noise can be observed by performing operations similar to operations performed on a Schottky emission gun.

(69) As shown in FIG. 6A, the output signal (noise signal) of the amplifier 42 contains long-term emission noises (low-frequency noises) (noises appearing during an interval from t.sub.1 to t.sub.2 in FIG. 6A) affecting plural successive lines of image and short-term emission noises (high-frequency noises) affecting only one line. Therefore, in the effective value computing circuit 44, as the computation time to compute the effective value is reduced, the result of the computation of the effective value varies to a greater extent. As a result, the noise canceling performance will deteriorate.

(70) The computation time taken for the effective value computing circuit 44 to compute the effective value is preferably set longer than, for example, the time (several seconds) taken for the PC 2 to obtain one page of image (STEM images) of the sample A. In this case, even if there is long-term noise, for example, persisting from t.sub.1 to t.sub.2 as shown in FIG. 6A, the output signal of the effective value computing circuit 44 varies only a little during the period from t.sub.1 to t.sub.3 as shown in FIG. 6B. In consequence, the noise canceling performance will hardly deteriorate.

(71) 1.3. Modifications of Electron Microscope

(72) Modifications of the electron microscope associated with the present embodiment are next described. Only the differences with the above-described example of the electron microscope 1 shown in FIGS. 1 and 2 are described; a description of similarities is omitted.

(73) (1) First Modification

(74) A first modification is first described. FIG. 7 shows a specific example of configuration of signal processing circuitry according to the first modification of the first embodiment. In FIG. 7, those configurations which are identical to their respective counterparts of FIG. 2 are indicated by the same reference numerals as in FIG. 2 and a description thereof is omitted. The electron microscope associated with the first modification is similar in configuration to the microscope shown in FIG. 1 and so its illustration and description is omitted.

(75) The electron microscope associated with the first modification is similar to the configuration of the electron microscope 1 (see FIG. 2) associated with the first modification except that a filter 49 is inserted between the divider circuit 46 and the A/D converter 48 as shown in FIG. 7.

(76) The filter 49 has a narrow bandwidth of several kHz and can suppress noise generated in the divider circuit 46 (e.g., including log and antilog circuits). In the same way as in the above-described first embodiment, in the electron microscope associated with the present modification, the image signal detector 6 needing a bandwidth higher than several MHz and the noise detector 4 used in a bandwidth up to several MHz are separated from each other by analog circuitry and thus the image signal does not pass through the divider circuit 46. For this reason, the filter having a narrow bandwidth for suppressing noise generated by the divider circuit 46 can be inserted. No limitation is imposed on the configuration of the filter 49. Rather, any well-known filter circuit can be used.

(77) The electron microscope associated with the first modification can yield advantageous effects similar to those produced by the electron microscope 1 associated with the first embodiment.

(78) Furthermore, the electron microscope associated with the first modification can achieve noise cancellation giving rise to a still lower level of noise because the filter 49 can be inserted between the divider circuit 46 and the A/D converter 48.

(79) (2) Second Modification

(80) A second modification is next described. FIG. 8 shows a specific example of configuration of signal processing circuitry in the second modification of the first embodiment. Those configurations of FIG. 8 which are identical to their respective counterparts of FIGS. 2 and 7 are indicated by the same reference numerals as in FIGS. 2 and 7 and a description thereof is omitted. The electron microscope associated with the second modification is identical in configuration to the microscope shown in FIG. 1, and its illustration and description is omitted.

(81) The electron microscope associated with the second modification is different from the configuration of the electron microscope 1 (see FIG. 2) associated with the first embodiment in that A/D converters 48 and 50 are incorporated in the arithmetic section 60 and that the arithmetic section 60 filters the output values of the A/D converter 48 by digital computations as shown in FIG. 8. Consequently, in the second modification, noise generated by the divider circuit 46 can be suppressed by filtering operation of the arithmetic section 60 in the same manner as the above-described filter 49 (see FIG. 7) of the first modification.

(82) The electron microscope associated with the second modification can yield advantageous effects similar to those produced by the electron microscope associated with the first modification.

(83) (3) Third Modification

(84) A third modification is next described. FIG. 9 shows a specific example of the configuration of signal processing circuitry in the third modification of the first embodiment. Those configurations of FIG. 9 which are identical to their respective counterparts of FIG. 2 are indicated by the same reference numerals as in FIG. 2 and a description thereof is omitted. The electron microscope associated with the third modification is identical in configuration to the microscope shown in FIG. 1 and thus its illustration and description is omitted.

(85) The electron microscope associated with the third modification is similar to the configuration of the electron microscope 1 (see FIG. 2) associated with the first embodiment except that a constant Q is applied to the numerator input (X) of the divider circuit 46 instead of the output signal of the effective value computing circuit 44 as shown in FIG. 9.

(86) In the present modification, the noise detection circuit 40 is configured including amplifier 42, divider circuit 46, and A/D converter 48.

(87) The constant Q is applied to the numerator input (X) of the divider circuit 46, and the output signal V.sub.3 (see Eq. (3) above) of the amplifier 42 is applied, to the denominator input (Y). The divider circuit 46 performs a division of the former signal by the latter. Accordingly, the output signal V.sub.4 of the divider circuit 46 is given by

(88) $\begin{array}{cc}{V}_4=\frac{X}{Y}=\frac{Q}{\mathrm{Gn}I2}& \left(11\right)\end{array}$

(89) The output signal V.sub.4 of the divider circuit 46 is converted from analog to digital form by the A/D converter 48 and applied to the arithmetic section 60.

(90) An offset is applied to the image signal by the preamplifier circuit 20, and the resulting signal is amplified by amplifiers 24 and 32 to value (GpGaB). The arithmetic section 60 subtracts this value (GpGaB), i.e., a subtrahend, from the output value of the A/D converter 50 using a digital computation. The arithmetic section 60 performs a multiplication operation between the output value (GaGpSI1) of the image signal detector 6 from which brightness has been removed and the output value (Q/(GnI2)) of the A/D converter 48 using digital computations. The result of this multiplication operation is given by

(91) $\begin{array}{cc}\mathrm{Ga}\mathrm{Gp}SI1\frac{Q}{\mathrm{Gn}I2}=\frac{\mathrm{Ga}\mathrm{Gp}SnQ}{\mathrm{Gn}}& \left(12\right)\end{array}$
where I1=nI2.

(92) Note that none of the emission currents I1 and I2 containing emission noise are present in the right side of Eq. (12). Consequently, when the noise cancellation function is used, a value proportional to the brightness component S of the sample S to be imaged and observed is obtained in the same way as when there is no emission noise.

(93) After performing the multiplication operation, the arithmetic section 60 operates to add the subtrahend (GaGpB) to the product of the multiplication (see Eq. (12) above) using a digital computation. The resulting sum is given by

(94) 0$\begin{array}{cc}\frac{\mathrm{Ga}\mathrm{Gp}SnQ}{\mathrm{Gn}}+\mathrm{Ga}\mathrm{Gp}B=\mathrm{Ga}\mathrm{Gp}\left(\frac{SnQ}{\mathrm{Gn}}+B\right)& \left(13\right)\end{array}$

(95) The arithmetic section 60 averages or otherwise arithmetically processes the sum (see Eq. (13) above) using digital computations to generate image data and sends the image data to the PC 2 shown in FIG. 1.

(96) In the electron microscope associated with the third modification, the image signal does not pass through the divider circuit 46 in the same way as in the electron microscope 1 associated with the first embodiment and so noise cancellation which results in a low level of noise and which can be implemented at high speed can be accomplished.

2. Second Embodiment

(97) An electron microscope associated with a second embodiment of the present invention is next described by referring to FIG. 10, which shows an example of configuration of this electron microscope. Those configurations of FIG. 10 which are identical to their respective counterparts of FIG. 1 are indicated by the same reference numerals as in FIG. 1 and a description thereof is omitted.

(98) The electron microscope 1 associated with the second embodiment differs from the electron microscope 1 associated with the first embodiment in that the image detector 15 is replaced by a multi-segmented STEM detector 16 as shown in FIG. 10.

(99) The electron microscope 1 associated with the second embodiment has a plurality of distinct image signal detectors 6 corresponding to the detector segments of the multi-segmented STEM detector 16. Each image signal detector 6 detects only electrons impinging on a certain detector area on the sensitive surface of the multi-segmented STEM detector 16. This is equivalent to bringing the sensitive surface into coincidence with the diffraction plane in the electron microscope 1 so that electrons which are transmitted from the sample A into a certain solid angle region and scattered are detected. Therefore, the electron microscope 1 associated with the second embodiment can obtain information about the dependence of electrons scattered by the sample A on solid angle by the use of the multi-segmented STEM detector 16.

(100) FIG. 11 shows one example of configuration of the multi-segmented STEM detector 16. This detector 16 is configured including a scintillator 602, an optical fiber bundle 604, and photomultiplier tubes (PMTs) 606 as shown in FIG. 11.

(101) The scintillator 602 has a sensitive surface 603 that is partitioned into a plurality of detector segments radially and in the direction of deflection. In the illustrated example, the sensitive surface 603 of the scintillator 602 has 16 detector segments. However, no limitation is placed on the number of the detector segments.

(102) The optical fiber bundle 604 connects the detector segments of the scintillator 602 with the photomultiplier tubes 606. Optical fibers making up the optical fiber bundle 604 transmit light outgoing from the detector segments of the scintillator 602 to respective ones of the photomultiplier tubes 606.

(103) The photomultiplier tubes 606 receive light emerging from the detector segments of the scintillator 602 via the optical fiber bundle 604. The photomultiplier tubes 606 have a 1:1 correspondence with the detector segments of the scintillator 602. The same number (16 in the illustrated example) of photomultiplier tubes 606 as the detector segments of the scintillator 602 are connected with the optical fiber bundle 604.

(104) FIG. 12 shows a specific example of configuration of the signal processing circuitry according to the second embodiment. Those configurations of FIG. 12 which are identical to their respective counterparts of FIG. 2 are indicated by the same reference numerals as in FIG. 2 and a description thereof is omitted.

(105) As shown in FIG. 12, there are as many image signal detectors 6 as the detector segments of the scintillator 602. For example, in the present embodiment, 16 image signal detectors 6 are mounted in a corresponding manner to 16 detector segments of the scintillator 602.

(106) Each image signal detector 6 is configured including a respective one of the detector segments of the scintillator 602, optical fiber for transmitting light emitted from this detector segment, a photomultiplier tube (PMT) 606, a preamplifier circuit 20, an amplifier circuit 30, an A/D converter 50.

(107) In the present embodiment, in each image signal detector 6, brightness B is added by an adder 22 to an image signal SI1 obtained from the photomultiplier tube 606 for which contrast has been adjusted, and then the signal is amplified by a factor of Gp by an amplifier 24. The output signal V.sub.1 (see Eq. (1) above) of the preamplifier circuit is amplified by a factor of Ga by the amplifier 32. The output signal V.sub.2 (see Eq. (2) above) of the amplifier 32 is converted from analog to digital form by the A/D converter 50 and applied to the arithmetic section 60.

(108) In the present embodiment, the output values of the A/D converters 50 are applied from the image signal detectors 6 to the arithmetic section 60. That is, in the illustrated example, the output values of the A/D converters 50 are applied from the 16 image signal detectors 6 to the arithmetic section 60.

(109) An offset is applied to each image signal by the respective preamplifier circuit 20 and the resulting signal is amplified by the amplifiers 24 and 32 to value (GpGaB). This value (GpGaB), i.e., a subtrahend, is subtracted from the output values of the A/D converters 50 by the arithmetic section 60 using digital computations. The arithmetic section 60 performs, using a digital computation, a multiplication operation between the output value (GaGpSI1) of the respective image signal detector 6 undergone the subtraction and the output value ((GnI2).sub.RMS/(GnI2)) of the A/D converter 48. Then, the arithmetic section 60 adds the subtrahend (GaGpB) to the resulting products using digital computations. The arithmetic section 60 averages or otherwise arithmetically processes the sums (see Eq. (10) above) using digital computations to generate image data and sends the data to the PC 2 shown in FIG. 10.

(110) In this way, in the second embodiment, the arithmetic section 60 performs the above-described arithmetic operations in parallel in response to inputting of the output values of the A/D converters 50 of the image signal detectors 6. For example, if the number of the detector segments of the scintillator 602 increases and the number of the image signal detectors 6 increases, and if the arithmetic section performs heavy duty arithmetic processing such as divisions, load may become so great that the parallel processing may not be carried out.

(111) In the electron microscope associated with the second embodiment, a division is performed by the divider circuit 46 of the noise detector 4 and the arithmetic section 60 performs multiplication operations without performing a division operation, in the same way as in the first embodiment. Therefore, in the arithmetic section 60, load incurred in processing the arithmetic operations on the output signals of the image signal detectors 6 can be reduced, for example, as compared with the case where division operations are performed on the output signals of the image signal detectors 6. Consequently, in the electron microscope associated with the second embodiment, even if there are plural image signal detectors 6, the load on the arithmetic section 60 can be reduced. In response to inputting of the output values of the A/D converters 50 of the plural image signal detectors 6, the arithmetic section 60 can arithmetically process the output values in parallel and simultaneously.

3. Third Embodiment

(112) An electron microscope associated with a third embodiment of the present invention is next described by referring to FIG. 13, which shows one example of configuration of this electron microscope. Those configurations of FIG. 13 which are identical with their respective counterparts of FIG. 1 are indicated by the same reference numerals as in FIG. 1 and a description thereof is omitted.

(113) The electron microscope 1 associated with the third embodiment is similar to the electron microscope 1 associated with the first embodiment except that it has a dark-field detector 17 and a bright-field detector 18 as shown in FIG. 13.

(114) The dark-field detector 17 has an annular scintillator, detects elastically scattered electrons scattered at large angles from the sample A, and outputs a dark-field image signal.

(115) The bright-field detector 18 has a disk-like scintillator, detects electrons passed through a hole formed in the center of the dark-field detector 17 and scattering electrons, and outputs a bright-field image signal.

(116) In the present embodiment, the bright-field detector 18 is disposed behind the dark-field detector 17. Therefore, in the present embodiment, the dark-field image signal and the bright-field image signal can be simultaneously accepted.

(117) In the present embodiment, there are two independent image signal detectors 6a and 6b corresponding to the two detectors 17 and 18, respectively. Consequently, a bright-field image and a dark-field image can be observed simultaneously.

(118) FIG. 14 shows one specific example of configuration of signal processing circuitry according to the third embodiment. Those configurations of FIG. 14 which are identical to their respective counterparts of FIG. 2 are indicated by the same reference numerals as in FIG. 2 and a description thereof is omitted.

(119) As shown in FIG. 14, the first image signal detector 6a is configured including dark-field detector 17, preamplifier circuit 20, amplifier circuit 30, and A/D converter 50.

(120) In the first image signal detector 6a, a dark-field image signal SI1 for which brightness has been adjusted is obtained from the dark-field detector 17. Brightness B is added to this signal by the adder 22. Then, the resulting signal is amplified by a factor of Gp by the amplifier 24. The output signal V.sub.1 (see Eq. (1) above) of the preamplifier circuit is amplified by a factor of Ga by the amplifier 32. The output signal V.sub.2 (see Eq. (2) above) of the amplifier 32 is converted from analog to digital form by the A/D converter 50 and applied to the arithmetic section 60.

(121) The second image signal detector 6b is configured including bright-field detector 18, preamplifier circuit 20, amplifier circuit 30, and A/D converter 50.

(122) In the second image signal detector 6b, a bright-field image signal SI1 for which contrast has been adjusted is obtained from the bright-field detector 18, in the same way as in the first image signal detector 6a. Brightness B is added to this signal by the adder 22. The resulting signal is amplified by a factor of Gp by the amplifier 24. The output signal V.sub.1 (see Eq. (1) above) of the preamplifier circuit is amplified by a factor of Ga by the amplifier 32. The output signal V.sub.2 (see Eq. (2) above) of the amplifier 32 is converted from analog to digital form by the A/D converter 50 and impressed on the arithmetic section 60.

(123) In the first image signal detector 6a, an offset is applied to the image signal by the preamplifier circuit 20, and the resulting signal is amplified to value (GpGaB) by the amplifiers 24 and 30. The arithmetic section 60 subtracts this value (GpGaB), i.e., a subtrahend, from the output value of the A/D converter 50 of the first image signal detector 6a, using a digital computation. The arithmetic section 60 then performs, using a digital computation, a multiplication operation between the output value (GaGpSI1) of the first image signal detector 6a from which brightness has been removed and the output value ((GnI2).sub.RMS/(GnI2)) of the A/D converter 48. Then, the arithmetic section 60 adds the subtrahend (GaGpB) to the resulting product using a digital computation. The arithmetic section 60 averages or otherwise arithmetically processes the sum (see Eq. (10) above) using a digital computation to generate image data and sends the data to the PC 2 shown in FIG. 13. The PC 2 receives the image data generated by the arithmetic section 60, displays a dark-field image of the sample A from which emission noise has been removed or reduced on a display unit, stores the image, and otherwise processes it.

(124) The arithmetic section 60 performs the above-described processing also on the output value of the A/D converter 50 of the second image signal detector 6b. The PC 2 displays the bright-field image of the sample A whose emission noise has been removed or reduced on the display unit, stores the image, and otherwise processes it.

(125) In the arithmetic section 60, the arithmetic operation on the output value of the A/D converter 50 of the first image signal detector 6a and the arithmetic operation on the output value of the A/D converter 50 of the second image signal detector 6b are carried out in parallel and simultaneously.

(126) The electron microscope associated with the third embodiment can yield advantageous effects similar to those produced by the electron microscope associated with the second embodiment.

4. Other Embodiments

(127) It is to be understood that the present invention is not restricted to the foregoing embodiments but rather can be practiced in variously modified forms without departing from the gist and scope of the present invention.

(128) For example, in the electron microscope 1 associated with the first embodiment, as shown in FIG. 2, the output signal of the effective value computing circuit 44 is divided in an analog manner by the output signal of the amplifier 42 by means of the divider circuit 46 in the noise detector 4. In the electron microscope associated with the third modification of the first embodiment, as shown in FIG. 9, the constant Q is divided in an analog manner by the output signal of the amplifier 42 by means of the divider circuit 46 in the noise detector 4. In the electron microscope associated with the present invention, the dividend of the divider circuit 46 is not restricted to the above-described effective value of a noise signal or a constant. The dividend may be set to an average value of a noise signal or other value. Even in this case, according to the electron microscope associated with the present invention, noise cancellation which results in a low level of noise and which can be implemented at high speed can be accomplished in the same way as in the above embodiments.

(129) Furthermore, in the above-described example of the electron microscope 1 associated with the first embodiment, analog circuitry configured including log and antilog circuits is described as the divider circuit 46 as shown in FIG. 2. In the electron microscope associated with the present invention, a general-purpose IC, for example, is used as the divider circuit 46. That is, the noise detector 4 may divide the output signal of the effective value computing circuit 44 by the output signal of the amplifier 42 using a digital arithmetic operation. Similarly, in the above-described example of the electron microscope associated with the third modification of the first embodiment, an analog circuit is used as the divider circuit 46 as shown in FIG. 9. The noise detector 4 may divide the constant Q by the output signal of the amplifier 42 using a digital arithmetic operation. Even in this case, according to the electron microscope associated with the present invention, the image signal does not undergo any division operation using a digital arithmetic operation. Hence, noise cancellation which results in a low level of noise and which can be implemented at high speed can be accomplished in the same way as in the foregoing embodiments.

(130) In electron microscopes associated with the above-described embodiments, an offset is added to an image signal by the preamplifier circuit 20 for brightness adjustment as shown in FIG. 2 and a value equivalent to the offset is subtracted in the arithmetic section 60 prior to a multiplication, and the value which is equivalent to the offset and which was used as a subtrahend is added to the product. In the electron microscope associated with the present invention, no offset may be added in the preamplifier circuit 20. A multiplication may be performed in the arithmetic section 60. After this multiplication, i.e., after performing a noise canceling process, an offset for brightness adjustment may be added. Also, in this case, advantageous effects similar to those produced by the above embodiments can be obtained.

(131) In the description of the above embodiments, a scanning transmission electron microscope (STEM) is taken as an example of electron microscope. The present invention can also be applied to other type of electron microscope such as a scanning electron microscope (SEM). Also, in this case, advantageous effects similar to those produced by the above embodiments can be had.

(132) It is to be noted that the above-described embodiments and modifications are merely exemplary and that the invention is not restricted thereto. For example, such embodiments and modifications may be appropriately combined.

(133) The present invention embraces configurations (e.g., configurations identical in function, method, and results or identical in purpose and advantageous effects) which are substantially identical to the configurations described in any one of the above embodiments. Furthermore, the invention embraces configurations which are similar to the configurations described in any one of the above embodiments except that their nonessential portions have been replaced. Additionally, the invention embraces configurations which are identical in advantageous effects to, or which can achieve the same object as, the configurations described in any one of the above embodiments. Further, the invention embraces configurations which are similar to the configurations described in any one of the above embodiments except that a well-known technique is added.

(134) Having thus described my invention with the detail and particularity required by the Patent Laws, what is desired protected by Letters Patent is set forth in the following claims.