Circuit Board Structure

Abstract

A printed circuit board structure that includes at least one insulation layer, at least one conductor layer, and at least one embedded component having a contact pad that has an outer barrier layer, in which structure at least two conductor paths/conductor layers are connected to at least two connections using vias, and each via runs from a conductor path/conductor layer directly to the barrier contact layer of the corresponding connection of the component.

Claims

1. Printed circuit board structure comprising at least one insulation layer, at least one conductor layer, and at least one embedded component having a contact pad that has an outer barrier layer, in which structure at least two conductor paths/conductor layers are connected to at least two connections using vias, wherein in an outer conductor layer in the area of the connections of the component, at least one opening is produced, which opening extends to a barrier layer of a connection, and each via runs from a conductor path/conductor layer directly to the barrier contact layer of the corresponding connection of the component, wherein the material of the barrier contact layer is selected from the group of nickel, nickel-vanadium, platinum, and cobalt, characterized in that the at least one opening is cleaned chemically, whereby the thickness of the barrier layer in the area of the at least one opening is reduced.

2. Printed circuit board structure according to claim 1, characterized in that the material of the barrier contact layer is nickel.

3. Printed circuit board structure according to claim 1, characterized in that the via comprises copper.

4. Printed circuit board structure according to claim 1, characterized in that an adhesion layer is arranged below the barrier contact layer.

5. (canceled)

6. Printed circuit board structure according to claim 4, characterized in that the adhesion layer is selected from the group of titanium, titanium-tungsten, and chromium.

7. Printed circuit board structure according to claim 1, characterized in that the component is a power component.

8. Printed circuit board structure according to claim 6, characterized in that the power component is an IGBT-Chip/MOSFET.

9. Printed circuit board structure according to claim 1, characterized in that the component is a power diode.

10. Printed circuit board structure according to claim 1, characterized in that it is embodied to be flexible, at least flexible in segments.

11. Method for contacting a component embedded in a printed circuit board structure on a conductor segment by producing vias from a conductor layer to connections of the component, wherein in the area of the connections of the component, at least one opening is produced in an outer conductor layer, which opening extends to a barrier layer of a connection, wherein the material of the barrier contact layer is selected from the group of nickel, nickel-vanadium, platinum, and cobalt, and then at least one via from the conductor path/conductor layer directly to the barrier layer of the corresponding connection of the component is produced, characterized in that at least one opening is cleaned chemically prior to the production of the vias, whereby the thickness of the barrier layer is reduced during the chemical cleaning step.

12. Method according to claim 11, characterized in that, for forming a copper layer on the surface and in the openings, a currentless copper-plating is performed on at least one side of the printed circuit board structure.

13. Method according to claim 11, characterized in that the at least one opening is produced by laser cutting.

14. (canceled)

15. (canceled)

16. Method according to claim 11, characterized in that, after the currentless copper plating, a mask is applied to the at least one side of the printed circuit board structure and then electrolytic copper-plating is conducted for producing at least one conductor layer and then the vias are produced and the mask is removed.

Description

[0019] In one advantageous variant of the method it is provided that, after the currentless copper-plating, a mask is applied to the at least one side of the printed circuit board structure and then electrolytic copper-plating is conducted for producing at least one conductor layer and then the vias are produced and the mask be removed. The invention and additional advantages are described in the following using exemplary embodiments that are illustrated in the drawings, wherein:

[0020] FIGS. 1a and 1b are significantly enlarged sectional detailed views of the contacting of a contact pad in a printed circuit board according to the prior art and the invention;

[0021] FIG. 2 is a sectional view of a power MOSFET, as an exemplary component, prior to embedding in a printed circuit board structure and prior to contacting;

[0022] FIGS. 3 through 8 each depict, in sections through a printed circuit board structure, individual steps of an inventive method for embedding the component illustrated in FIG. 2;

[0023] FIG. 9 depicts one variant of an inventive printed circuit board structure having a total of four embedded components; and,

[0024] FIG. 9a depicts a segment from FIG. 9 having modified vias for two components.

[0025] First FIGS. 1a and 1b shall be referenced; they will explain the principle difference between contacting a contact pad of an embedded component according to the prior art, on the one hand, and according to the invention, on the other hand.

[0026] FIG. 1a provides a detailed view of a component 1, for instance a chip, that has for contacting on its surface a flat contact 2, e.g. made of aluminum. Placed thereover is a contact adhesion layer 3, for instance made of titanium, titanium-tungsten, or chromium, and this is connected, with the interposition of a barrier layer 4, to a contact pad 5 that generally comprises copper. In addition, a passivation layer 6 that generally comprises silicon nitride is applied to the surface of the component 1.

[0027] Provided for connecting to a conductor 7 or conductor layer, generally comprising copper, within a printed circuit board structure not shown until further below, from the conductor 7 to the connection 8 of the component 1, comprising contact 2, adhesion layer 3, barrier layer 4, and contact pad 5, is a via 9 that, as shall also be explained in greater detail below, is produced electrolytically. The connection between the conductor 7 and the connection 8 of the component 1 is thus produced using a two-stage copper connection, specifically, the via 9 and the copper contact pad 5.

[0028] In contrast, FIG. 1b, in which the same reference numbers as in FIG. 1a are used for identical parts, illustrates that in accordance with the invention the via 9 runs from the conductor 7 directly to the barrier layer 4 of the contact pad of the connection 8.

[0029] In FIG. 2, depicted as an example of a component 1 is a power MOSFET that in accordance with the invention is to be embedded in a printed circuit board structure and is produced contacted on both sides using the planar process. The silicon substrate 1s, the structure of which is not shown in greater detail, has on its bottom for the drain connection 8d a flat drain contact 2d made of aluminum, followed by a drain adhesion layer 3d made of titanium, and a drain barrier layer 4d made of nickel. Provided on the top side of the component 1 are, for the gate connection 8g, a flat gate contact 2g made of aluminum, thereabove a gate adhesion layer 3g, and, finally, a gate barrier layer 4g, and analogously the same for the source connection 8s having a flat source contact 2s made of aluminum, a source adhesion layer 3s, and a source barrier layer 4s. As has already been illustrated in FIG. 1, there is also a passivation layer 6 made of silicon nitride on the top side.

[0030] At this point it should be noted that terms such as top, bottom, upper, lower and the like relate primarily to the drawings and are intended to simplify the description, but do not necessarily relate to any specific orientation of the described parts or their orientation in the production process.

[0031] The manufacture of an inventive printed circuit board structure is described in the following, referencing FIGS. 3 through 8, wherein in this case the embedding and contacting of the components according to FIG. 2 is illustrated using a segment of a printed circuit board component.

[0032] In a first step, in accordance with FIG. 3 the component 1 is embedded in a printed circuit board that in the present case comprises an insulation layer 10 having an upper conductor layer 11 and a lower conductor layer 12. The insulation layer 10 may be a conventional prepreg based on an epoxy resin with fiberglass reinforcement, e.g. FR 4 or, in other cases, e.g. a polyimide with or without reinforcement; the conductor layers are normally copper films. Embodied in the lower conductor layer 12 is a window 13 that exposes the bottom of the component and the drain connection 8d.

[0033] In the next step, as can be seen in FIG. 4, by etching off copper from the upper conductor layer and laser cutting the insulation layer 10, two openings are created on the top, specifically a gate opening 14 and a source opening 15, that reach to the gate barrier layer 4g and to the source barrier layer 4s of the gate connection 8g and source connection 8s.

[0034] In another step, the openings 14, 15 are cleaned with hole cleaning processes known in the field of printed circuit boards, e.g. by chemical cleaning using potassium permanganate, and the thickness of all barrier layers 4d, 4g, 4s may be reduced by chemical dissolution of the barrier layers. It is possible to see the reduced thickness of the barrier layers 4d, 4g, 4s in FIG. 5. Prior to the cleaning, the barrier layers 4d, 4g, 4s have a thickness of at least 100 nm or more and in the cleaning step are reduced by, for instance, 50 nm, and for thicker barrier layers by, for instance, up to 500 nm.

[0035] The result of a following step, in which currentless copper-plating is performed both on the top and on the bottom, is shown in FIG. 6. An upper copper layer 16 and a lower copper layer 17 are formed, wherein the upper copper layer 16 covers not only the upper conductor layer 11, but also the walls of the openings 14 and 15, as well as the gate barrier layer 4g and the source barrier layer 4s. The lower copper layer 17 likewise covers the lower conductor layer 12 and the one drain barrier layer 4d.

[0036] Although the description addresses copper layers, copper conductors, and the like, this shall in no way exclude the use of other suitable conductive materials, such as e.g. gold and silver.

[0037] With reference to FIG. 7, in the next step electrolytic copper-plating is performed on both the bottom and the top side, wherein those parts that are not to be copper-plated are covered with a mask 18 (reverse mask) that is removed after the copper-plating. The result of this semi-additive plating are thick (compared to the copper layers 16, 17) outer conductor layers, specifically a structured upper conductor layer 19 and a lower conductor layer 20, wherein these conductor layers are integral with vias 9d, 9g, and 9s to the gate-, drain-, and source-contacts of the component 1. The total thickness of the outer conductor layers is, for instance, in the range of 5 to 70 m. In the present case, because of the significant elongation of the drain contact, the via 9d to this contact is hardly recognizable as a via; instead, there is only a slight depression of the lower conductor layer by, e.g., less than 2 m.

[0038] Once the mask 18 has been removed, the final result is the printed circuit board structure 21 that is illustrated in FIG. 8 and that includes the embedded component 1, which is electrically connected to the conductor layers 19, 20, or, more precisely, gate G, source S, and drain D and the associated connections 8g, 8s, and 8d of the MOSFET are connected to these correspondingly structured conductor layers 19, 20.

[0039] FIG. 9 illustrates as an example another embodiment of a printed circuit board structure 22 that is manufactured according to the method described above and includes a total of four components, specifically a first MOSFET 23, e.g. a high source FET, a second MOSFET 24, e.g. a low source FET, a control chip 25, and a capacitor 26, e.g. a multilayer cofired ceramic capacitor. In FIG. 9, the same reference numbers are used for comparable parts as in the preceding figures, wherein it should also be noted that the MOSFET 23 and the MOSFET 24 are embedded in the printed circuit board structure 22 in the same manner and are connected to an upper and lower structured conductor layer 19 and 20, as illustrated previously in FIGS. 3 through 8, wherein however the gate and source connections are below and the drain connections are above.

[0040] Also visible in FIG. 9 are two vias 27, 28 between the upper and the lower conductor layers 19, 20, wherein one via 28 produces a connection between source S of the first MOSFET 23 and drain D of the second MOSFET 24. In this embodiment, the vias are divided from the bottom conductor layer 20 to the drains of the MOSFETs into three or five vias 9. For the sake of simplicity, in FIG. 9 all of the vias from the conductor layers 19, 20 to component connections are provided with the reference number 9.

[0041] In FIG. 9, the control chip 25 is arranged to the right of the MOSFET 24 and the capacitor 26 is then arranged even further to the right.

[0042] The structure of the electrode contacting for the MOSFETs 23 and 24 and the control chip 25 is the same as illustrated in FIG. 1b and FIG. 2; thus, from the inside to the outside, it comprises a contact layer, a contact adhesion layer, and a barrier layer. In contrast, the two connections for the capacitor 26 are each provided on the inside with a contact adhesion layer 26-3, followed by a contact barrier layer 26-4. The adhesion layers 26-3 preferably comprise chromium and the barrier layers 26-4 nickel. The printed circuit board structure 22 illustrated in FIG. 9 may include additional components (not shown here), such as power diodes, resistors, and inductors.

[0043] In one embodiment depicted in the segment in accordance with FIG. 9a, for increasing the ampacity, not only are the drain connections of the MOSFETs 23, 24 contacted across their entire surface, but also their source connections are contacted across their entire surface, i.e. instead of the three vias 9 for the source S of the MOSFET 23 and the five vias 9 for the source S of the MOSFET 24, there is only one large via designed which is labeled 9.

[0044] Because the invention makes it possible to keep the thickness of the printed circuit board structure very thin, it is also easily possible for the printed circuit board structure to be designed to be very flexible, at least in segments, wherein in this case polyimide, for instance, may be used as the material for the insulation layer.