WIRELESS COMMUNICATION DEVICE AND METHOD

20170163379 ยท 2017-06-08

Assignee

Inventors

Cpc classification

International classification

Abstract

SISO decoding of a reception signal having a scrambled symbol arrangement is realized using a process having reduced complexity. Coordinates are generated for a reference point obtained by scrambling and mapping a symbol number not a symbol reference point position. This reference point simulates transmission-side scrambling and is generated for each symbol number by a first mapping unit. Because the binary expression of a corresponding original signal number is retained, a bit likelihood calculation unit can easily calculate a bit likelihood based on the distance between the reference point and a reception signal. The calculated bit likelihood is then deinterleaved and subjected to SISO error-correcting decoding. The thus obtained bit likelihood is then reinterleaved and used to calculate a symbol probability. Soft symbols are generated through the multiplication of all the calculated symbol probabilities by corresponding reference points output by a second mapping unit similar to the first mapping unit.

Claims

1. A wireless communication device comprising: a transmission side baseband signal processing unit which includes: a means for converting a modulation bit sequence into a symbol mapping number; a means for generating a scramble code for the symbol mapping number; a symbol mapping number converting means for scrambling the symbol mapping number using the scramble code to convert the symbol mapping number into a transmission symbol mapping number; a means for performing mapping according to the transmission symbol mapping number and a corresponding modulation scheme; and a modulation transmission means for converting an output of the mapping into a time signal and converting and transmitting the time signal into a transmission frequency, and a reception side baseband signal processing unit which includes: a means for receiving and detecting a signal transmitted by the modulation transmission means, a channel equalization means for performing channel equalization or its equivalent process on the detected signal; a means for generating a first reference point symbol mapping number for generating a reference point in the modulation scheme; a means for scrambling the first reference point symbol mapping number using the scramble code to convert the first reference point symbol mapping number into a first reference point transmission symbol mapping number; a first reference point mapping means for performing mapping according to the first reference point transmission symbol mapping number and the modulation scheme; a means for calculating a distance between an output of the first reference point mapping means and an output of the channel equalization means; and a means for calculating a bit likelihood by referring to the first reference point symbol mapping number and the distance.

2. The wireless communication device of claim 1, wherein the transmission side baseband signal processing unit further includes a means for performing error correction encoding and a first interleaving means for performing interleaving on an error correction encoded signal and outputting an interleaved signal to the symbol mapping number converting means, and the reception side baseband signal processing unit further includes a means for deinterleaving the bit likelihood, a means for performing soft-input soft-output error correction decoding on the deinterleaved signal, a second interleaving means for applying the same interleaving pattern as the first interleaving means to the soft-input soft-output error correction decoded output, a means for converting a bit likelihood output from the second interleaving means into a bit probability, a symbol mapping probability calculating means for calculating a symbol mapping probability from the bit probability based on the modulation scheme, a means for generating a second reference point symbol mapping number for soft symbol calculation, a means for generating a second reference point transmission symbol mapping number using the scramble code for the second reference point symbol mapping number, a second reference point mapping means for performing mapping according to the second reference point transmission symbol mapping number and the modulation scheme, a soft symbol calculating means for calculating a soft symbol from an output of the symbol mapping probability calculating means and an output of the second reference point mapping means, and a turbo equalization means for feeding back an output of the soft symbol calculating means to the channel equalization means.

3. A wireless communication method comprising: on a transmission side, converting a modulation bit sequence into a predetermined symbol mapping number; generating a scramble code for the symbol mapping number; scrambling the symbol mapping number using the scramble code to convert the symbol mapping number into a transmission symbol mapping number; performing mapping according to the transmission symbol mapping number and a corresponding modulation scheme; and converting an output of the mapping into a time signal and converting and transmitting the time signal into a transmission frequency, and further comprising: on a reception side, receiving and detecting the transmitted signal; performing channel equalization or its equivalent process on the detected signal; generating a first reference point symbol mapping number for generating a reference point in the modulation scheme; scrambling the first reference point symbol mapping number using the scramble code to convert the first reference point symbol mapping number into a first reference point transmission symbol mapping number; performing mapping according to the first reference point transmission symbol mapping number and the modulation scheme; calculating a distance between an output of the mapping and an output of the channel equalization; and calculating a bit likelihood by referring to the first reference point symbol mapping number and the distance.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0048] FIG. 1 is a diagram showing a symbol mapping point arrangement and a transmission symbol mapping number of PSK in MIL-STD-188-110B Appendix C.

[0049] FIG. 2 is a diagram showing a symbol mapping point arrangement of QAM in MIL-STD-188-110B Appendix C.

[0050] FIG. 3 is a functional block diagram showing a first embodiment of the present invention.

[0051] FIG. 4 is a diagram showing an example of symbol mapping number conversion.

[0052] FIG. 5 is a diagram for explaining an example of an operation according to a transmission signal and scrambling.

[0053] FIGS. 6A and 6B are diagrams for explaining an example of a reference point according to a reception signal and scrambling.

[0054] FIG. 7 shows a functional block diagram of bit LLR calculation when the present invention is not applied.

[0055] FIG. 8 shows a result of calculating a distance between the reception point and each reference point in FIG. 6.

[0056] FIG. 9 shows a bit LLR calculation result when the present invention is not applied.

[0057] FIG. 10 shows a bit LLR calculation result when the present invention is applied.

[0058] FIG. 11 is a functional block diagram showing a second embodiment of the present invention.

[0059] FIG. 12 is a functional block diagram of soft symbol calculation when the present invention is not applied.

DETAILED DESCRIPTION OF THE EMBODIMENTS

[0060] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First Embodiment

[0061] FIG. 3 shows a configuration of a wireless communication device 1 according to a first embodiment. The wireless communication device 1 includes an error correction encoder 11, an interleaver 12, a serial/parallel converter 13, a symbol mapping number converter 14, a scramble code generator 15, a transmission symbol mapping number converter 16, a symbol mapping unit 17, a modulator 18, a transmission antenna 19, a reception antenna 20, a detector 21, a channel equalizer 22, a reference point symbol mapping number generator 23, a scramble code generator 24, a reference point transmission symbol mapping number generator 25, a reference point symbol mapping unit 26, a bit LLR calculator 27, a deinterleaver 28, and an error correction decoder 29.

[0062] The error correction encoder 11 performs error correction encoding such as convolutional encoding on an input information bit sequence, and outputs it to the interleaver 12.

[0063] The interleaver 12 arranges the input bit sequence in a predetermined order, and outputs it to the serial/parallel converter 13.

[0064] The serial/parallel converter 13 bundles bits of the input bit sequence corresponding to each modulation bit number of a predetermined modulation scheme, and outputs it to the transmission symbol mapping number converter. For example, every 2 bits are processed in QPSK, and every 3 bits are processed in 8PSK.

[0065] The symbol mapping number converter 14 converts the input modulation bit sequence into a symbol mapping point number according to a predetermined conversion rule, and outputs it to the transmission symbol mapping number converter 16. As the conversion rule of the symbol mapping point, for example, in MIL-STD-188-110B Appendix C, conversion as shown in FIG. 4 is performed.

[0066] The scramble code generator 15 outputs the scramble code bit sequence of the number of bits according to the predetermined modulation scheme to the transmission symbol mapping number converter 16. The scramble code bit sequence uses, for example, an output according to a predetermined cut-out rule of a Pseudo-random Noise (PN) generator.

[0067] The transmission symbol mapping number converter 16, for example, as described in the Background of the Invention, when the symbol mapping number is N(m) and the scramble code is N.sub.SCR(m), calculates a transmission symbol mapping number N.sub.TX(m) using Eq. 1 or Eq. 2, and outputs the transmission symbol mapping number N.sub.TX(m) to the symbol mapping unit 17.

[0068] The symbol mapping unit 17 selects a predetermined symbol mapping point using the input transmission symbol mapping number N.sub.TX(m), and outputs the selected symbol mapping point to the modulator 18.

[0069] The modulator 18 converts the input mapping output into a time signal, converts the time signal into a transmission frequency, and outputs it to the transmission antenna 19.

[0070] The transmission antenna 19 transmits the input modulation signal to a wireless transmission space.

[0071] The reception antenna 20 receives the transmission signal from the wireless transmission space and outputs it to the detector 21.

[0072] The detector 21 detects the input signal, converts it into a frequency signal, and outputs it to the channel equalizer 22.

[0073] The channel equalizer 22 estimates a channel distortion between transmission and reception of the input reception frequency signal, corrects it, and outputs it to the bit LLR calculator 27. For channel equalization, when the reception signal is Y(m), the estimated channel between transmission and reception is H(m), and an equalization output is X(m), channel equalization is performed by using, for example, Eq. 3 or Eq. 4 according to the minimum mean square error (MMSE) criterion.

[00001] X ^ ( m ) = Y ( m ) H ^ ( m ) Eq . .Math. 3 X ^ ( m ) = Y ( m ) ( H ^ ( m ) .Math. H ^ H ( m ) + 2 ) - 1 .Math. H ^ ( m ) Eq . .Math. 4

[0074] where [].sup.H is a complex conjugate and .sup.2 is a noise power.

[0075] The reference point symbol mapping number generator 23 generates an integer (reference point symbol mapping number) of 0 . . . Q1, where Q represents the number of mapping points that can be obtained by the modulation scheme, and outputs it to the reference point transmission symbol mapping number generator 25 and the bit LLR calculator 27. For example, a register value prepared in advance, a read value of a ROM, and a counter value are used for number generation.

[0076] The scramble code generator 24 has the same function as the scramble code generator 15, and outputs the generated scramble code bit sequence to the reference point transmission symbol mapping number generator 25.

[0077] The reference point transmission symbol mapping number generator 25 has the same function as the transmission symbol mapping number converter 16, generates a reference point transmission symbol mapping number from the input reference point symbol mapping number and the scramble code bit sequence, and outputs it to the reference point symbol mapping unit 26.

[0078] The reference point symbol mapping unit 26 has the same function as the symbol mapping unit 17, selects a predetermined mapping point using the input reference point transmission symbol mapping number, and outputs it to the bit LLR calculator 27.

[0079] The bit LLR calculator 27 calculates a bit likelihood using the input channel equalization output, the reference point mapping output and the reference point symbol mapping number, and outputs the bit likelihood to the deinterleaver 28. Hereinafter, the bit likelihood calculation in addition to the transmission-side processing and the reference point generation will be described.

[0080] FIG. 5 shows an example of a transmission signal of 16QAM, which is an example when the symbol mapping number is and the scramble code is 5. The transmission symbol mapping number is converted into 6 by using Eq. 2. Therefore, with this symbol, the symbol mapping number 6 is mapped and outputted.

[0081] FIGS. 6A and 6B respectively show states before and after scrambling of the transmission symbol number is applied to a reception point and reference points when the transmission signal of FIG. 5 is received.

[0082] First, hard decision of the reception signal will be considered. In the case where the present invention is not applied, an arrangement of mapping points of reference points is shown in FIG. 6A, and it is apparent that a point having a minimum distance is 6. Therefore, when hard decision is made, the transmission symbol mapping number of a transmission source of the reception signal is 6. When 6 is descrambled, 3 is obtained, which coincides with the symbol mapping number of the transmission source.

[0083] In the case where the present invention is applied, an arrangement of mapping points of reference points is shown in FIG. 6B, and it is apparent that a point having a minimum distance is 3. Therefore, when hard decision is made, it is obtained that the symbol mapping number of the transmission source of the reception signal is 3.

[0084] Next, calculation of a soft decision bit likelihood will be considered. As mentioned above, since the mapping arrangement of MIL-STD-188-110B Appendix C does not have a lattice shape, a value of a real part or an imaginary part of the equalization output cannot be used as a likelihood, and thus, a distance from the reference point is measured to calculate the likelihood. Here, a bit log likelihood ratio (LLR) is considered. The bit LLR (m, b.sub.n) is calculated, for example, by the following equation:

[00002] ( m , b n ) = log .Math. .Math. q = 0 Q - 1 .Math. Y R ( m , q ) ( b n = 0 ) .Math. exp ( - .Math. Y R ( m , q ) - Y ( m ) .Math. 2 2 ) .Math. q = 0 Q - 1 .Math. Y R ( m , q ) ( b n = 1 ) .Math. exp ( - .Math. Y R ( m , q ) - Y ( m ) .Math. 2 2 ) Eq . .Math. 5

[0085] where b.sub.n is the n-th bit of the modulation bit of the symbol, q is the reference point symbol mapping number, and Y.sub.R(m, q) is the reference point symbol mapping output. Here, by using the approximate expression:

[00003] log .Math. .Math. i .Math. exp ( x i ) max ( x i ) , Eq . .Math. 6

[0086] Eq. 5 can be approximated to the following equation:

[00004] .Math. ( m , b n ) = min Y R ( m , q ) ( b n = 1 ) .Math. .Math. Y R ( m , q ) - Y ( m ) .Math. 2 - min Y R ( m , q ) ( b n = 0 ) .Math. .Math. Y R ( m , q ) - Y ( m ) .Math. 2 2 Eq . .Math. 7

[0087] Therefore, it is calculated by using the minimum distance to 1 and the minimum distance to 0 with respect to each bit. The above method can be applied even if the mapping arrangement has a lattice shape. Further, a known method for finding the symbol having the minimum distance more efficiently than the full search can be utilized.

[0088] The bit likelihood calculation process in the present embodiment is a method of calculating the likelihood by obtaining a distance from the reference point with respect to the equalization output of the mapping arrangement which does not have a lattice shape, and is different from maximum likelihood detection (MLD) which generates a replica using the channel estimation value and the reference mapping point and calculates a distance between the reception signal and the replica.

[0089] For comparison, FIG. 7 shows a configuration of an LLR calculation unit 30 in the case where the bit likelihood calculation process of the present embodiment is not applied. The LLR calculation unit 30 includes a phase rotation unit 31, bit LLR calculators 27a and 27b, a code converter 32, and a signal selector 33. Since the bit LLR calculators 27a and 27b are similar to the bit LLR calculator 27 described above, a redundant description will be omitted.

[0090] The phase rotation unit 31 outputs a signal {circumflex over (X)}(m) obtained by performing phase rotation on the equalization output signal {circumflex over (X)}(m) using the scramble code N.sub.SCR(m) to the bit LLR calculator 27. The phase rotation is calculated, for example, by the following equation:

[00005] X ^ ( m ) = X ^ ( m ) .Math. exp ( - j .Math. 4 .Math. N SCR ( m ) ) Eq . .Math. 8

[0091] where j is an imaginary unit. This operation corresponds to descrambling in PSK.

[0092] On the other hand, in the case of QAM, the bit LLR calculator 27b calculates a bit LLR .sub.QAM(m, b.sub.n) from the input equalization output signal {circumflex over (X)}(m), for example, based on Eq. 7.

[0093] FIG. 8 shows a distance calculation result in a bit LLR calculation process when the reception point in 16QAM of FIG. 6 is set to (0.9, 0.3). In obtaining the LLR of each bit, a symbol whose bit is 0 and which has the minimum distance and a symbol whose bit is 1 and which has the minimum distance (in this example, symbol mapping numbers 6, 7, 14) are selected.

[0094] The code converter 32 performs code conversion according to the scramble code N.sub.SCR(m) on the bit LLR .sub.QAM(m, b.sub.n) inputted from the bit LLR calculator 27b, and outputs the code-converted bit LLR .sub.QAM(m, b.sub.n) to the signal selector 33. The code conversion is performed, for example, according to the following equation:


.sub.QAM(m,b.sub.n)=.sub.QAM(m,b.sub.n){1-2.Math.bitget(N.sub.SCR(m),n)}Eq. 9

[0095] where bitget(A, B) is a function that extracts the B-th bit when A is represented by a binary number. This operation corresponds to descrambling in QAM.

[0096] With regard to the input bit LLR .sub.PSK(m, b.sub.n) and .sub.QAM(m, b.sub.n), the signal selector 33 selects and outputs .sub.PSK(m, b.sub.n) if the modulation scheme is PSK, and selects and outputs .sub.QAM(m, b.sub.n) if the modulation scheme is QAM.

[0097] Here, FIG. 9 shows the LLR and code conversion output of each bit based on Eq. 7 if the reception point is (0.9, 0.3) when the first embodiment is not applied. For simplicity of explanation, calculation was made with .sup.2=1.

[0098] FIG. 10 shows a bit LLR calculation result according to the first embodiment (scrambling the reference point symbol mapping number). It can be seen from both results that the same calculation result is obtained. In the case of applying the first embodiment, it is unnecessary to classify the process into PSK and QAM cases and to select the output as shown in FIG. 7.

[0099] Referring back to FIG. 3, the deinterleaver 28 rearranges the input bit LLR arranged by the interleaver 12 in the original arrangement order, and outputs it to the error correction decoder 29.

[0100] The error correction decoder 29 performs error correction decoding such as Viterbi algorithm decoding on the input bit LLR, and outputs an error correction result.

[0101] According to the first embodiment described above, by receiving the transmission signal in which the symbol mapping number is scrambled on the transmission side and generating the reference point by scrambling the reference point symbol mapping number, it is possible to calculate a soft decision value such as bit LLR.

Second Embodiment

[0102] FIG. 11 shows a configuration of a wireless communication device according to a second embodiment of the present invention. A wireless communication device 200 according to the second embodiment comprises a wireless transmitter which includes an error correction encoder 11, an interleaver 12, a serial/parallel converter 13, a symbol mapping number converter 14, a scramble code generator 15, a transmission symbol mapping number converter 16, a symbol mapping unit 17, a modulator 18, and a transmission antenna 19, and a wireless receiver which includes a reception antenna 20, a detector 21, a SC/MMSE filter 201, a reference point symbol mapping number generator 23, a scramble code generator 24, a reference point transmission symbol mapping number generator 25, a reference point symbol mapping unit 26, a bit LLR calculator 27, a deinterleaver 28, a soft-input soft-output error correction decoder 202, a hard decision unit 203, an interleaver 204, a bit probability calculator 205, a symbol mapping probability calculator 206, a reference point symbol mapping number generator 207, a scramble code generator 208, a reference point soft symbol mapping number converter 209, a reference point soft symbol mapping unit 210, and a soft symbol calculator 211. The wireless receiver realizes iterative decoding using a soft symbol (soft decision value).

[0103] All the configurations (the error correction encoder to the transmission antenna 19) of the wireless transmitter are the same as those in the first embodiment and are not illustrated.

[0104] Also, among the configurations of the wireless receiver, since the reception antenna 20, the detector 21, the reference point symbol mapping number generator 23, the scramble code generator 24, the reference point transmission symbol mapping number generator 25, the reference point symbol mapping unit 26, the bit LLR calculator 27, and the deinterleaver 28 are the same as those in the first embodiment, a description thereof will be omitted.

[0105] The SC/MMSE filter 201 estimates a channel between transmission and reception from the input reception signal, generates a reference point of an interference component included in the reception signal from the channel estimation result and the input soft symbol, subtracts it from the reception signal, performs equalization based on the MMSE criterion, and outputs an equalization output to the bit LLR calculator 27.

[0106] The soft-input soft-output error correction decoder 202 performs soft-input soft-output error correction decoding on the input bit LLR based on, for example, a soft output Viterbi algorithm (SOVA) or Bahl-Cocke-Jelinek-Raviv (BCJR) algorithm, and outputs the decoding result to the hard decision unit 203 and the interleaver 204.

[0107] For example, the hard decision unit 203 performs hard decision to output 0 if a sign of the input bit LLR is positive and to output 1 if it is negative, and outputs the decision result.

[0108] The interleaver 204 arranges the input bit LLR in the same order as the interleaver 12, and outputs it to the bit probability calculator 205.

[0109] The bit probability calculator 205 calculates a bit probability from the input bit LLR and outputs the bit probability to the symbol mapping probability calculator 206. The calculation of the bit probability is performed, for example, when L.sub.e.sup.D(m, b.sub.n) refers to the error-corrected bit LLR, p.sub.0 (m, b.sub.n) refers to the bit probability that the bit is 0, and p.sub.1(m, b.sub.n) refers to the bit probability that the bit is 1, by the following equations:

[00006] p 0 ( m , b n ) = 1 1 + e - L e D ( m , b n ) Eq . .Math. 10 p 1 ( m , b n ) = 1 1 + e L e D ( m , b n ) Eq . .Math. 11

[0110] The symbol mapping probability calculator 206 calculates a symbol mapping probability P.sub.i(m) using the input bit probabilities p.sub.0(m, b.sub.n) and p.sub.1(m, b.sub.n), and outputs it to the soft symbol calculator 211. The calculation of the symbol mapping probability is performed, for example, by the following equation:

[00007] P q ( m ) = .Math. n = 0 R - 1 .Math. p u ( m , b n ) Eq . .Math. 12

[0111] where B is the modulation bit number of the modulation scheme. Also, u is calculated by the following equation:


u=bitget(i,n)Eq. 13

[0112] The reference point symbol mapping number generator 207 has the same function as the reference point symbol mapping number generator 23, generates an integer (reference point symbol mapping number) of 0 . . . Q1, where Q represents the number of mapping points that can be obtained by the modulation scheme, and outputs it to the reference point soft symbol mapping number converter 209. For example, a register value prepared in advance, a read value of a ROM, and a counter value are used for number generation.

[0113] The scramble code generator 208 has the same function as the scramble code generator 15 and the scramble code generator 24, and outputs the generated scramble code bit sequence to the reference point soft symbol mapping number converter 209.

[0114] The reference point soft symbol mapping number converter 209 has the same function as the transmission symbol mapping number converter 16 and the reference point transmission symbol mapping number generator 25, generates a reference point transmission symbol mapping number from the input reference point symbol mapping number and the scramble code bit sequence, and outputs it to the reference point soft symbol mapping unit 210.

[0115] The reference point soft symbol mapping unit 210 has the same function as the symbol mapping unit 17 and the reference point symbol mapping unit 26, selects a predetermined mapping point using the input reference point transmission soft symbol mapping number, and outputs it to the soft symbol calculator 211.

[0116] The soft symbol calculator 211 calculates a soft symbol using the input symbol mapping probability P.sub.i(m) and the reference point symbol mapping output S.sub.q(m), and outputs the calculation result to the SC/MMSE filter 201. The calculation of the soft symbol S(m) is performed, for example, by the following equation:

[00008] S ~ ( m ) = .Math. q = 0 Q - 1 .Math. S q ( m ) .Math. P q ( m ) Eq . .Math. 14

[0117] where q is obtained by Eq. 15 when the modulation scheme is PSK, and obtained by Eq. 16 when the modulation scheme is QAM.


q=mod(q+N.sub.SCR,8)Eq. 15


q=bitxor(q,N.sub.SCR)Eq. 16

[0118] FIG. 12 shows a configuration of soft symbol calculation when the second embodiment is not applied. The soft symbol calculation configuration of FIG. 12 includes the interleaver 204, a code converter 401, a signal selector 402, the bit probability calculator 205, the symbol mapping probability calculator 206, the reference point symbol mapping number generator 207, the scramble code generator 208, the reference point soft symbol mapping unit 210, the soft symbol calculator 211, a phase rotation unit 403, and a signal selector 404.

[0119] The interleaver 204, the bit probability calculator 205, the symbol mapping probability calculator 206, the reference point symbol mapping number generator 207, the scramble code generator 208, the reference point soft symbol mapping unit 210, and the soft symbol calculator 211 are the same as those in the second embodiment, and thus a description thereof will be omitted.

[0120] The code converter 401 has the same function as the code converter 32, performs code conversion according to the input scramble code N.sub.SCR(m) on the input bit LLR L.sub.e.sup.D(m, b.sub.n), and outputs the code-converted bit LLR L.sub.e.sup.D(m, b.sub.n) to the signal selector 402.

[0121] Upon receiving the input bit LLR L.sub.e.sup.D(m, b.sub.n) and the code-converted bit LLR L.sub.e.sup.D(m, b.sub.n), depending on the modulation scheme, the signal selector 402 selects L.sub.e.sup.D(m, b.sub.n) if the modulation scheme is PSK and selects L.sub.e.sup.D(m, b.sub.n) if the modulation scheme is QAM, and outputs it to the bit probability calculator 205.

[0122] The phase rotation unit 403 has the same function as the phase rotation unit 31, performs phase rotation according to the scramble code N.sub.SCR(m) on the input soft symbol {tilde over (S)}(m), and outputs the phase-rotated soft symbol {tilde over (S)}.sub.ROT(m) to the signal selector 404.

[0123] Upon receiving the input soft symbol {tilde over (S)}(m) and the phase-rotated soft symbol {tilde over (S)}.sub.ROT(m), depending on the modulation scheme, the signal selector 404 selects {tilde over (S)}.sub.ROT(m) if the modulation scheme is PSK and selects {tilde over (S)}(m) if the modulation scheme is QAM, and outputs it.

[0124] As described above, when the second embodiment is not applied, two processes of code conversion and phase rotation are required.

[0125] According to the second embodiment described above, by receiving the transmission signal in which the symbol mapping number is scrambled on the transmission side and, when computing a soft symbol used for turbo equalization, generating a reference point signal by scrambling the reference point symbol mapping number, it is possible to calculate a soft symbol. Further, in the case where the second embodiment is not applied, code conversion and phase rotation are required, but the present invention does not require them and can realize a reduction in implementation scale.

[0126] Further, the present invention is particularly suitable for a wireless communication system defined by MIL-STD-188-110B, but is not limited thereto.

[0127] The scope and spirit of the present invention are not limited to the exemplary embodiments which are illustrated and described, but also include all embodiments which have effects similar to those of the present invention. Further, the scope and spirit of the present invention may be defined by any desired combination of specific features among all disclosed features.

INDUSTRIAL APPLICABILITY

[0128] The present invention can be applied to various types of wireless communication systems that perform wireless communication using white space.

DESCRIPTION OF REFERENCE NUMERALS

[0129] 11: error correction encoder [0130] 12: interleaver [0131] 13: serial/parallel converter [0132] 14: symbol mapping number converter [0133] 15: scramble code generator [0134] 16: transmission symbol mapping number converter [0135] 17: symbol mapping unit [0136] 18: modulator [0137] 19: transmission antenna [0138] 20: reception antenna [0139] 21: detector [0140] 22: channel equalizer [0141] 23: reference point symbol mapping number generator [0142] 24: scramble code generator [0143] 25: reference point transmission symbol mapping number generator [0144] 26: reference point symbol mapping unit [0145] 27: bit LLR calculator [0146] 28: deinterleaver [0147] 29: error correction decoder [0148] 201: SC/MMSE filter [0149] 202: soft-input soft-output error correction decoder [0150] 203: hard decision unit [0151] 204: interleaver [0152] 205: bit probability calculator [0153] 206: symbol mapping probability calculator [0154] 207: reference point symbol mapping number generator [0155] 208: scramble code generator [0156] 209: reference point soft symbol mapping number converter [0157] 210: reference point soft symbol mapping unit [0158] 211: soft symbol calculator [0159] 31: phase rotation unit [0160] 32: code converter [0161] 33: signal selector [0162] 401: code converter [0163] 402: signal selector [0164] 403: phase rotation unit [0165] 404: signal selector