TRANSIENT VOLTAGE SUPPRESSOR HAVING BUILT-IN-TEST CAPABILITY FOR SOLID STATE POWER CONTROLLERS
20170155244 ยท 2017-06-01
Inventors
Cpc classification
H02H9/049
ELECTRICITY
B64D2221/00
PERFORMING OPERATIONS; TRANSPORTING
H02H9/042
ELECTRICITY
H02H3/044
ELECTRICITY
G01R31/3277
PHYSICS
International classification
Abstract
Embodiments are directed to a transient protection circuit configured for use in a SSPC having a plurality of power channels. The transient protection circuit includes a shared transient voltage suppressor, and a shared protection line communicatively coupled to the shared transient voltage suppressor. The shared protection line is configured to be communicatively coupled to and shared by the plurality of power channels. When the shared protection line is communicatively coupled to and shared by the plurality of power channels, energy above a threshold on any one of the plurality of power channels is dissipated through the shared protection line and the shared transient voltage suppressor.
Claims
1. A transient protection circuit configured for use in a solid state power controller (SSPC) comprising a plurality of power channels, the transient protection circuit comprising: a shared transient voltage suppressor; and a shared protection line communicatively coupled to the shared transient voltage suppressor; wherein the shared protection line is configured to be communicatively coupled to and shared by the plurality of power channels; wherein, when the shared protection line is communicatively coupled to and shared by the plurality of power channels, energy above a threshold on any one of the plurality of power channels is dissipated through the shared protection line and the shared transient voltage suppressor.
2. The circuit of claim 1 further comprising: a built-in-test (BIT) circuit communicatively coupled to the shared protection line and configured to test the shared transient voltage suppressor to detect a dormant failure of the shared transient voltage suppressor.
3. The circuit of claim 1 further comprising: a plurality of channel diodes communicatively coupled to the shared protection line; wherein, when the shared protection line is communicatively coupled to and shared by the plurality of power channels, at least a portion of the energy above the threshold on any one of the plurality of power channels also passes through at least one of the plurality of the channel diodes.
4. The circuit of claim 1, wherein the energy above the threshold is induced by a lightning strike
5. The circuit of claim 1, wherein: the shared transient voltage suppressor comprises a shared transient voltage suppression (TVS) diode.
6. The circuit of claim 5, wherein the lightning protection circuit further comprises: a built-in-test (BIT) circuit communicatively coupled to the shared protection line and configured to test the shared TVS diode to detect a dormant failure of the shared TVS diode.
7. The circuit of claim 1, wherein: the shared transient voltage suppressor comprises a shared transient voltage suppression (TVS) diode circuit having a predetermined number of shared TVS diodes; and the predetermined number of shared TVS diodes is less than the plurality of power channels.
8. The circuit of claim 7 further comprising: a built-in-test (BIT) circuit communicatively coupled to the shared protection line and configured to test the shared TVS diode circuit to detect a dormant failure of the shared TVS diode circuit.
9. A transient protection circuit configured for use in a solid state power controller (SSPC) comprising a feed line communicatively coupled to a plurality of power channels, the transient protection circuit comprising: a shared transient voltage suppressor; a transient voltage suppression (TVS) diode in series with a non-TVS diode; and a shared protection line communicatively coupled to the shared transient voltage suppressor; the shared protection line configured to be communicatively coupled to and shared by the plurality of power channels; the non-TVS diode configured to be communicatively coupled to the feed line; wherein, when the shared protection line is communicatively coupled to and shared by the plurality of power channels, energy above a threshold on any one of the plurality of power channels is dissipated through the shared protection line and the shared transient voltage suppressor; wherein at least a portion of energy above another threshold on the feed line passes through the non-TVS diode and is dissipated through the TVS diode.
10. The circuit of claim 9 further comprising: a first built-in-test (BIT) circuit communicatively coupled to the shared protection line and configured to test the shared transient voltage suppressor to detect a dormant failure of the shared transient voltage suppressor; and a second BIT circuit communicatively coupled to the TVS diode and configured to test the TVS diode to detect a dormant failure of the TVS diode.
11. A method of forming a transient protection circuit configured for use in a solid state power controller (SSPC) comprising a plurality of power channels, the method comprising: forming a shared transient voltage suppressor; forming a shared protection line communicatively coupled to the shared transient voltage suppressor; and configuring the shared protection line to be communicatively coupled to and shared by the plurality of power channels; wherein, when the shared protection line is communicatively coupled to and shared by the plurality of power channels, energy above a threshold on any one of the plurality of power channels is dissipated through the shared protection line and the shared transient voltage suppressor.
12. The method of claim 11 further comprising: forming a built-in-test (BIT) circuit; configuring the BIT circuit to be communicatively coupled to the shared protection line; and further configuring the BIT circuit to test the shared transient voltage suppressor to detect a dormant failure of the shared transient voltage suppressor.
13. The method of claim 11 further comprising: the SSPC further comprises a feed line communicatively coupled to the plurality of power channels; and the circuit further comprises: forming a transient voltage suppression (TVS) diode in series with a non-TVS diode; and communicatively coupling the non-TVS diode to the feed line; wherein at least a portion of energy above another threshold on the feed line passes through the non-TVS diode and is dissipated through the TVS diode.
14. The method of claim 13 further comprising: forming another BIT circuit; communicatively coupling the another BIT circuit to the TVS diode; and configuring the another BIT circuit to test the TVS diode to detect a dormant failure of the TVS diode.
15. The method of claim 11 further comprising: forming a plurality of channel diodes; and configuring the plurality of channel diodes to be communicatively coupled to the shared protection line; wherein, when the shared protection line is communicatively coupled to and shared by the plurality of power channels, at least a portion of the energy above the threshold on any one of the plurality of power channels is also passed through at least one of the plurality of the channel diodes.
16. The method of claim 11, wherein the energy above the threshold is induced by a lightning strike.
17. The method of claim 11, wherein: the shared transient voltage suppressor comprises a shared transient voltage suppression (TVS) diode.
18. The method of claim 17 further comprising: forming a built-in-test (BIT) circuit; configuring the BIT circuit to be communicatively coupled to the shared protection line; and further configuring the BIT circuit to test the shared TVS diode to detect a dormant failure of the shared TVS diode.
19. The method of claim 11, wherein: the shared transient voltage suppressor comprises a shared transient voltage suppression (TVS) diode circuit having a predetermined number of shared TVS diodes; and the predetermined number of shared TVS diodes is less than the plurality of power channels.
20. The method of claim 19 further comprising: forming a built-in-test (BIT) circuit; configuring the BIT circuit to be communicatively coupled to the shared protection line; and further configuring the BIT circuit to test the shared TVS diode circuit to detect a dormant failure of the shared TVS diode circuit.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The subject matter of the present disclosure is particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The foregoing and other features, and advantages of the present disclosure are apparent from the following detailed description taken in conjunction with the accompanying drawings in which:
[0013]
[0014]
[0015]
[0016] In the accompanying figures and following detailed description of the disclosed embodiments, the various elements illustrated in the figures are provided with three or four digit reference numbers. The leftmost digit(s) of each reference number corresponds to the figure in which its element is first illustrated.
DETAILED DESCRIPTION OF THE DISCLOSURE
[0017] Turning now to an overview of the present disclosure, PMD systems generally include modules that each includes multiple SSPC power channels. Each power channel has an input feed line, an output load and a power MOSFET that selectively couples the feed voltage to the output load when turned on. When the power MOSFET switch of a given channel is subjected to a voltage transient (e.g., a lightning induced transient) that is higher than the MOSFET voltage rating limit and it is OFF, the MOSFET will break down and conduct and usually be damaged or destroyed. Existing transient protection/suppression systems, examples of which are shown in
[0018] In one or more embodiments of the present disclosure, instead of providing individual TVS diodes for each power channel, a shared transient voltage suppressor is provided in communication with a shared protection line coupled to each individual power channel. Transient energy above a threshold (e.g., above the MOSFET voltage rating limit) on any one of the multiple SSPC power channels is dissipated through the shared transient voltage suppressor. In one or more embodiments, the shared transient voltage suppressor includes a single TVS diode. In one or more embodiments, the shared transient voltage suppressor includes a plurality of simple diodes and a single TVS diode. In one or more embodiments, the shared transient voltage suppressor includes a TVS diode circuit having multiple TVS diodes, wherein the number of TVS diodes is less than the number of power channels. In any of the disclosed shared transient voltage suppressors, the reliance on TVS diodes, which provide the necessary voltage suppression functionality but exhibit dormant failures, is reduced by sharing either one or a few (i.e., less than the number of power channels) TVS diodes among a plurality of power channels.
[0019] Because the present disclosure significantly reduces the number of TVS diodes that are required to provide protection from lightning-induced and other transients, the present disclosure makes it efficient and cost effective to provide a BIT circuit to test the disclosed shared transient voltage suppressor for dormant failures. The BIT circuit applies a pulsed BIT signal to the shared transient voltage suppressor and measures the resulting voltage across the shared transient voltage suppressor. The BIT signal applied to the shared transient voltage suppressor is a voltage (positive or negative) to verify that the shared transient voltage suppressor is clamping at a proper value. Because of the significant reduction in the number of TVS diodes that are required to provide protection from lightning-induced and other transients, the added cost/area of providing a BIT circuit is relatively small. Additionally, for embodiments wherein the shared transient voltage suppressor is augmented by or supplemented with simple diodes (e.g., one simple diode per channel), the simple diodes prevent BIT circuit test pulses applied to the shared protection line from affecting the normal operating outputs of the channels.
[0020] Lightning-induced transients may occur as a positive or negative pulse on the feed line side of a channel or as a positive or negative pulse on the load side of a channel. Accordingly, a BIT circuit of the present disclosure may be provided on the feed line side of a channel or on the load side of a channel, or on both the feed side and load side of a channel. When provided on the load line side of a channel, the BIT circuit tests with a negative voltage on the load line side shared protection line. When provided on the feed line side of a channel, the BIT circuit tests with a positive voltage at the cathode of the shared transient voltage suppressor. Additionally, because the actual transients on the feed line or the load line can vary, the disclosed transient suppression schemes may or may not include the same voltage threshold for the TVS diodes on the feed side and the load side.
[0021] Turning now to a more detailed description of the drawings,
[0022] As shown in
[0023] The anode of the TVS diode shown in
[0024] A drawback to the approach in
[0025] In
[0026] Turning now to a more detailed description of the present disclosure,
[0027] Module 300 couples multiple power channels to multiple loads. For ease of illustration, only two power channels, Channel-A and Channel-B, and two loads, Load-A and Load-B, are shown. In the present disclosure, a description of the operation of one channel applies equally to all channels. Channel-A transmits power down Feed Bus Line-A, through the channel-A MOSFET to Load-A. Lightning strikes can result in transients through Channel-A that exceed the operating range of the channel-A MOSFET.
[0028] Lightning-induced and other transients may occur as a positive or negative pulse on the feed line side of Channel-A, or as a positive or negative pulse on the load side of Channel-A. For the embodiment shown in
[0029] Channel-A couples power on the FEED BUS LINE through a channel-A MOSFET having an intrinsic body diode 310 and an ON/OFF MOSFET control line coupled at one end through a resistor 302 to the channel-A MOSFET and coupled at its other end to a functional gate driver (not shown). From the channel-A MOSFET, power is coupled through the Load Line to LOAD-A. A simple diode 306 is coupled between the Load Line and shared protection line 358, which is coupled to and shared by all channels of module 300. Shared TVS diode 360 is coupled between shared protection line 358 and Chassisgnd. Shared TVS diode 360 increases the clamping voltage and addresses the reliability concern with simple diode clamping (provided by simple diode 306) when interfacing to inductive loads such as relays and contactors. Through its coupling to shared protection line 358, shared TVS diode 360 is coupled to and shared by all channels of module 300.
[0030] As shown in
[0031] When a positive transient is present on the Load Line and the channel-A MOSFET is off, the positive transient current goes through body diode 310 of the channel-A MOSFET and goes out through the FEED BUS LINE. Body diode 310 of the channel-A MOSFET is the intrinsic body diode of the channel-A MOSFET based on the structure of the channel-A MOSFET.
[0032] BIT circuit 362 is coupled through shared protection line 358 to shared TVS diode 360. To ensure that shared TVS diode 360 does not have a dormant stuck at fault, BIT circuit 362 stimulates shared TVS diode 360 to a known value momentarily, and then monitors shared TVS diode 360 for the correct response to the stimulus.
[0033]
[0034] BIT circuit 324 is coupled between simple diode 320 and TVS diode 322. To ensure that TVS diode 322 does not have a dormant stuck at fault, BIT circuit 324 stimulates TVS diode 322 to a known value momentarily, and then monitors TVS diode 322 for the correct response to the stimulus.
[0035] While the present disclosure has been described in detail in connection with only a limited number of embodiments, it should be readily understood that the present disclosure is not limited to such disclosed embodiments. Rather, the present disclosure can be modified to incorporate any number of variations, alterations, substitutions or equivalent arrangements not heretofore described, but which are commensurate with the spirit and scope of the present disclosure.
[0036] Additionally, while various embodiments of the present disclosure have been described, it is to be understood that aspects of the present disclosure may include only some of the described embodiments. Accordingly, the present disclosure is not to be seen as limited by the foregoing description, but is only limited by the scope of the appended claims.
[0037] The term about is intended to include the degree of error associated with measurement of the particular quantity based upon the equipment available at the time of filing the application. For example, about can include a range of 8% or 5%, or 2% of a given value.
[0038] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms a, an and the are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms comprises and/or comprising, when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, element components, and/or groups thereof.
[0039] While the disclosure is provided in detail in connection with only a limited number of embodiments, it should be readily understood that the disclosure is not limited to such disclosed embodiments. Rather, the disclosure can be modified to incorporate any number of variations, alterations, substitutions or equivalent arrangements not heretofore described, but which are commensurate with the spirit and scope of the disclosure. Additionally, while various embodiments of the disclosure have been described, it is to be understood that the exemplary embodiment(s) may include only some of the described exemplary aspects. Accordingly, the disclosure is not to be seen as limited by the foregoing description, but is only limited by the scope of the appended claims.