PHOTONIC MODULE AND METHOD OF MANUFACTURE
20230125733 · 2023-04-27
Inventors
- Abu Thomas (Simi Valley, CA, US)
- Andrea Trita (Pasadena, CA, US)
- Yangyang Liu (Glendale, CA, US)
- Andrew George RICKMAN (Marlborough, GB)
Cpc classification
G02B6/12011
PHYSICS
G02B6/1228
PHYSICS
G02B6/12016
PHYSICS
International classification
Abstract
A photonic module, comprising a first waveguide; a second waveguide, disposed on an opposing side of the first waveguide to a substrate; and, a coupling section. One of the first waveguide and the second waveguide is formed of crystalline silicon. The other of the first waveguide and the second waveguide is formed of amorphous silicon. The coupling section is configured to couple light between the first waveguide and the second waveguide. Such a silicon photonic module has enhanced coupling and transmission properties in contrast to conventional modules.
Claims
1. A photonic module, comprising: a first waveguide; a second waveguide, disposed on an opposing side of the first waveguide to a substrate; and, a coupling section; wherein one of the first waveguide and the second waveguide is formed of crystalline silicon; the other of the first waveguide and the second waveguide is formed of amorphous silicon; and, the coupling section is configured to couple light between the first waveguide and the second waveguide.
2. The photonic module of claim 1, wherein the substrate defines a horizontal plane, the first waveguide is positioned above the substrate, and the second waveguide is positioned above the first waveguide.
3. The photonic module of claim 1, wherein the coupling section comprises a tapered portion of at least one of the first waveguide and the second waveguide.
4. The photonic module of claim 1, wherein the coupling section comprises: a tapered portion of the first waveguide, tapering from a first width to a second width along a first direction; and a tapered portion of the second waveguide, tapering from a first width to a second width along a second direction; wherein the first direction and second direction are antiparallel.
5. The photonic module of claim 1, further comprising a first cladding disposed so as to at least partially surround the first waveguide and a second cladding disposed so as to at least partially surround the second waveguide.
6. The photonic module of claim 5, wherein the first cladding and the second cladding are formed of silicon dioxide.
7. The photonic module of claim 1, wherein a length of the coupling section is greater than: a maximum transverse width of the first waveguide; and a maximum transverse width of the second waveguide.
8. The photonic module of claim 7, wherein the length of the coupling section is at least 4 μm but no more than 10 μm, and the maximum transverse widths are at least 2 μm but not more than 4 μm.
9. The photonic module of claim 1, further comprising an intermediary layer disposed in-between the first waveguide and the second waveguide.
10. The photonic module of claim 9, wherein the intermediary layer is formed of silicon oxide.
11. The photonic module of claim 1, wherein the substrate comprises a buried oxide, BOX, layer.
12. The photonic module of claim 1, wherein the first waveguide is formed of crystalline silicon and the second waveguide is formed of amorphous silicon.
13. The photonic module of claim 1, wherein the first waveguide is formed of amorphous silicon and the second waveguide is formed of crystalline silicon.
14. The photonic module of claim 1, further comprising a third waveguide and a second coupling section, wherein the second coupling section is configured to couple light between the second waveguide and the third waveguide, and wherein the second waveguide is disposed on an opposing side of the third waveguide to the substrate.
15. A component comprising the photonic module of claim 1, wherein: the component includes one or more crossing waveguides, a portion of the or each crossing waveguides being located between the second waveguide and the substrate; and the crossing waveguides are optically insulated from the waveguides of the photonic module.
16. (canceled)
17. (canceled)
18. A method of fabricating a photonic module on a substrate, the method including: performing a first etching process on a first layer to form a first waveguide; depositing a second layer on an opposing side of the first waveguide to a substrate; and performing a second etching process on the second layer to form a second waveguide; wherein: the steps of performing the first etching process and/or the second etching process also form a coupling section for coupling light between the first waveguide and the second waveguide; one of the first layer and the second layer is formed of crystalline silicon; and the other of the first layer and the second layer is formed of amorphous silicon.
19. The method of claim 18, wherein the step of performing the first etching process forms a tapered portion of the first waveguide, the coupling section comprising the tapered portion of the first waveguide.
20. The method of claim 18, wherein the step of performing the second etching process forms a tapered portion of the second waveguide, the coupling section comprising the tapered portion of the second waveguide.
21.-24. (canceled)
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0054] Embodiments of the invention will now be described by way of example with reference to the accompanying drawings in which:
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DETAILED DESCRIPTION AND FURTHER OPTIONAL FEATURES
[0070] Aspects and embodiments of the present invention will now be discussed with reference to the accompanying figures. Further aspects and embodiments will be apparent to those skilled in the art.
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[0072] As shown in
[0073] The length of the coupling section 25 is greater than a maximum transverse width of the first waveguide 10 and a maximum transverse width of the second waveguide 20. Accordingly, the length of the coupling section 25 is greater than the transverse widths of the non-tapered portion 29 of the first waveguide 10 and the non-tapered portion 34 of the second waveguide 20. The length of the coupling section may be at least 4 μm but no more than 10 μm, and the maximum transverse widths may be at least 2 μm but no more than 4 μm. Accordingly, the photonic module is dimensioned such that the coupling section is adiabatic.
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[0075] As depicted in
[0076] An intermediary layer 15 is disposed in between the first waveguide 10 and the second waveguide 20. The intermediary layer 15 also separates the first cladding 12 and the second cladding 22. The intermediary layer 15 is of uniform thickness and is bound between a first planar surface, defined by the first waveguide 10 and the first cladding 12, and a second planar surface, defined by the second waveguide 20 and the second cladding 22. The intermediary layer 15 is formed of silicon oxide. In this example, the intermediary layer 15 is at most 100 nm tall (i.e. as measured from the top of the first waveguide 10 to the bottom of the second waveguide 20).
[0077] The substrate includes a buried oxide, BOX, layer 7, on which a silicon device layer 8 is disposed. In turn, the first waveguide is disposed on the silicon device layer 8. The first waveguide 10 is formed of crystalline silicon, and the second waveguide 20 is formed of amorphous silicon. Below the buried oxide layer there may be a silicon substrate layer.
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[0079] The second waveguide 20 is disposed on an opposing side of the third waveguide 42 to the substrate 5. The third waveguide 42 is positioned on the same horizontal plane as the first waveguide 10. Alternatively, the third waveguide 42 may be disposed on an opposing side of the second waveguide 20 to the first waveguide 10. The component 40 includes a crossing waveguide 45, a portion of which is located between the second waveguide 20 and the substrate 5. The crossing waveguide 45 is optically insulated from the first waveguide 10, the second waveguide 20 and the third waveguide 42 of the photonic module 1. The second waveguide 20 forms a bridge-like structure over the crossing waveguide 45. The crossing waveguide 45 is straight and extends perpendicular to a longitudinal axis of the photonic module 1. The component may form a portion of a photonic integrated circuit (PIC).
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[0086] The thickness and width of the second waveguide 20 is chosen so that a phase matching point exists along the coupling section 25.
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[0090] The photonic module 1 is fabricated either by depositing a first layer on the substrate 5, the substrate 5 includes a buried oxide, BOX, layer 7 or by providing a silicon-on-insulator wafer, the silicon device layer of the wafer providing the first layer. The first layer may be formed of either crystalline silicon (e.g. in the case of an SOI wafer) or amorphous silicon (e.g. in the case of depositing a first layer). Next, a first mask is applied to the first layer. This can be performed via photolithography. The first mask is either dimensioned or etched so as to cover a portion of the first layer corresponding to the desired shape of the first waveguide 10. A first etch is then performed to produce the first waveguide 10, which includes a tapered portion 30. The tapered portion 30 extends between a non-tapered portion 29 and a narrowed portion 31 of the first waveguide 10. An anisotropic etch may be used when performing the first etch.
[0091] A first cladding 12 is deposited (for example by chemical vapour deposition) adjacent to the first waveguide 10 to the same height as the first waveguide 10, such that the upper surfaces of the first cladding 12 and the first waveguide 10 form a planar surface. An intermediary layer 15 is then deposited on the planar surface formed by the upper surfaces of the first cladding 12 and the first waveguide 10. The intermediary layer 15 is formed of silicon oxide. The intermediary layer 15 is at most 100 nm tall (i.e. as measured from the top of the first waveguide 10 to the bottom of the second waveguide 20).
[0092] Next, a second layer is deposited on the intermediary layer 15, and a second mask is applied to the second layer. If the first layer is formed of crystalline silicon, then the second layer is formed of amorphous silicon, and vice versa. The second mask is dimensioned so as to cover a portion of the second layer corresponding to the desired shape of the second waveguide 20. A second etch is then performed to produce the second waveguide 20, which includes a tapered portion 35. The tapered portion 35 extends between a non-tapered portion 34 and a narrowed portion 36 of the second waveguide 20. The transverse width of the tapered portion 30 decreases in a first direction along a length of the photonic module 1, whereas the transverse width of the tapered portion 35 decreases in an opposite direction to that of the first direction. As such, the narrowed portion 31 of the first waveguide is aligned with the non-tapered portion 34 of the second waveguide, and the narrowed portion 36 of the second waveguide is aligned with the non-tapered portion 29 of the first waveguide. Accordingly, the coupling section 25 comprises the tapered portion 30 of the first waveguide and the tapered portion 35 of the second waveguide. An anisotropic etch may be used when performing the second etch.
[0093] A second cladding 22 is deposited adjacent to the second waveguide 20 to the same height as the second waveguide 20, such that the upper surfaces of the second cladding 22 and second waveguide 20 form a planar surface. An additional silicon dioxide cladding layer 28 is deposited on the planar surface formed by the upper surfaces of the second cladding 22 and the second waveguide 20.
[0094] While the invention has been described in conjunction with the exemplary embodiments described above, many equivalent modifications and variations will be apparent to those skilled in the art when given this disclosure. Accordingly, the exemplary embodiments of the invention set forth above are considered to be illustrative and not limiting. Various changes to the described embodiments may be made without departing from the spirit and scope of the invention.
LIST OF FEATURES
[0095] 1: Photonic module [0096] 5: Substrate [0097] 7: Buried oxide, BOX, layer [0098] 8: Silicon device layer [0099] 10: First waveguide [0100] 12: First cladding [0101] 15: Intermediary layer [0102] 20: Second waveguide [0103] 22: Second cladding [0104] 25: Coupling section [0105] 29: Non-tapered portion of the first waveguide [0106] 30: Tapered portion of the first waveguide [0107] 31: Narrowed portion of the first waveguide [0108] 34: Non-tapered portion of the second waveguide [0109] 35: Tapered portion of the second waveguide [0110] 36: Narrowed portion of the second waveguide [0111] 38: Additional silicon dioxide cladding [0112] 40: Component [0113] 42: Third waveguide [0114] 43: Second coupling section [0115] 45: Crossing waveguide [0116] 46: First end of crossing waveguide [0117] 47: Second end of crossing waveguide [0118] 50: MZI [0119] 55: MZI arm [0120] 60: AWG [0121] 65: AWG output/input waveguide