Optical sensing device

Abstract

An optical sensing device is provided. The optical sensing device includes an optical sensing element and a detection circuit. The optical sensing element senses an incident photon and generates a sensing signal. The detection circuit detects a pulse width of the sensing signal, and generates a reset signal when the pulse width is larger than a threshold value. Thereby, the optical sensing device is reset according to the reset signal and a dynamic range of the optical sensing device under strong ambient light will be further improved.

Claims

1. An optical sensing device, comprising: an optical sensing element, sensing an incident photon and generating a sensing signal; and a detection circuit, coupled to the optical sensing element and detecting a pulse width of the sensing signal, wherein the detection circuit generates a reset signal to reset the optical sensing element when the pulse width of the sensing signal is larger than a threshold value, the detection circuit further comprises a one-shot circuit generating an one-shot signal according to the sensing signal, and the threshold value is determined by a pulse width of the one-shot signal.

2. The optical sensing device as claimed in claim 1, wherein the threshold value is corresponding to a deadtime of the optical sensing element.

3. The optical sensing device as claimed in claim 1, wherein the detection circuit further comprises: a flip-flop, generating the reset signal according to the sensing signal and the one-shot signal.

4. The optical sensing device as claimed in claim 1, further comprising: a feedback circuit, coupled between an output terminal and an input terminal of the detection circuit.

5. The optical sensing device as claimed in claim 4, wherein the feedback circuit further comprises: a first pulse shaping circuit, generating a first pulse shaping signal according to the sensing signal; a second pulse shaping circuit, generating a second pulse shaping signal according to the reset signal; and a logic circuit, including a first input terminal coupled to the first pulse shaping circuit and receiving an output signal being shaped from the first pulse shaping circuit, a second input terminal of the logic circuit coupled to the second pulse shaping circuit and receiving the reset signal being shaped from the second pulse shaping circuit, and an output terminal of the logic circuit coupled to the input terminal of the detection circuit.

6. The optical sensing device as claimed in claim 5, wherein the first pulse shaping circuit shrinks a pulse width of the output signal, and the second pulse shaping circuit shrinks a pulse width of the reset signal.

7. The optical sensing device as claimed in claim 1, further comprising: a control circuit, generating a quench control signal and a recharging control signal according to the reset signal; a quench circuit, coupled to the control circuit and the optical sensing element, and quenching the optical sensing element according to the quench control signal; and a recharging circuit, coupled to the control circuit and the optical sensing element, and recharging the optical sensing element according to the recharging control signal.

8. The optical sensing device as claimed in claim 7, wherein the control circuit comprises: another one-shot circuit, generating the quench control signal according to the reset signal; a flip-flop, coupled to the another one-shot circuit, generating a recharging trigger signal according to the quench control signal; and a logic circuit, coupled to the another one-shot circuit and the flip-flop, generating the recharging control signal according to the quench control signal and the recharging trigger signal.

9. The optical sensing device as claimed in claim 7, further comprising: a decision circuit, generating an output signal according to the sensing signal; wherein the control circuit generates the quench control signal and the recharging control signal further according to the output signal.

10. The optical sensing device as claimed in claim 9, wherein the decision circuit comprising at least one inverter.

11. The optical sensing device as claimed in claim 1, wherein the optical sensing element is a single photon avalanche diode having a first electrode coupled to a decision circuit, a quench circuit and a recharging circuit, and the single photon avalanche diode has a second electrode coupled to a bias.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic diagram showing an optical sensing device according to one embodiment of the present application;

(2) FIG. 2 is a schematic diagram showing sensing signals vs output signals according to one embodiment of the present application;

(3) FIG. 3A is a circuit diagram showing detection circuit according to one embodiment of the present application;

(4) FIG. 3B is a schematic diagram showing the output signals, the one-shot signals, and the reset signals according to one embodiment of the present application;

(5) FIG. 4A is a schematic diagram showing the control circuit coupled to the quench circuit and the recharging circuit according to one embodiment of the present application;

(6) FIG. 4B is a schematic diagram showing the quench control signals and the recharging control signals according to one embodiment of the present application;

(7) FIG. 5 is a schematic diagram showing the optical sensing device according to another embodiment of the present application;

(8) FIG. 6 is a schematic diagram showing the optical sensing device according to another embodiment of the present application;

(9) FIG. 7 is a schematic diagram showing the optical sensing device according to another embodiment of the present application; and

(10) FIG. 8 is a schematic diagram showing the quench control signals and the recharging control signals vs the sensing signals according to another embodiment of the present application.

DETAILED DESCRIPTION

(11) In order to learn features and functions of the present application more clearly, please refer to the following embodiments and detailed description.

(12) Certain terms are used in the description and claims to refer to particular elements. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. The specification and claims do not use the difference in name as a way to distinguish components, but use the difference in function of components as a criterion for distinguishing. Include/Comprise mentioned throughout the specification and claims is an open term, so it should be interpreted as including but not limited to. In addition, the term coupled herein includes any direct and indirect means of connection. Therefore, if it is described that a first device is coupled to a second device, it means that the first device may be directly connected to the second device, or indirectly connected to the second device through other devices or connection means.

(13) In order to solve the problems of the conventional optical sensing element having poor sensing capability and dynamic range, and being unable to detect incident photons and generate sensing signals for a long period due to the problems such as multi-triggering under strong ambient light, the present application provides an optical sensing device comprising a detection circuit detecting a pulse width of a sensing signal from an optical sensing element and generating a reset signal when the pulse width is larger than a threshold value. According to the reset signal, the optical sensing element is reset to quench and recharge and then returns to its original state to wait for next photon triggering. Thereby, the above-mentioned problems of poor sensing capability and dynamic range and being unable to detect incident photons and generate sensing signals for a long period may be solved.

(14) The following embodiment and related figures are used to explain the present application in detail, not intended to limit the invention to those embodiments because the present application may have different implementations of the same concept.

(15) First, refer to FIG. 1, a schematic diagram showing an optical sensing device according to one embodiment of the present application is provided. As shown in the figure, an optical sensing device 10 according to the present application includes an optical sensing element 12, a decision circuit 14, a detection circuit 16, a control circuit 18, a quench circuit 20 and a recharging circuit 22. Wherein, the optical sensing element 12 is coupled to the decision circuit 14, and coupled to the quench circuit 20 and the recharging circuit 22, and the decision circuit 14 is further coupled to the detection circuit 16. That is, the detection circuit 16 is coupled to the optical sensing element 12 through the decision circuit 14. The detection circuit 16 is coupled to the control circuit 18, and the control circuit 18 is coupled to the quench circuit 20 and the recharging circuit 22. In other words, the control circuit 18 may be coupled to the optical sensing element 12. The present application further detects a sensing signal V.sub.A of the optical sensing element 12 or controls the optical sensing element 12 through the control circuit 18. The operation of the optical sensing device 10 is described in detail below.

(16) Refer to FIG. 2, FIG. 3A, and FIG. 3B, which show schematic diagrams showing sensing signals vs output signals, detection circuit, and output signals, one-shot signals, and reset signals according to one embodiment of the present application. As shown in the figure, the optical sensing element 12 senses at least one incident photon IN and generates a sensing signal V.sub.A. Then, the decision circuit 14 generates an output signal V.sub.OUT according to the sensing signal V.sub.A and a one-shot signal V.sub.OS is generated by the detection circuit 16 according to the output signal V.sub.OUT. The detection circuit 16 compares the output signal V.sub.OUT with the one-shot signal V.sub.OS. When a pulse width of the output signal V.sub.OUT at a high level H is a first pulse width T.sub.P1, and the first pulse width T.sub.P1 is larger than a pulse width of the one-shot signal V.sub.OS, a time duration corresponding to the first pulse width T.sub.P1 is larger than a trigger time T.sub.DET corresponding to the one-shot signal V.sub.OS. This means the trigger time T.sub.DET is used as a threshold value of the detection circuit 16 for detecting the sensing signal V.sub.A. The trigger time T.sub.DET may be corresponding to a deadtime of the optical sensing element 12, which means the deadtime may be set as a reference parameter of the trigger time T.sub.DET in circuit design. Generally, the deadtime is equivalent to a period during which the optical sensing element 12 completes a cycle from being triggered by a photon and then returned to its original state to wait for the next photon triggering. For example, the optical sensing element 12 is a single photon avalanche diode and the trigger time T.sub.DET may be larger than the deadtime of the optical sensing element 12.

(17) Continued to above, when the time duration corresponding to the first pulse width T.sub.P1 is larger than the trigger time T.sub.DET, it means that the optical sensing element 12 may be triggered by another incident photon IN during the recharging period T.sub.RE, leading to that a time duration of the output signal V.sub.OUT standing at the high level H is larger than the trigger time T.sub.DET. Thereby, the detection circuit 16 generates a corresponding reset signal V.sub.RST for driving the control circuit 18 to control the quench circuit 20 and the recharging circuit 22 to activate another cycle of quenching and recharging on the optical sensing element 12. Thus, the avalanche current of the optical sensing element 12 triggered by the incident photon IN is quenched and a voltage level of the sensing signal V.sub.A is returned to its original level until the optical sensing element 12 being triggered by the next incident photon IN. Thereby a problem of the optical sensing element 12 being unable to respond incident photons IN and generate sensing signals V.sub.A for a long period of time due to trigger of another incident photon IN during the recharging period T.sub.RE may be solved. Some problems including SPAD latching, multi-triggering, etc. may thus be avoided.

(18) Contrary to above, when a pulse width of the output signal V.sub.OUT is a second pulse width T.sub.P2 and the second pulse width T.sub.P2 is smaller than the pulse width of the one-shot signal V.sub.OS, it means a time duration corresponding to the second pulse width T.sub.P2 is smaller than a trigger time T.sub.DET corresponding to the one-shot signal V.sub.OS. Such as, the detection circuit 16 does not generate the reset signal V.sub.RST. That means the control circuit 18 does not be driven to control the quench circuit 20 and the recharging circuit 22 to activate another quenching and recharging on the optical sensing element 12 according to the reset signal V.sub.RST. At this instant, the control circuit 18 controls the quench circuit 20 and the recharging circuit 22 to perform quenching and recharging on the optical sensing element 12 according to the output signal V.sub.OUT. Thus, the sensing signal V.sub.A is returned to a ground level and maintained at the ground level until the next trigger of the optical sensing element 12 by next incident photon IN.

(19) In this embodiment, a bias VBIAS serves as a reverse bias of the optical sensing element 12 as an example. A voltage level of the optical sensing element 12 before being triggered by the incident photon IN is maintaining at the ground level. After being triggered by the incident photon IN, a large current is instantaneously generated, and the voltage level of the optical sensing element 12 immediately rises to an excess bias (V.sub.ex). Wherein, the excess bias (V.sub.ex) is equivalent to the bias VBIAS minus a breakdown voltage (V.sub.BD) of the optical sensing element 12. After quenching and recharging, the voltage level may be returned to the ground level until the optical sensing element 12 is triggered by the next incident photon IN. The optical sensing device 10 of present application further drives the control circuit 18 to control the quench circuit 20 and the recharging circuit 22 to perform quenching and recharging on the optical sensing element 12 according to the reset signal V.sub.RST when the time duration corresponding to the first pulse width T.sub.P1 is larger than the time duration corresponding to the one-shot signal V.sub.OS. That means the voltage level may be returned to the ground level until the optical sensing element 12 is triggered by the next incident photon IN so as to avoid the above problems, such as multi-triggering and SPAD latching.

(20) The operation and circuit diagram of the detection circuit 16 is revealed in the following in order to illustrate the operation of the detection circuit 16 generating the reset signal V.sub.RST.

(21) Refer to FIG. 1, FIG. 3A and FIG. 3B again, the detection circuit 16 comprises a first one-shot circuit 162 and a first flip-flop 164. A clock input terminal CK of the first one-shot circuit 162 is coupled to the decision circuit 14 and thus receiving the output signal V.sub.OUT. According to the output signal V.sub.OUT, the first one-shot circuit 162 generates the one-shot signal V.sub.OS at a positive output terminal Q. The one-shot signal V.sub.OS is inverted by an inverter 1622 to form an inverted trigger signal V.sub.QB which is input into a clock input pin CK of the first flip-flop 164. An input pin D and a reset pin R of the first flip-flop 164 are coupled to the decision circuit 14 and thus receiving the output signal V.sub.OUT. When the output signal V.sub.OUT is changed from the low level L to the high level H, which means the level of the output signal V.sub.OUT is changed to form a positive edge, the first one-shot circuit 162 is triggered to output the one-shot signal V.sub.OS with the high level H. After a trigger time T.sub.DET, the one-shot signal V.sub.OS is changed from the high level H to the low level L. The above change is equivalent to a transition from 1 to 0 in digital signal format so that the inverted trigger signal V.sub.QB is changed from the low level L to the high level H. Then, the first flip-flop 164 generates the reset signal V.sub.RST according to the voltage level of the output signal V.sub.OUT. That means the first flip-flop 164 compares the pulse width of the output signal V.sub.OUT to the pulse width of the one-shot signal V.sub.OS and pulls high the reset signal V.sub.RST when the output signal V.sub.OUT has been at the high level H for a period of time greater than the trigger time T.sub.DET. Moreover, the first one-shot circuit 162 may generate the inverted trigger signal V.sub.QB at an inverted output terminal QB and sends the inverted trigger signal V.sub.QB to the first flip-flop 164 according to the output signal V.sub.OUT.

(22) As to above, for example, the output signal V.sub.OUT is changed from the low level L to the high level H, which is equivalent to the transition from 0 to 1 in digital signal format, when the optical sensing element 12 is triggered by the incident photon IN. Thus a positive rising edge which is formed due to transition from the low level L to the high level H drives the first one-shot circuit 162 to generate the one-shot signal V.sub.OS. After the trigger time T.sub.DET, the one-shot signal V.sub.OS is changed from the high level H to the low level L, which is equivalent to the transition from 1 to 0 in digital signal format. This leads to a change of the inverted trigger signal V.sub.QB from the low level L to the high level H which is equivalent to the transition from 0 to 1 in digital signal format. Thereby the first flip-flop 164 starts to generate the reset signal V.sub.RST according to the output signal V.sub.OUT. More particularly, when the output signal V.sub.OUT is still at the high level H, which is equivalent to 1 in digital signal format, the reset signal V.sub.RST is changed from a low level L to a high level H until the output signal V.sub.OUT is changed from the high level H to the low level L and the first flip-flop 164 is reset. Then the reset signal V.sub.RST is changed from the high level H to the low level L.

(23) Again, refer to FIG. 1, the optical sensing device 10 according to the present application further comprises a logic circuit 24 which is coupled between the decision circuit 14 and the control circuit 18, further coupled between the detection circuit 16 and the control circuit 18. The logic circuit 24 respectively receives the output signal V.sub.OUT and the reset signal V.sub.RST so as to generate a confirmation signal V.sub.OR to the control circuit 18 according to the output signal V.sub.OUT and the reset signal V.sub.RST. Thereby the optical sensing device 10 integrates the output signal V.sub.OUT and the reset signal V.sub.RST into the confirmation signal V.sub.OR by the logic circuit 24 for driving the control circuit 18 to control the quench circuit 20 and the recharging circuit 22 for active quenching and recharging of the optical sensing element 12 after the optical sensing element 12 being triggered by the incident photon IN.

(24) Next, the operation of the control circuit 18 controlling the quench circuit 20 and the recharging circuit 22 for quenching and recharging of the optical sensing element 12 is revealed below.

(25) Again, refer to FIG. 1, and refer to FIG. 4A, and FIG. 4B, which are schematic diagrams showing the control circuit coupled to the quench circuit and the recharging circuit, and quench control signals and recharging control signals according to one embodiment of the present application. As shown in the figures, the control circuit 18 is coupled to the optical sensing element 12 and the logic circuit 24 and thus receiving the sensing signal V.sub.A and the confirmation signal V.sub.OR. According to the sensing signal V.sub.A and the confirmation signal V.sub.OR, the control circuit 18 generates a quench control signal V.sub.CQ and a recharging control signal V.sub.CR which are respectively sent to the quench circuit 20 and the recharging circuit 22. The quench circuit 20 includes a quench transistor 202, and the recharging circuit 22 includes a recharging transistor 222. A first terminal of the quench transistor 202 and a first terminal of the recharging transistor 222 respectively receives the quench control signal V.sub.CQ and the recharging control signal V.sub.CR to control whether a second terminal and a third terminal of the quench transistor 202 are conducting and a second terminal and a third terminal of the recharging transistor 222 are conducting for control of the voltage level of the sensing signal V.sub.A.

(26) Furthermore, the control circuit 18 controls the quench circuit 20 and the recharging circuit 22 according to the confirmation signal V.sub.OR. In this embodiment, the confirmation signal V.sub.OR is corresponding to the output signal V.sub.OUT or the reset signal V.sub.RST. Especially as shown in FIG. 2, FIG. 3B, and FIG. 4B, when a voltage level of the output signal V.sub.OUT corresponding to the sensing signal V.sub.A is still at the high level H after the trigger time T.sub.DET, the reset signal V.sub.RST is pulled high for driving the control circuit 18 to control the quench circuit 20 for quenching the optical sensing element 12, and then control the recharging circuit 22 for recharging the optical sensing element 12 after a hold-off time. That means when a pulse width of the output signal V.sub.OUT corresponding to the sensing signal V.sub.A with the high level H is larger than the trigger time T.sub.DET, the control circuit 18 immediately controls the quench transistor 202 of the quench circuit 20 to quench the optical sensing element 12 while the trigger time T.sub.DET is end, and then controls the recharging transistor 222 of the recharging circuit 22 to recharge the optical sensing element 12 after a hold-off time. Thus, the sensing signal V.sub.A will return to its voltage level as before the incident photon IN triggers the optical sensing element 12 such as the ground level (zero level) and the optical sensing element 12 may be ready for the next trigger by the incident photon IN.

(27) In the above embodiment, the logic circuit 24 may be an OR gate or a circuit component which achieves logic OR function. Moreover, the high level H and the low level L of the above sensing signal V.sub.A are respectively corresponding to an excess bias (V.sub.ex) and the ground level. As to the rest circuit components such as the decision circuit 14, the detection circuit 16, etc., the high level H and the low level L of the output signal of them are corresponding to the power supply voltage (such as VDD) for circuit operation and the ground level. In the above embodiment, the detection circuit 16 is coupled to the optical sensing element 12 through the decision circuit 14. Thus the detection circuit 16 detects the output signal V.sub.OUT which is equivalent to the detection of the sensing signal V.sub.A. Moreover, the detection circuit 16 may be directly coupled to the optical sensing element 12 to detect the pulse width of the sensing signal V.sub.A. Thus the control circuit 18 controls the quench circuit 20 and the recharging circuit 22 according to the sensing signal V.sub.A or the reset signal V.sub.RST for quenching and recharging of the optical sensing element 12 so that the sensing signal V.sub.A may be returned to the voltage level as before the incident photon IN triggers the optical sensing element 12 such as the ground level (zero level) and the optical sensing element 12 will be ready for the next trigger by the incident photon IN.

(28) In following embodiment, the decision circuit 14 comprises a plurality of inverters and the detailed description as described below.

(29) Refer to FIG. 5, a schematic diagram of the optical sensing device according to another embodiment of the present application is provided. The difference between the embodiment in FIG. 1 and this one in FIG. 5 is in that the embodiment in FIG. 5 reveals that the decision circuit 14 includes a plurality of inverters ranging from the first inverter 142 to the N-th inverter 142N. That means the decision circuit 14 includes at least one inverter. For example, N is 2, i.e., the decision circuit 14 is configured by two inverters, including the second inverter 1422. When the number of inverters in the decision circuit 14 is an odd number, the output signal V.sub.OUT is corresponding to an inverted phase of the sensing signal V.sub.A. Otherwise the output signal V.sub.OUT is corresponding to the sensing signal V.sub.A with the same phase.

(30) Further, refer to FIG. 6, a schematic diagram of the optical sensing device according to another embodiment of the present application is provided. The embodiment in FIG. 6 and the embodiment in FIG. 5 are different in the connection of the optical sensing element 12. In the optical sensing device 10 as shown in FIG. 5, a cathode of the optical sensing element 12 is coupled to the bias VBIAS and an anode of the optical sensing element 12 is coupled to the decision circuit 14, the control circuit 18, the quench circuit 20, and the recharging circuit 22. Moreover, the quench circuit 20 and the recharging circuit 22 are coupled to the ground. As to an optical sensing device 30 shown in FIG. 6, an anode of the optical sensing element 12 is coupled to a negative bias-VBIAS and a cathode of the optical sensing element 12 is coupled to the decision circuit 14, the control circuit 18, the quench circuit 20, and the recharging circuit 22. Moreover, the quench circuit 20 and the recharging circuit 22 are coupled to a power supply voltage VDD. In the above optical sensing device 30, the high level H and the low level L of the sensing signal V.sub.A are respectively corresponding to the power supply voltage VDD and the ground level such as when the negative bias-VBIAS is equal to the negative breakdown voltage-V.sub.BD of the optical sensing element 12.

(31) In the above embodiment, it is revealed that the optical sensing device 10 further drives the control circuit 18 through the reset signal V.sub.RST to control the quench circuit 20 and the recharging circuit 22 to perform quenching and recharging of the optical sensing element 12 when the time duration corresponding to the first pulse width T.sub.P1 is larger than the time duration corresponding to the one-shot signal V.sub.OS. Thereby the problem of being unable to respond incident photons IN to generate sensing signals V.sub.A for a long period of time due to SPAD latching or multi-triggering mentioned above may be solved. The dynamic range for light detection and photon count rate under strong ambient light are further improved. The decision circuit 14 of the optical sensing devices 10, 30 may further include a plurality of inverters or be implemented using a comparator circuit, but not limited.

(32) Continued to above, moreover, the optical sensing device of the present application may further detect the voltage level of the sensing signals V.sub.A or the output signal V.sub.OUT continuously by feedback control.

(33) Refer to FIG. 7 and FIG. 8 for a schematic diagram showing the optical sensing device of another embodiment of the present application and a waveform diagram of the quench control signals and the recharging control signals to the sensing signals. As shown in FIG. 7, according to the present application, an optical sensing device 40 includes an optical sensing element 402, a decision circuit 406, a detection circuit, a control circuit, a quench circuit, and a recharging circuit. The optical sensing device 40 further includes a feedback circuit comprising a first pulse shaping circuit 414, a second pulse shaping circuit 416, and a first logic circuit 418. The detection circuit includes a first one-shot circuit 410 and a first flip-flop 412, and the detection circuit is equivalent to the detection circuit 16 shown in FIG. 1. The control circuit comprises a second one-shot circuit 420 and a second flip-flop 428, and a second logic circuit 430, which is equivalent to the control circuit 18 in FIG. 1. The quench circuit includes a first quench transistor 422 and a second quench transistor 426 while the recharging circuit comprises a recharging transistor 424.

(34) Further, refer to FIG. 7 and FIG. 8 again, a cathode of the optical sensing element 402 is coupled to the bias VBIAS and an anode of the optical sensing element 402 is coupled to the decision circuit 406, the first quench transistor 422, the recharging transistor 424, and the second quench transistor 426. The optical sensing element 402 senses the incident photon IN and generates the corresponding sensing signal V.sub.A. In this embodiment, the decision circuit 406 includes two inverters, an even number of the inverters, and thus the output signal V.sub.OUT is corresponding to the sensing signal V.sub.A, without being inverted. Under normal operation, the optical sensing element 402 triggered by the incident photon IN is quenched by the first quench transistor 422 and then recharged by the recharging transistor 424 so that the voltage level of the optical sensing element 402 returns to the voltage level before being triggered by the incident photon IN. That means the voltage level of the sensing signal V.sub.A is driven to return to its original voltage level before the optical sensing element 402 being triggered by the incident photon IN.

(35) Still refer to FIG. 7 and FIG. 8, an output terminal of the first logic circuit 418 is coupled to a clock input pin CK of the first one-shot circuit 410, an input terminal of the first logic circuit 418 is coupled to the decision circuit 406 through the first pulse shaping circuit 414 for receiving the output signal V.sub.OUT and another input terminal of the first logic circuit 418 is coupled to the first flip-flop 412 through the second pulse shaping circuit 416 for receiving the reset signal V.sub.RST. In this embodiment, the first one-shot circuit 410 is coupled to a clock input pin CK of the first flip-flop 412 by an inverted output pin QB so that the clock input pin CK of the first flip-flop 412 receives the inverted trigger signal V.sub.QB directly. Moreover, the first one-shot circuit 410 may be coupled from the output pin Q to the clock input pin CK of the first flip-flop 412 via an inverter. The first pulse shaping circuit 414 and the second pulse shaping circuit 416 are respectively used for shrinking a pulse width of the output signal V.sub.OUT and a pulse width of the reset signal V.sub.RST.

(36) Moreover, reset pins R of the first one-shot circuit 410 and the first flip-flop 412 are coupled to the decision circuit 406. That means the reset pins R of the first one-shot circuit 410 and the first flip-flop 412 are also receiving the output signal V.sub.OUT. When the output signal V.sub.OUT is at the low level L which is 0 in digital signal format, the first one-shot circuit 410 and the first flip-flop 412 are driven to reset.

(37) Thereby, the detection circuit of this embodiment performs feedback detection of the output signals V.sub.OUT by the feedback circuit to achieve continuous detection of the output signals V.sub.OUT. As shown in FIG. 8, the sensing signal V.sub.A drives the control circuit to control the first quench transistor 422 to quench the optical sensing element 402 and control the recharging transistor 424 to recharge the optical sensing element 402 due to a first incident photon IN1 triggering the optical sensing element 402. However, if a second incident photon IN2 continues to trigger the optical sensing element 402 during a first recharging period T.sub.RE1. At the moment, after the first incident photon IN1 and the second incident photon IN2 continuously trigger the light sensing element 402, a time duration of the sensing signal V.sub.A with the high level H exceeds the trigger time T.sub.DET. Once the sensing signal V.sub.A persists at the high level H for a longer time duration than the first trigger time T.sub.DET, the first quench transistor 422 is driven to quench the optical sensing element 402 and the recharging transistor 424 is controlled to recharge the optical sensing element 402. Successively during a second recharging period T.sub.RE2, a third incident photon IN3 triggers the optical sensing element 402 so that the sensing signal V.sub.A persists at a high level H. Thereby the detection circuit may continuously detect the voltage level of the sensing signal V.sub.A according to the second trigger time T.sub.DET via the feedback circuit. When a time duration of the sensing signal V.sub.A with the high level H exceeds the second trigger time T.sub.DET, the detection circuit generates the corresponding reset signal V.sub.RST which drives the control circuit to control the first quench transistor 422 and the recharging transistor 424 through the first logic circuit 418 for quenching and recharging to the optical sensing element 402. Thus, the optical sensing element 402 may return to its original state and be ready for the next triggered by the incident photon IN.

(38) Accordingly, once the optical sensing element 402 is triggered again and again by other incident photons during the recharging period after being triggered by the first incident photon IN1, the voltage level of the sensing signal V.sub.A is continuously detected and reset. In this embodiment, the sensing signal V.sub.A is equivalent to the output signal V.sub.OUT. Thus, the input terminal of the first logic circuit 418 is coupled to the decision circuit 406 through the first pulse shaping circuit 414 to detect the sensing signal V.sub.A indirectly through the detection of the output signal V.sub.OUT. Moreover, the input terminal of the first logic circuit 418 may also be coupled to the anode of the optical sensing element 402 for directly receiving the sensing signal V.sub.A so that the detection circuit detects the sensing signal V.sub.A directly.

(39) Following the above, the output terminal of the first logic circuit 418 is further coupled to the control circuit. That means a clock input pin CK of the second one-shot circuit 420 receives the confirmation signal V.sub.OR which is corresponding to the output signal V.sub.OUT or the reset signal V.sub.RST. This represents that the first logic circuit 418 receives the output signal V.sub.OUT and the reset signal V.sub.RST and outputs the corresponding confirmation signal V.sub.OR to the control circuit. When the output signal V.sub.OUT or the reset signal V.sub.RST is changed from the low level L to the high level H, an inverted output terminal QB of the second one-shot circuit 420 is driven to output a quench control signal V.sub.CQ to the second flip-flop 428 and the second logic circuit 430, and to the second quench transistor 426 at the same time. Thus the second quench transistor 426 is controlled to be conducting when the quench control signal V.sub.CQ is turned to the high level H so that the first quench transistor 422 is further conducting. In this embodiment, the first quench transistor 422 is in a continuously conducting state due to the first quench transistor 422 is coupled to a terminal of a quench bias V.sub.BL. In this embodiment, quenching of the optical sensing element 402 is performed by control of the second quench transistor 426. The above quench bias V.sub.BL may be a constant current bias. For example, a constant current source provided by reference circuit of System-on-Chip (SoC) digital circuit or field-programmable gate array (FPGA) through transistors of a gate and drain short circuit to generate the constant current bias.

(40) Furthermore, after a predetermined hold-off time, the quench control signal V.sub.CQ is changed from the low level L to the high level H to drive the second flip-flop 428 to generate a control signal V.sub.CT with the high level H according to the power supply voltage VDD and sending the control signal V.sub.CT to the second logic circuit 430. Then, the second logic circuit 430 generates the recharging control signal V.sub.CR with the high level H according to the quench control signal V.sub.CQ and the control signal V.sub.CT both with the high level H and then sends the recharging control signal V.sub.CR with the high level H to the recharging transistor 424 for recharging of the optical sensing element 402. Thereby the voltage level of the optical sensing element 402 is returned to the voltage level before being triggered by the incident photon IN, such as the low level L. Once the output signal V.sub.OUT is returned to the low level L, a reset pin R of the second flip-flop 428 receives the output signal V.sub.OUT with the low level L to be reset. Thus the control signal V.sub.CT of the second flip-flop 428 is changed into low level L and sent to the second logic circuit 430. Then the second logic circuit 430 generates the recharging control signal V.sub.CR with the low level L according to the quench control signal V.sub.CQ with the high level H and the control signal V.sub.CT with the low level L and the recharging transistor 424 is further turned off. Then the optical sensing element 402 is returned to its original state and ready for the next triggered by the incident photon IN.

(41) In addition, transistors may be used as examples of the first quench transistor 422, the recharging transistor 424, and the second quench transistor 426 for element explanation. In the above embodiment, an OR gate or a logic OR circuit may be used as an example of the first logic circuit 418. An AND gate or a logic AND circuit may be used as an example of the second logic circuit 430.

(42) According to the above embodiments, it is understood that, in the present application, the optical sensing device 40 makes the detection circuit continuously detect the sensing signal V.sub.A through the feedback circuit. Thereby, the dynamic range for light detection and photon count rate under strong ambient light are improved, and the problem of the voltage level latching resulting from the optical sensing element 402 successively triggered by other incident photons IN (such as the third photon IN3) during the second recharging period T.sub.RE2 is further avoided.

(43) To sum up, the present application provides an optical sensing device sensing an incident photon and correspondingly generating a sensing signal by an optical sensing element. Then, a decision circuit generates an output signal according to the sensing signal, and a detection circuit detects a pulse width of the output signal to generate a corresponding reset signal. Thus, a control circuit is driven to generate a quench control signal and a recharging control signal according to the reset signal for controlling a quench circuit and a recharging circuit. Thereby, a problem of the optical sensing element being unable to respond incident photons to generate sensing signals for a long period once the optical sensing element is triggered by the incident photon during a recharging period may be solved. The dynamic range for light detection and photon count rate under strong ambient light are also improved. Moreover, the optical sensing device comprises a feedback circuit for feedback detection of the sensing signal. Thereby a problem of the optical sensing element being unable to respond incident photons to generate sensing signals for a long period of time once the optical sensing element is triggered by another incident photon during another recharging period may be solved.

(44) The present application meets requirements for patentability including novelty, non-obviousness and usefulness.

(45) Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details, and representative devices shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalent.