RECEIVER

Abstract

A transceiver circuit for transmitting and receiving via a single antenna interface, the transceiver circuit comprising: a transmitter arranged to send a transmit signal to the antenna interface; an amplifier arranged to receive a receive signal from the antenna interface; and a filter arranged between the antenna and the amplifier; wherein the transmitter circuit is arranged to source and/or sink current through an inductive element and wherein the inductive element is part of either the filter or the amplifier. This arrangement re-uses an inductive element that is already present within the circuit for other reasons (e.g., filtering, impedance matching, etc.). The inductive element may be any winding or coil. For example, it may be a stand-alone inductor, or it may be a transformer winding. Therefore, using an inductive element that is already present for other reasons saves area and in turn cost.

Claims

1. A transceiver circuit for transmitting and receiving via a single antenna interface, the transceiver circuit comprising: a transmitter arranged to send a transmit signal to the antenna interface; an amplifier arranged to receive a receive signal from the antenna interface; and a filter arranged between the antenna and the amplifier; wherein the transmitter circuit is arranged to source and/or sink current through an inductive element and wherein the inductive element is part of either the filter or the amplifier.

2. A transceiver circuit as claimed in claim 1, wherein the inductive element is connected to a supply rail or to ground.

3. A transceiver circuit as claimed in claim 1, wherein the amplifier is an impedance matching amplifier and wherein the inductive element is part of a transformer of the amplifier.

4. A transceiver circuit as claimed in claim 1, wherein the amplifier comprises an impedance matching amplifier arranged to receive the receive signal from the antenna interface.

5. A transceiver circuit as claimed in claim 4, wherein the impedance matching amplifier comprises a transistor or multiple transistors arranged in a common-gate and/or a common-source arrangement.

6. A transceiver circuit as claimed in claim 5, wherein the transceiver circuit further comprises a DC blocking capacitor between the inductive element and the control terminal of the transistor.

7. A transceiver circuit as claimed in claim 5, wherein the impedance matching amplifier comprises a field effect transistor and wherein the impedance matching amplifier further comprises a transformer coupling the signal between the gate and the source of the field effect transistor.

8. A transceiver as claimed in claim 7, wherein the inductive element is a winding of the transformer.

9. A transceiver circuit as claimed in claim 7, wherein the field effect transistor is in common-source arrangement and the amplifier comprises a transformer arranged to amplify the signal at the gate of the field effect transistor.

10. A transceiver circuit is claimed in claim 9, wherein the transformer is a trifilar transformer with a primary winding connected to the source, a secondary winding connected between the gate and ground and a tertiary winding connected between the secondary winding and the gate, wherein the primary winding and the secondary winding are coupled in inverting relationship, wherein the secondary winding and the tertiary winding are coupled to increase voltage at the gate, and wherein there is substantially no coupling between the primary winding and the tertiary winding.

11. A transceiver circuit as claimed in claim 7, wherein the field effect transistor is in common-gate arrangement and comprises a transformer coupling the signal between the source and the drain of the field effect transistor.

12. A transceiver circuit as claimed in claim 11, wherein the transformer is a trifilar transformer with a primary winding connected to the source, a secondary winding connected to the gate and a tertiary winding connected to the drain, wherein the primary winding and the secondary winding are coupled in an inverting relationship and wherein the primary winding and the tertiary winding are coupled in non-inverting relationship, and wherein there is substantially no coupling between the secondary winding and the tertiary winding.

13. A transceiver circuit as claimed in claim 1, wherein the transmitter is arranged to remain in signal communication with the amplifier during both transmit operation and non-transmit operation.

14. A transceiver circuit as claimed in claim 13, wherein there is no switch between the transmitter and the amplifier.

15. A transceiver circuit as claimed in claim 1, wherein the amplifier is arranged to remain in signal communication with the antenna during both transmit operation and non-transmit operation.

16. A transceiver circuit as claimed in claim 17, wherein there is no switch between the antenna and the amplifier.

17. A transceiver circuit as claimed in claim 1, wherein the transmitter, amplifier and filter are all fabricated on the same chip.

18. A transceiver circuit as claimed in claim 1, wherein the transmitter is connected to a node between the filter and the amplifier.

19. A transceiver circuit for transmitting and receiving via a single antenna interface, the transceiver circuit comprising: a transmitter arranged to send a transmit signal to the antenna interface; an amplifier arranged to receive a receive signal from the antenna interface; and a filter arranged between the antenna and the amplifier; wherein the transmitter is connected to a node between the filter and the amplifier.

20. A transceiver comprising: an antenna; and a transceiver circuit as claimed in claim 19.

21. A transceiver as claimed in claim 20, wherein the transmitter comprises an impulse or pulse generator.

22. A pulsed radar comprising a transceiver as claimed in claim 21.

23. A method of duplex operation of a transceiver circuit via a single antenna interface, wherein the transceiver circuit comprises: a transmitter arranged to send a transmit signal to the antenna interface; and an amplifier arranged to receive a receive signal from the antenna interface; and a filter arranged between the antenna and the amplifier; wherein the method comprises: the transmitter transmitting a transmit signal by sourcing and/or sinking current through an inductive element.

24. A method of duplex operation of a transceiver circuit via a single antenna interface, wherein the transceiver circuit comprises: a transmitter arranged to send a transmit signal to the antenna interface; and an amplifier arranged to receive a receive signal from the antenna interface; and a filter arranged between the antenna and the amplifier; wherein the method comprises: the transmitter transmitting a transmit signal onto a node between the filter and the amplifier.

Description

[0059] Certain preferred embodiments of the invention will now be described, by way of example only, and with reference to the accompanying drawings in which:

[0060] FIGS. 1a and 1b show two RF front-end topologies;

[0061] FIG. 2 shows a common-source low-noise amplifier arrangement for half-duplex operation;

[0062] FIG. 3 shows an embodiment of the invention with two possible nodes at which to connect the transmitter in a common-source amplifier;

[0063] FIG. 4 shows a common-gate low-noise amplifier arrangement for half-duplex operation;

[0064] FIG. 5 shows an embodiment of the invention with one way of powering the transmitter in a common-gate amplifier with a multi-filament transformer;

[0065] FIG. 6 shows another embodiment of the invention with another way of powering the transmitter in a common-gate amplifier with a trifilar and PMOS transistors;

[0066] FIG. 7 shows the transmitter powered from a passive filter's transformer winding;

[0067] FIG. 8 shows schematically the components of a pulsed radar module.

[0068] FIGS. 1a and 1b show two different general arrangements for a direct radio frequency (RF) transceiver front-end 100. Both of these arrangements are single-port devices, i.e., they have a single antenna 10 that is used for both transmission and reception. Each front-end 100 has an antenna 10, a filter 20, a low-noise amplifier (LNA) 40, an analog-to-digital converter (ADC) 50 and a transmitter 30. As these are direct RF front ends there are no mixers for up/down conversion. FIG. 1a shows the arrangement according to some embodiments of the invention and shows the transmitter 30 connected to a node between the filter 20 and the LNA 40. FIG. 1b shows the transmitter 30 connected according to other embodiments of the invention where it is connected instead between the antenna 10 and the filter 20. One difference between these arrangements is in whether the output from the transmitter 30 gets filtered by the filter 20. The advantage of the arrangement in FIG. 1a is that the transmitter 30 signal is filtered by the filter 20. This helps to ensure that the transceiver output meets frequency transmission requirements. For example, for an UWB (ultra-wide band) transmitter, there is a spectrum mask that must be adhered to. Applying the filter 20 to the output of the transmitter 30 helps to filter out frequencies that would violate the spectrum mask. However, the filter 20 also results in a certain degree of attenuation. Ideally the filter 20 is transparent to the signals of interest (both outgoing and incoming), but in reality, there is always an insertion loss associated with any passive filter 20. Therefore, placement of the filter 20 as in FIG. 1a means that the transmitter 30 must be higher powered in order to make optimum use of the available spectrum mask (or alternatively, for a given power, the range of the device is compromised by the insertion loss in the filter 20). The full power of the transmitter 30 is also then seen by the receiver parts of the circuit, i.e., the LNA 40 and ADC 50. A higher-powered transmitter 30 can risk damaging these components and therefore placement of the transmitter 30 as in FIG. 1a means that care needs to be taken to ensure that the LNA 40 and ADC 50 are not damaged by the transmitter 30. With the arrangement of FIG. 1b the full power of the transmitter 30 is available to the antenna 10 without loss, but it is unfiltered, hence potentially compromising the spectrum efficiency of the transmitter 30 or requiring additional filtering to be built into the transmitter 30 or antenna. It will be appreciated that both of these arrangements (FIGS. 1a and 1b) have their own advantages and disadvantages, but the invention is applicable to both.

[0069] FIG. 2 shows the basic construction of a common-source amplifier 200 with a trifilar transformer for high gain and impedance matching. For maximum gain, the primary winding T.sub.1,p is coupled to the secondary winding T.sub.1,s and the secondary winding T.sub.1,s is couple to the tertiary winding T.sub.1,t. However, the tertiary winding T.sub.1,t is not coupled to the primary winding T.sub.1,p so as to ensure maximum gain of the amplifier. The turns ratios of T.sub.1,p to T.sub.1,s and T.sub.1,s to T.sub.1,t also affect the impedance matching of the amplifier and therefore both the gain and the impedance matching can be set as desired. The three windings T.sub.1,p, T.sub.1,s and T.sub.1,t, together with the field effect transistor M.sub.1 in common-source arrangement form the impedance matching amplifier. Stacked on top of that amplifier are two common-gate stages each comprising a field effect transistor M.sub.2 or M.sub.3 to increase the output impedance. The topmost common-gate stage transistor M.sub.3 improves reverse isolation by providing a high output impedance and thereby isolating the load (represented by inductor L and capacitor C) from the common-source amplifier stage M.sub.1. Note that both common-gate stages M.sub.2 and M.sub.3 are always-ON. These are not arranged to be switchable.

[0070] FIG. 3 shows the amplifier of FIG. 2 but showing the transmitter 310 connected to the antenna in accordance with embodiments of the invention. Although not shown in FIG. 3, the antenna is connected to the signal path 320 to the left, with a filter interposed between the antenna and the circuit of FIG. 3 (i.e., as shown in FIG. 1a). The signal path 320 carries the receive signal from the antenna through the filter and into the receiver as indicated by RF.sub.i.

[0071] Two alternative transmitter placements are shown, labelled T.sub.X1 and T.sub.X2, but it will be appreciated that only one of these is required (as indicated by the dashed lines).

[0072] The only difference between the two connection points T.sub.X1 and T.sub.X2 is that T.sub.X1 is connected upstream (i.e., towards the antenna) of the transformer winding T.sub.1,t, while T.sub.X2 is connected downstream (i.e., further from the antenna) of the transformer winding T.sub.1,t.

[0073] In both case (T.sub.X1 and T.sub.X2), the transmitter 310 (or 311 for T.sub.X2) is directly and continually connected to the signal path 320. There are no switches in the path from the transmitter 310 (or transmitter 311) to the signal path 320 that disconnect the transmitter 310 (or transmitter 311), so it is in an always-connected state. This does not mean that it is always transmitting, but it means that even when the transmitter 310 (or transmitter 311) is not generating a transmit signal, its off-capacitance is still present and affects the other components attached to the signal path 320.

[0074] The transmitter 310 is powered through the inductor T.sub.1,s, which is in fact the secondary winding of trifilar transformer T.sub.1. As is shown in FIG. 3, the winding T.sub.1,s is connected between the supply rail, V.sub.dd, and the signal path 320. Therefore, a DC current flows from the supply rail onto the signal path 320 and from there to the transmitter 310 which is in turn connected to ground (not shown). In order to prevent the voltage of the supply rail being applied to the gate of field effect transistor M.sub.1, a DC blocking capacitor 325 is positioned between the connection point T.sub.X1 and the gate of M.sub.1. In this example, the DC blocking capacitor 325 is also positioned between the connection point T.sub.X2 and the gate of M.sub.1, so it is suitable for either configuration. However, it will be appreciated that the DC blocking capacitor 325 could instead be placed between the winding T.sub.1,t and the connection point T.sub.X1. In FIG. 2, the transistor M.sub.1 was biased via the voltage V.sub.1 provided through winding T.sub.1,s. However, in FIG. 3, the winding T.sub.1,s is now connected to V.sub.dd. Therefore, in order to bias M.sub.1 correctly, the bias voltage V.sub.1 is now connected the other side of the DC blocking capacitor 325, i.e., it is connected to the signal path 320 between the DC blocking capacitor 325 and the gate of M.sub.1.

[0075] The use of the transformer winding T.sub.1,s to power the transmitter has two main benefits. One is that it allows the signal swing of the transmitter 310, 311 to be higher than the supply voltage, e.g., it can swing from almost ground up to almost 2*V.sub.dd. This allows a much larger transmit signal to be produced for transmission.

[0076] The other advantage is that the winding T.sub.1,s is already present as part of the impedance matching amplifier 300. Therefore, the transmitter has been powered without having to add another large and costly inductor to the circuit.

[0077] In addition, because the transmitter 310 is connected to the signal path 320 adjacent the amplifier 300, its capacitance (in particular its off-capacitance, i.e. the capacitance of the transmitter when it is not transmitting and all its internal switches are open, which will typically be higher than its on-capacitance when at least some of its internal switches are closed) can be taken into account in the impedance matching design of the amplifier 300. This arrangement was discussed above and is further set out in WO2018/033743. The trifilar transformer T.sub.1 of the amplifier 300 defines both the input impedance of the amplifier 300 and its gain. The primary winding T.sub.1,p is connected to the source, the secondary winding T.sub.1,s is connected between the gate and V.sub.dd (which acts as a signal ground) and the tertiary winding T.sub.1,t is connected between the secondary winding T.sub.1,s and the gate of M.sub.1. The primary winding and the secondary winding are coupled in inverting relationship, while the secondary winding and the tertiary winding are coupled so as to increase the gate voltage of M.sub.1. With the right design of trifilar transformer T.sub.1, there can also be very low or substantially no coupling between the primary winding and the tertiary winding. The coupling between the primary T.sub.1,p and secondary T.sub.1,s windings increases the gate-source voltage of M.sub.1, thereby providing one gain mechanism. The coupling between the secondary T.sub.1,s and tertiary T.sub.1,t windings further increases the gate voltage of M.sub.1 (and therefore also the gate-source voltage of M.sub.1), thereby providing an additional gain mechanism. At the same time, as the input impedance of the arrangement depends upon both the transconductance of the transistor M.sub.1 and the turns ratios of the three windings of transformer T.sub.1, it is possible to achieve good impedance matching via a well-defined input impedance as well as high gain. The capacitance of the transmitter 310 can be taken into account when selecting M.sub.1 and the turns ratios of the windings T.sub.1,p, T.sub.1,s and T.sub.1,t so that the amplifier remains properly matched for optimum signal transfer into the amplifier (minimal reflection). As the transmitter 310 is always-connected, the impedance matching of the amplifier 300 does not change between transmit and receive modes and therefore it continues to operate efficiently throughout both transmit and non-transmit operation, thereby allowing good full-duplex (or pseudo-full-duplex) operation.

[0078] With the transmitter 311 connected at T.sub.X2 rather than T.sub.X1, the only difference is that the transmitter is powered (i.e. sources and/or sinks current) through both windings T.sub.1,s and T.sub.1,t. The functionality is otherwise the same. However, positioning the transmitter 311 in this location is less-desirable as the transmit signal gets scaled down by the transformer windings T.sub.1,s and T.sub.1,t and the effective capacitance of the transmitter 311 gets multiplied up instead of divided down and so is potentially more difficult to accommodate. This arrangement is viable under certain conditions (where sufficient transmit power can be generated and where the transmitter capacitance is small enough that it can still be absorbed), but it is generally less-desirable than the placement at T.sub.X1.

[0079] FIG. 4 shows the basic construction of a common-gate low-noise amplifier 400 with a trifilar transformer for high gain and impedance matching. For maximum gain, the primary winding T.sub.1,p is coupled to the secondary winding T.sub.1,s and the primary winding T.sub.1,p is also coupled to the tertiary winding T.sub.1,t. However, the tertiary winding T.sub.1,t is not coupled (or at least only coupled with a low coupling coefficient) to the secondary winding T.sub.1,s so as to ensure stability of the amplifier. The turns ratios of T.sub.1,p to T.sub.1,s and T.sub.1,p to T.sub.1,t also affect the impedance matching of the amplifier 400 and therefore both the gain and the impedance matching can be set as desired. The three windings T.sub.1,p, T.sub.1,s and T.sub.1,t, together with the field effect transistor M.sub.1 in common-gate arrangement form the impedance matching amplifier. As with the common-source amplifier 200 of FIG. 2, stacked on top of the transistor M.sub.1 and tertiary winding T.sub.1,t, are two common-gate stages each comprising a field effect transistor M.sub.2 or M.sub.3 to increase the output impedance. The topmost common-gate stage transistor M.sub.3 improves reverse isolation by providing a high output impedance and thereby isolating the load (represented by inductor L and capacitor C) from the common-source amplifier stage M.sub.1. Note that both common-gate stages M.sub.2 and M.sub.3 are always-ON. These are not arranged to be switchable. The output RF.sub.o of the amplifier 400 is taken from above the tertiary winding T.sub.1,t such that the tertiary winding T.sub.1,t lies between the output RF.sub.o and the drain of M.sub.1.

[0080] FIG. 5 shows the common-gate amplifier of FIG. 4 but showing the transmitter 510 connected to the antenna in accordance with embodiments of the invention. Although not shown in FIG. 5, the antenna is connected to the signal path 520 to the right, with a filter interposed between the antenna and the circuit of FIG. 5 as shown in FIG. 1a. The signal path 520 carries the receive signal from the antenna through the filter and into the receiver as indicated by RF.sub.i.

[0081] As with FIG. 3, the transmitter 510 is directly and continually connected to the signal path 520. There are no switches in the path from the transmitter 510 to the signal path 520 that disconnect the transmitter 510, so it is in an always-connected state. This does not mean that it is always transmitting, but it means that even when the transmitter 510 is not generating a transmit signal, its off-capacitance is still present and affects the other components attached to the signal path 520.

[0082] The transmitter 510 is powered through the inductor T.sub.1,q, which is a quaternary winding of the quadrifilar transformer T.sub.1. As is shown in FIG. 5, the winding T.sub.1,q is connected between the supply rail, V.sub.dd, and the signal path 520. Therefore, current flows from the supply rail onto the signal path 520 and from there to the transmitter 510 which is in turn connected to ground (not shown). The voltage of the supply rail is not applied to the source of field effect transistor M.sub.1 due to the isolation provided by the windings of the transformer T.sub.1. The AC signals (both transmit and receive) are coupled into the source of M.sub.1 via the mutual coupling of the quaternary winding T.sub.1,q with the primary winding T.sub.1,p. No DC blocking capacitor is required in this arrangement as the transformer T.sub.1 provides this function. In both FIGS. 4 and 5, the transistor M.sub.1 is biased via the voltage V.sub.1 provided through secondary winding T.sub.1,s.

[0083] The use of the quaternary winding is advantageous as it allows NMOS transistors to be used in both the amplifier (i.e., M.sub.1, M.sub.2, M.sub.3) and the transmitter 510 (details of which are not shown). NMOS transistors are generally preferred where possible. There is a minor disadvantage to coupling the signal in via the quaternary winding T.sub.1,q which is that there will never be a perfect coupling coefficient between the quaternary and primary windings and therefore there will be some signal attenuation. Additionally, the quaternary winding is an extra winding that needs to be formed on the chip and thus could add to the area and/or cost. However, the benefits of using NMOS transistors can outweigh these disadvantages.

[0084] As with the arrangement of FIG. 3, the use of the transformer winding T.sub.1,q to power the transmitter has the benefit that it allows the signal swing of the transmitter to reach higher than the supply voltage, i.e. it can swing from almost ground up to almost 2*V.sub.dd.

[0085] In addition, because the transmitter 510 is connected to the signal path 520 adjacent the amplifier 500, its capacitance (i.e., its off-capacitance) can be taken into account in the impedance matching design of the amplifier 500. This arrangement was discussed above and is further set out in WO2019/086853, although that document does not show the quaternary winding T.sub.1,q. The trifilar transformer T.sub.1 of the amplifier 500 defines both the input impedance of the amplifier 500 and its gain. The primary winding T.sub.1,p is connected to the source of M.sub.1, the secondary winding T.sub.1,s is connected to the gate of M.sub.1 and the tertiary winding T.sub.1,t is connected to the drain of M.sub.1. The quaternary winding T.sub.1,q is coupled to the primary winding T.sub.1,p (and is also coupled to the secondary and tertiary windings T.sub.1,s and T.sub.1,t). The primary winding T.sub.1,p and the secondary winding T.sub.1,s are coupled in an inverting relationship while the primary winding T.sub.1,p and the tertiary winding T.sub.1,t are coupled in non-inverting relationship. With the right design of the transformer T.sub.1, there can also be very low or substantially no coupling between the secondary winding T.sub.1,s and the tertiary winding T.sub.1,t. The coupling between the primary and secondary windings T.sub.1,p, T.sub.1,s increases the gate-source voltage of M.sub.1, thereby providing one gain mechanism. The coupling between the primary and tertiary windings T.sub.1,p, T.sub.1,t increases the drain-source current, thereby providing an additional gain mechanism. At the same time, as the input impedance of the arrangement depends upon both the transconductance of the transistor and the turns ratios of the four windings of the transformer T.sub.1, it is possible to achieve good impedance matching via a well-defined input impedance as well as high gain. The capacitance of the transmitter 510 can be taken into account when selecting M.sub.1 and the turns ratios of the windings T.sub.1,p, T.sub.1,s, T.sub.1,t and T.sub.1,q so that the amplifier 500 remains properly matched for optimum signal transfer into the amplifier (minimal reflection). As the transmitter 510 is always-connected, the impedance matching of the amplifier 500 does not change between transmit and receive modes and therefore it continues to operate efficiently throughout both transmit and non-transmit operation, thereby allowing good full-duplex (or pseudo-full-duplex) operation.

[0086] FIGS. 6a and 6b are similar to FIG. 5 and therefore description of most of the circuits and their operation will be omitted here. The difference is that the transmitter 610 is connected directly to the source of M.sub.1 rather than through a quaternary winding. Thus, the transformer T.sub.1 in FIGS. 6a and 6b is a trifilar transformer and the transmitter 610 is powered through the primary winding T.sub.1,p. In FIG. 6a the primary winding T.sub.1,p is connected between the signal path 620 and ground and the transmitter 610 is most likely a PMOS-based transmitter. In FIG. 6b the primary winding T.sub.1,p is connected between the signal path 620 and the supply rail V.sub.dd and the transmitter 610 is most likely an NMOS-based transmitter.

[0087] FIG. 7 shows a filter 700 which may be the filter 20 of FIGS. 1a and 1b (and as referenced in relation to the other figures). The filter 700 is an LC-based passive filter comprising three inductors L.sub.1, L.sub.2, L.sub.3 and two capacitors C.sub.1, C.sub.2. The signal path 750 extends between the input, RF.sub.i and the output, RF.sub.o (although it will be appreciated that it is a passive filter and so also functions to filter signals passing in the opposite direction from RF.sub.o to RF.sub.i). FIG. 7 shows three possible placements for the transmitter, labelled as T.sub.X1 710, T.sub.X2 720 and T.sub.X3 730. In each case, the transmitter is powered by one of the inductors of the filter 700 (powered in the sense that it sources and/or sinks current through the inductor). It will be appreciated that only one transmitter is generally required, and that FIG. 7 shows all three possible placements simply by way of illustration (although several transmitters could be employed simultaneously if desired for any reason). Transmitter 710 is sinks/sources current through inductor L.sub.1, transmitter 720 sinks/sources current through inductor L.sub.2 and transmitter 730 sinks/sources current through inductor L.sub.3. Each of the inductors in this example is connected between the supply rail, V.sub.dd and the signal path 750 and the transmitter 710, 720 and/or 730 is most likely an NMOS-based transmitter. It will be appreciated that in other examples the inductors L.sub.1, L.sub.2, L.sub.3 could all be connected to ground and the transmitter 710, 720 and/or 730 would most likely be a PMOS-based transmitter. It will of course be appreciated that the principle is not limited to a filter with three inductors but that it can be applied to a filter with any number of inductors and capacitors.

[0088] FIG. 8 shows a pulsed (or impulse) radar 800 which comprises a module 860 on which is mounted an antenna 810 and a semiconductor chip 850. The antenna 810 connects to the semiconductor chip 850 via an antenna interface 815. The semiconductor chip 850 contains a filter 820, a transmitter 830 and an amplifier 840 which may be circuits as described above and shown in the preceding figures. In this embodiment the antenna 810, antenna interface 815, filter 820, transmitter 830 and amplifier 840 are all differential. However, a single-ended implementation is also viable by simply implementing one half of the differential circuit.

[0089] It will be appreciated that variations and modifications of the above circuits may be made without departing from the scope of the appended claims.